IRFI1310G [INFINEON]

Power MOSFET(Vdss=100V, Rds(on)=0.04ohm, Id=22A); 功率MOSFET ( VDSS = 100V , RDS(ON) = 0.04ohm ,ID = 22A )
IRFI1310G
型号: IRFI1310G
厂家: Infineon    Infineon
描述:

Power MOSFET(Vdss=100V, Rds(on)=0.04ohm, Id=22A)
功率MOSFET ( VDSS = 100V , RDS(ON) = 0.04ohm ,ID = 22A )

文件: 总8页 (文件大小:323K)
中文:  中文翻译
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PD - 9.1222  
IRFI1310G  
HEXFET® Power MOSFET  
Advanced Process Technology  
Ultra Low On-Resistance  
IsolatedPackage  
High Voltage Isolation = 2.5KVRMS  
Sink to Lead Creepage Dist. = 4.8mm  
Repetitive Avalanche Rated  
175°C Operating Temperature  
VDSS = 100V  
RDS(on) = 0.04Ω  
ID = 22A  
Description  
Fourth Generation HEXFETs from International Rectifier utilize advanced  
processing techniques to achieve the lowest possible on-resistance per silicon  
area. This benefit, combined with the fast switching speed and ruggedized device  
design that HEXFET Power MOSFETs are well known for, provides the designer  
with an extremely efficient device for use in a wide variety of applications.  
The TO-220 Fullpak eliminates the need for additional insulating hardware in  
commercial-industrial applications. The moulding compound used provides a high  
isolation capability and a low thermal resistance between the tab and external  
heatsink. This isolation is equivalent to using a 100 micron mica barrier with  
standard TO-220 product. The Fullpak is mounted to a heatsink using a single clip  
or by a single screw fixing.  
Absolute Maximum Ratings  
Parameter  
Continuous Drain Current, VGS @ 10V  
Continuous Collector Current, VGS @ 10V  
Pulsed Drain Current  
Max.  
22  
Units  
ID @ TC = 25°C  
ID @ TC = 100°C  
IDM  
15  
A
88  
PD @TC = 25°C  
Power Dissipation  
48  
0.32  
W
W/°C  
V
Linear Derating Factor  
VGS  
EAS  
IAR  
Gate-to-Source Voltage  
±20  
Single Pulse Avalanche Energy  
Avalanche Current  
120  
mJ  
A
22  
EAR  
dv/dt  
TJ  
Repetitive Avalanche Energy  
Peak Diode Recovery dv/dt  
Operating Junction and  
4.8  
mJ  
V/ns  
5.5  
-55 to + 175  
TSTG  
Storage Temperature Range  
Soldering Temperature, for 10 seconds  
Mounting torque, 6-32 or M3 screw.  
°C  
300 (1.6mm from case)  
10 lbf•in (1.1N•m)  
Thermal Resistance  
Parameter  
Junction-to-Case  
Junction-to-Ambient  
Min.  
––––  
Typ.  
––––  
––––  
Max.  
3.1  
Units  
RθJC  
RθJA  
°C/W  
65  
––––  
To Order  
Revision 0  
 
 
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IRFI1310G  
Electrical Characteristics @ T = 25°C (unless otherwise specified)  
J
Parameter  
Min. Typ. Max. Units  
100 ––– –––  
––– 0.10 ––– V/°C Reference to 25°C, ID = 1mA  
Conditions  
V(BR)DSS  
Drain-to-Source Breakdown Voltage  
V
VGS = 0V, ID = 250µA  
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient  
RDS(ON)  
VGS(th)  
gfs  
Static Drain-to-Source On-Resistance  
Gate Threshold Voltage  
––– ––– 0.04  
2.0 ––– 4.0  
12 ––– –––  
––– ––– 25  
––– ––– 250  
––– ––– 100  
––– ––– -100  
––– ––– 110  
––– ––– 18  
––– ––– 42  
––– 13 –––  
––– 77 –––  
––– 82 –––  
––– 64 –––  
V
S
VGS = 10V, ID = 13A  
VDS = VGS, ID = 250µA  
VDS = 50V, ID = 25A  
VDS = 100V, VGS = 0V  
VDS = 80V, VGS = 0V, TJ = 150°C  
VGS = 20V  
Forward Transconductance  
IDSS  
IGSS  
Drain-to-Source Leakage Current  
µA  
nA  
Gate-to-Source Forward Leakage  
Gate-to-Source Reverse Leakage  
Total Gate Charge  
VGS = -20V  
Qg  
ID = 25A  
Qgs  
Qgd  
td(on)  
tr  
Gate-to-Source Charge  
Gate-to-Drain ("Miller") Charge  
Turn-On Delay Time  
Rise Time  
nC  
ns  
VDS = 80V  
VGS = 10V, See Fig. 6 and 13  
VDD = 50V  
ID = 25A  
td(off)  
tf  
Turn-Off Delay Time  
Fall Time  
RG = 9.1Ω  
RD = 2.0Ω, See Fig. 10  
Between lead,  
LD  
LS  
Internal Drain Inductance  
Internal Source Inductance  
––– 4.5 –––  
––– 7.5 –––  
6mm (0.25in.)  
nH  
pF  
from package  
and center of die contact  
VGS = 0V  
Ciss  
Coss  
Crss  
Input Capacitance  
––– 2500 –––  
––– 630 –––  
––– 130 –––  
Output Capacitance  
VDS = 25V  
Reverse Transfer Capacitance  
ƒ = 1.0MHz, See Fig. 5  
Source-Drain Ratings and Characteristics  
Parameter  
Continuous Source Current  
(Body Diode)  
Min. Typ. Max. Units  
Conditions  
MOSFET symbol  
IS  
––– –––  
22  
showing the  
A
ISM  
Pulsed Source Current  
(Body Diode)  
integral reverse  
––– –––  
88  
p-n junction diode.  
TJ = 25°C, IS = 13A, VGS = 0V  
TJ = 25°C, IF = 25A  
VSD  
trr  
Diode Forward Voltage  
Reverse Recovery Time  
Reverse RecoveryCharge  
Forward Turn-On Time  
––– ––– 2.5  
––– 140 210  
––– 0.79 1.2  
V
ns  
Qrr  
ton  
µC di/dt = 100A/µs  
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)  
Notes:  
Repetitive rating; pulse width limited by  
max. junction temperature. ( See fig. 11 )  
t=60s, ƒ=60Hz  
I
SD 25A, di/dt 170A/µs, VDD V(BR)DSS,  
TJ 175°C  
VDD = 25V, starting TJ = 25°C, L = 1.0mH  
Pulse width 300µs; duty cycle 2%.  
RG = 25, IAS = 13A. (See Figure 12)  
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IRFI1310G  
100 0  
10 0  
1 0  
1000  
VGS  
VGS  
15V  
TOP  
15V  
TOP  
10V  
10V  
8.0V  
7.0V  
6.0V  
5.5V  
5.0V  
8.0V  
7.0V  
6.0V  
5.5V  
5.0V  
BOTTOM 4.5V  
BOTTOM 4.5V  
100  
10  
1
4.5V  
4.5V  
20µs PULSE WIDTH  
20µs PULSE WIDTH  
T
= 25°C  
T
C
= 175°C  
C
1
0.1  
1
10  
100  
0.1  
1
10  
100  
V
, Drain-to-Source Voltage (V)  
V
, Drain-to-Source Voltage (V)  
DS  
DS  
Fig 1. Typical Output Characteristics,  
Fig 2. Typical Output Characteristics,  
TC = 25oC  
TC = 175oC  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
1000  
100  
10  
I
= 25A  
D
T
= 25°C  
J
T
= 175°C  
J
V
= 50V  
D S  
V
GS  
= 10V  
20µ s PULS E W ID TH  
1
-6 0 -4 0 -20  
0
20 40 60 80 100 120 140 160 180  
4
5
6
7
8
9
1 0  
T
J
, Junction Temperature (°C)  
V
, G ate-to-Source V oltage (V)  
G S  
Fig 3. Typical Transfer Characteristics  
Fig 4. Normalized On-Resistance  
Vs. Temperature  
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IRFI1310G  
4000  
20  
16  
12  
8
V
C
C
C
= 0V,  
f = 1MHz  
I
= 25A  
D
GS  
iss  
rss  
oss  
= C + C  
,
C
SHORTED  
V
V
V
= 80V  
= 50V  
= 20V  
gs  
gd  
ds  
DS  
DS  
DS  
= C  
gd  
= C + C  
ds  
gd  
3000  
2000  
1000  
0
C
iss  
C
C
oss  
4
rss  
FOR TEST CIRCUIT  
SEE FIGURE 13  
0
1
10  
100  
0
30  
60  
90  
120  
V
, Drain-to-Source Voltage (V)  
DS  
Q
, Total Gate Charge (nC)  
G
Fig 5. Typical Capacitance Vs.  
Fig 6. Typical Gate Charge Vs.  
Drain-to-Source Voltage  
Gate-to-Source Voltage  
1000  
100  
10  
1000  
100  
10  
OPERATION IN THIS AREA LIMITED  
BY R  
DS(on)  
T = 175°C  
J
100µs  
1ms  
T = 25°C  
J
10ms  
T
T
= 25°C  
= 175°C  
C
J
100ms  
Single Pulse  
V
GS  
= 0V  
1
1
1
10  
100  
1000  
0
0.5  
1
1.5  
2
2.5  
V
, Drain-to-Source Voltage (V)  
V
, Source-to-Drain Voltage (V)  
DS  
SD  
Fig 7. Typical Source-Drain Diode  
Fig 8. Maximum Safe Operating Area  
Forward Voltage  
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IRFI1310G  
RD  
VDS  
VGS  
25  
20  
15  
10  
5
D.U.T.  
RG  
VDD  
10 V  
Pulse Width≤ 1 µs  
Duty Factor≤ 0.1 %  
Fig 10a. Switching Time Test Circuit  
0
25  
50  
75  
100  
125  
150  
175  
T
C
, Case Temperature (°C)  
Fig 9. Maximum Drain Current Vs.  
Fig 10b. Switching Time Waveforms  
Case Temperature  
10  
D
= 0.50  
0.20  
1
0.10  
0.05  
0.1  
0.02  
0.01  
P
DM  
t
1
SINGLE PULSE  
(THERM AL RESPONSE)  
0.01  
t
2
Notes:  
1. Duty factor D =  
t
/ t  
2
1
2. Peak T = P  
x Z  
+ T  
C
D M  
J
thJ C  
1
0.001  
0.00001  
0.0001  
0.001  
0.01  
0.1  
10  
t1 , Rectangular P ulse Duration (sec)  
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case  
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IRFI1310G  
10 V  
Index  
Next Data Sheet  
300  
250  
200  
150  
100  
50  
I
D
TOP  
5.3A  
9.2A  
BOTTOM 13A  
Fig 12a. Unclamped Inductive Test Circuit  
V
DD  
= 25V  
0
25  
50  
75  
100  
125  
150  
175  
Starting T , Juntion Temperature (°C)  
J
Fig 12c. Maximum Avalanche Energy  
Vs. Drain Current  
Fig 12b. Unclamped Inductive Waveforms  
10 V  
Fig 13a. Basic Gate Charge Waveform  
Fig 13b. Gate Charge Test Circuit  
Appendix A:Figure 14, Peak Diode Recovery dv/dt Test Circuit  
Appendix B:Package Outline Mechanical Drawing  
Appendix C:Part Marking Information  
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Index  
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IRFI1310G  
Peak Diode Recovery dv/dt Test Circuit  
Circuit Layout Considerations  
Low Stray Inductance  
Ground Plane  
D.U.T  
Low Leakage Inductance  
Current Transformer  
RG  
dv/dt controlled by RG  
Driver same type as D.U.T.  
ISD controlled by Duty Factor "D"  
D.U.T. - Device Under Test  
VDD  
*
* VGS = 5V for Logic Level Devices  
Fig 14. For N-Channel HEXFETS  
To Order  
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Index  
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IRFI1310G  
Package Outline  
TO-220 Full-Pak  
Part Marking Information  
TO-220 Full-Pak  
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331  
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: (44) 0883 713215  
IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 3L1, Tel: (905) 475 1897 IR GERMANY:  
Saalburgstrasse 157, 61350 Bad Homburg Tel: 6172 37066 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: (39) 1145  
10111 IR FAR EAST: K&H Bldg., 2F, 3-30-4 Nishi-Ikeburo 3-Chome, Toshima-Ki, Tokyo 171 Tel: (03)3983 0641 IR  
SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, 0316 Tel: 65 221 8371  
Data and specifications subject to change without notice.  
To Order  

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