IRFI4410ZPBF [INFINEON]
High Efficiency Synchronous Rectification in SMPS; 高效率同步整流开关电源
| 型号： | IRFI4410ZPBF |
| 厂家： | 
Infineon |
| 描述： | High Efficiency Synchronous Rectification in SMPS |
| 文件： | 总8页 (文件大小：321K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 97475A
IRFI4410ZPbF
HEXFET® Power MOSFET
Applications
VDSS
RDS(on) typ.
100V
l High Efficiency Synchronous Rectification in SMPS
l Uninterruptible Power Supply
l High Speed Power Switching
l Hard Switched and High Frequency Circuits
7.9m
9.3m
:
:
max.
ID
43A
Benefits
D
S
D
l Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
l Fully Characterized Capacitance and Avalanche
SOA
S
G
l Enhanced body diode dV/dt and dI/dt Capability
l Lead-Free
D
G
TO-220AB Full-Pak
G
D
S
Gate
Drain
Source
Absolute Maximum Ratings
Symbol
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Parameter
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current c
Max.
43
Units
A
30
170
PD @TC = 25°C
47
Maximum Power Dissipation
Linear Derating Factor
W
0.3
W/°C
V
VGS
±30
Gate-to-Source Voltage
Single Pulse Avalanche Energy d
EAS (Thermally limited)
310
mJ
°C
TJ
-55 to + 175
Operating Junction and
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
300
10lbxin (1.1Nxm)
Mounting torque, 6-32 or M3 screw
Thermal Resistance
Parameter
Junction-to-Case f
Junction-to-Ambient f
Typ.
–––
–––
Max.
3.2
Units
RθJC
RθJA
°C/W
65
www.irf.com
1
4/19/11
IRFI4410ZPbF
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Drain-to-Source Breakdown Voltage
Min. Typ. Max. Units
Conditions
VGS = 0V, ID = 250μA
V
100
–––
–––
2.0
––– –––
V
(BR)DSS
Reference to 25°C, I = 5mA
V(BR)DSS/ TJ Breakdown Voltage Temp. Coefficient
95
––– mV/°C
D
RDS(on)
VGS(th)
IDSS
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
7.9
9.3
4.0
20
m
VGS = 10V, ID = 26A
–––
–––
V
V
V
V
V
V
DS = VGS, ID = 150μA
DS = 100V, VGS = 0V
DS = 100V, VGS = 0V, TJ = 125°C
GS = 20V
Drain-to-Source Leakage Current
–––
–––
–––
–––
–––
μA
––– 250
––– 100
––– -100
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Internal Gate Resistance
nA
GS = -20V
RG(int)
0.9
–––
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Qg
Qgs
Qgd
td(on)
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Min. Typ. Max. Units
Conditions
VDS = 50V, ID = 26A
nC ID = 26A
DS = 50V
80
––– –––
S
–––
–––
–––
–––
–––
–––
–––
81
18
23
15
27
43
30
110
–––
–––
–––
–––
–––
–––
V
VGS = 10V
VDD = 65V
ID = 26A
ns
t
Rise Time
r
td(off)
Turn-Off Delay Time
Fall Time
RG = 2.7
t
V
GS = 10V
VGS = 0V
DS = 50V
ƒ = 1.0MHz
f
Cis s
Coss
Crss
Input Capacitance
––– 4910 –––
pF
V
Output Capacitance
Reverse Transfer Capacitance
Effective Output Capacitance (Energy Related)
–––
–––
–––
–––
330 –––
–––
420 –––
680 –––
150
Coss eff. (ER)
V
V
GS = 0V, VDS = 0V to 80V , See Fig.11
GS = 0V, VDS = 0V to 80V
Coss eff. (TR) Effective Output Capacitance (Time Related)
Diode Characteristics
Symbol
Parameter
Min. Typ. Max. Units
Conditions
IS
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
–––
–––
A
A
V
MOSFET symbol
showing the
integral reverse
p-n junction diode.
TJ = 25°C, IS = 26A, VGS = 0V
43
D
S
ISM
–––
––– 170
G
VSD
–––
–––
–––
–––
–––
–––
–––
47
54
110 160
140 210
2.5
1.3
71
81
t
rr
ns TJ = 25°C
TJ = 125°C
nC TJ = 25°C
TJ = 125°C
VR = 85V,
IF = 26A
di/dt = 100A/μs
Q
Reverse Recovery Charge
rr
IRRM
ton
Reverse Recovery Current
Forward Turn-On Time
–––
A
TJ = 25°C
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by max. junction
temperature.
Pulse width ≤ 400μs; duty cycle ≤ 2%.
Rθ is measured at TJ approximately 90°C
Limited by TJmax, starting TJ = 25°C, L = 0.91mH
RG = 25Ω, IAS = 26A, VGS =10V. Part not recommended for use
above this value.
ꢀ Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS
.
.
2
www.irf.com
IRFI4410ZPbF
1000
100
10
1000
100
10
VGS
15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
4.5V
≤60μs PULSE WIDTH
VGS
15V
10V
8.0V
6.0V
5.5V
5.0V
4.8V
4.5V
TOP
TOP
Tj = 25°C
BOTTOM
BOTTOM
4.5V
4.5V
1
≤60μs PULSE WIDTH
Tj = 175°C
0.1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
DS
V
, Drain-to-Source Voltage (V)
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
100
10
3.0
2.5
2.0
1.5
1.0
0.5
I
= 26A
D
V
= 10V
GS
T
= 175°C
J
T
= 25°C
= 50V
J
1
V
DS
≤60μs PULSE WIDTH
0.1
2
3
4
5
6
-60 -40 -20 0 20 40 60 80 100120140160180
, Junction Temperature (°C)
T
J
V
, Gate-to-Source Voltage (V)
GS
Fig 4. Normalized On-Resistance vs. Temperature
Fig 3. Typical Transfer Characteristics
8000
6000
4000
2000
0
16
V
C
= 0V,
f = 1 MHZ
GS
I = 26A
D
= C + C , C SHORTED
iss
gs
gd ds
C
= C
V
V
V
= 80V
= 50V
= 20V
rss
gd
DS
DS
DS
C
= C + C
oss
ds
gd
12
8
C
iss
4
C
oss
C
0
rss
0
20
40
60
80
100
120
1
10
100
Q
Total Gate Charge (nC)
G
V
, Drain-to-Source Voltage (V)
DS
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
www.irf.com
3
IRFI4410ZPbF
1000
100
10
1000
OPERATION IN THIS AREA
LIMITED BY R (on)
DS
100
100μsec
T
= 175°C
J
1msec
10
1
DC
T
= 25°C
J
10msec
1
Tc = 25°C
Tj = 175°C
Single Pulse
V
= 0V
GS
0.1
0.1
0.1
1
10
100
1000
0.0
0.5
1.0
1.5
V
, Drain-toSource Voltage (V)
DS
V
, Source-to-Drain Voltage (V)
SD
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
50
40
30
20
10
0
130
125
120
115
110
105
100
Id = 5mA
25
50
75
100
125
150
175
-60 -40 -20 0 20 40 60 80 100120140160180
T
, CaseTemperature (°C)
C
T
, Temperature ( °C )
J
Fig 9. Maximum Drain Current vs.
Fig 10. Drain-to-Source Breakdown Voltage
Case Temperature
2.0
1.5
1.0
0.5
0.0
1400
I
D
1200
1000
800
600
400
200
0
TOP
8.6A
14A
26A
BOTTOM
0
20
40
60
80
100
25
50
75
100
125
150
175
V
Drain-to-Source Voltage (V)
Starting T , Junction Temperature (°C)
J
DS,
Fig 11. Typical COSS Stored Energy
Fig 12. Maximum Avalanche Energy Vs. DrainCurrent
4
www.irf.com
IRFI4410ZPbF
10
1
D = 0.50
0.20
0.10
0.05
R1
R2
R2
R3
R3
R4
R4
τι (sec)
Ri (°C/W)
R1
0.1
τJ
0.117574 0.000176
1.337531 0.7389
1.260992 0.103059
0.508931 0.008379
τC
0.02
0.01
τJ
τ1
τ
τ
τ
3τ3
τ4
2 τ2
τ1
τ4
Ci= τi/Ri
0.01
0.001
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
10
t
, Rectangular Pulse Duration (sec)
1
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
100
10
1
Duty Cycle = Single Pulse
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔTj = 150°C and
Tstart =25°C (Single Pulse)
0.01
0.05
0.10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔΤ j = 25°C and
Tstart = 150°C.
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
1.0E+00
1.0E+01
tav (sec)
Fig 14. Typical Avalanche Current vs.Pulsewidth
320
240
160
80
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 22a, 22b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
TOP
BOTTOM 10% Duty Cycle
= 26A
Single Pulse
I
D
6. Iav = Allowable avalanche current.
7. ΔT = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
0
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
25
50
75
100
125
150
175
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
Starting T , Junction Temperature (°C)
J
Fig 15. Maximum Avalanche Energy vs. Temperature
www.irf.com
5
IRFI4410ZPbF
16
14
12
10
8
4.5
4.0
3.5
3.0
2.5
2.0
1.5
I
I
I
I
= 1.0A
D
D
D
D
= 1.0mA
= 250μA
= 150μA
6
I
= 17A
= 85V
F
V
4
R
T = 25°C
J
2
T = 125°C
J
1.0
0
-75 -50 -25
0
25 50 75 100 125 150 175
, Temperature ( °C )
100
200
300
400
500
600
700
T
di /dt (A/μs)
J
F
Fig. 17 - Typical Recovery Current vs. dif/dt
Fig 16. Threshold Voltage Vs. Temperature
16
14
12
10
8
350
300
250
200
150
100
50
6
I
= 26A
= 85V
I
= 17A
V = 85V
R
F
F
4
2
0
V
R
T = 25°C
T = 25°C
J
J
T = 125°C
J
T = 125°C
J
0
100
200
300
400
500
600
700
100
200
300
400
500
600
700
di /dt (A/μs)
di /dt (A/μs)
F
F
Fig. 18 - Typical Recovery Current vs. dif/dt
Fig. 19 - Typical Stored Charge vs. dif/dt
350
300
250
200
150
100
50
I
= 26A
F
V
= 85V
R
T = 25°C
J
T = 125°C
J
0
100
200
300
400
500
600
700
di /dt (A/μs)
F
Fig. 20 - Typical Stored Charge vs. dif/dt
6
www.irf.com
IRFI4410ZPbF
Driver Gate Drive
P.W.
P.W.
Period
Period
D =
D.U.T
+
*
=10V
V
GS
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D.U.T. I Waveform
SD
+
-
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
-
+
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
Re-Applied
Voltage
• dv/dt controlled by RG
RG
+
-
Body Diode
Forward Drop
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Inductor Current
I
SD
Ripple
≤ 5%
* VGS = 5V for Logic Level Devices
Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V
(BR)DSS
15V
t
p
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
V
2
GS
0.01Ω
t
p
I
AS
Fig 22b. Unclamped Inductive Waveforms
Fig 22a. Unclamped Inductive Test Circuit
LD
VDS
VDS
90%
+
-
VDD
10%
VGS
D.U.T
VGS
Pulse Width < 1μs
Duty Factor < 0.1%
td(on)
td(off)
tr
tf
Fig 23a. Switching Time Test Circuit
Fig 23b. Switching Time Waveforms
Id
Vds
Vgs
L
VCC
DUT
0
Vgs(th)
1K
Qgs1
Qgs2
Qgd
Qgodr
Fig 24a. Gate Charge Test Circuit
Fig 24b. Gate Charge Waveform
www.irf.com
7
IRFI4410ZPbF
TO-220AB Full-Pak Package Outline (Dimensions are shown in millimeters (inches))
TO-220AB Full-Pak Part Marking Information
EXAMPLE: THIS IS AN IRFI840G
WITH ASSEMBLY
LOT CODE 3432
INTERNATIONAL
ASSEMBLED ON WW 24, 2001
PART NUMBER
IRFI840G
RECTIFIER
LOGO
124K
32
IN THE ASSEMBLY LINE "K"
34
DATE CODE
YEAR 1 = 2001
WEEK 24
ASSEMBLY
LOT CODE
Note: "P" in assembly line position
indicates "Lead-F ree"
LINE K
TO-220AB Full-Pak packages are not recommended for Surface Mount Application.
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 04/11
8
www.irf.com
相关型号：
IRFI48NPBF
Power Field-Effect Transistor, 40A I(D), 55V, 0.016ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-220AB, LEAD FREE, PLASTIC, TO-220, FULL PACK-3
INFINEON
IRFI4905-101
Power Field-Effect Transistor, 41A I(D), 55V, 0.02ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET,
INFINEON
IRFI4905-102
Power Field-Effect Transistor, 41A I(D), 55V, 0.02ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET,
INFINEON
IRFI4905-102PBF
Power Field-Effect Transistor, 41A I(D), 55V, 0.02ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET
INFINEON
IRFI4905-103
Power Field-Effect Transistor, 41A I(D), 55V, 0.02ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET,
INFINEON
IRFI4905-103PBF
Power Field-Effect Transistor, 41A I(D), 55V, 0.02ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET
INFINEON
IRFI4905-104
Power Field-Effect Transistor, 41A I(D), 55V, 0.02ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET
INFINEON
©2020 ICPDF网 联系我们和版权申明