IRFI530N [INFINEON]
HEXFET?? Power MOSFET; HEXFET®功率MOSFET
| 型号： | IRFI530N |
| 厂家： | 
Infineon |
| 描述： | HEXFET?? Power MOSFET |
| 文件： | 总8页 (文件大小：135K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 9.1353A
IRFI530N
PRELIMINARY
HEXFET® Power MOSFET
l Advanced Process Technology
l Isolated Package
l High Voltage Isolation = 2.5KVRMS ꢀ
l Sink to Lead Creepage Dist. = 4.8mm
l Fully Avalanche Rated
D
VDSS = 100V
RDS(on) = 0.11Ω
ID = 12A
G
Description
S
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve the
lowestpossibleon-resistancepersiliconarea. Thisbenefit,
combined with the fast switching speed and ruggedized
device design that HEXFET Power MOSFETs are well
knownfor, providesthedesignerwithanextremelyefficient
device for use in a wide variety of applications.
The TO-220 Fullpak eliminates the need for additional
insulating hardware in commercial-industrial applications.
The moulding compound used provides a high isolation
capability and a low thermal resistance between the tab
and external heatsink. This isolation is equivalent to using
a 100 micron mica barrier with standard TO-220 product.
The Fullpak is mounted to a heatsink using a single clip or
by a single screw fixing.
TO-220 FULLPAK
Absolute Maximum Ratings
Parameter
Max.
Units
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
12
8.6
A
60
41
PD @TC = 25°C
Power Dissipation
W
W/°C
V
Linear Derating Factor
0.27
VGS
EAS
IAR
Gate-to-Source Voltage
±20
Single Pulse Avalanche Energy
Avalanche Current
150
mJ
A
9.0
EAR
dv/dt
TJ
Repetitive Avalanche Current
Peak Diode Recovery dv/dt
Operating Junction and
4.1
mJ
V/ns
5.0
-55 to + 175
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 screw.
°C
300 (1.6mm from case)
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
Junction-to-Case
Min.
––––
––––
Typ.
––––
––––
Max.
3.7
Units
RθJC
RθJA
°C/W
Junction-to-Ambient
65
3/16/98
IRFI530N
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
100 ––– –––
Conditions
VGS = 0V, ID = 250µA
V(BR)DSS
Drain-to-Source Breakdown Voltage
V
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.12 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on)
VGS(th)
gfs
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
––– ––– 0.11
Ω
V
S
VGS = 10V, ID = 6.6A
VDS = VGS, ID = 250µA
VDS = 50V, ID = 9.0A
VDS = 100V, VGS = 0V
VDS = 80V, VGS = 0V, TJ = 150°C
VGS = 20V
2.0
6.4
––– 4.0
––– –––
Forward Transconductance
––– ––– 25
––– ––– 250
––– ––– 100
––– ––– -100
––– ––– 44
––– ––– 6.2
––– ––– 21
IDSS
IGSS
Drain-to-Source Leakage Current
µA
nA
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
VGS = -20V
Qg
ID = 9.0A
Qgs
Qgd
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
nC VDS = 80V
VGS = 10V, See Fig. 6 and 13
–––
–––
–––
–––
6.4 –––
27 –––
37 –––
25 –––
VDD = 50V
ID = 9.0A
ns
nH
pF
td(off)
tf
Turn-Off Delay Time
Fall Time
RG = 12Ω
RD = 5.5Ω, See Fig. 10
Between lead,
6mm (0.25in.)
from package
and center of die contact
VGS = 0V
D
LD
Internal Drain Inductance
–––
–––
–––
4.5
G
LS
Internal Source Inductance
7.5 –––
S
Ciss
Coss
Crss
C
Input Capacitance
––– 640 –––
––– 160 –––
Output Capacitance
VDS = 25V
Reverse Transfer Capacitance
Drain to Sink Capacitance
–––
–––
88 –––
12 –––
ƒ = 1.0MHz, See Fig. 5
ƒ = 1.0MHz
Source-Drain Ratings and Characteristics
Parameter
Continuous Source Current
(Body Diode)
Min. Typ. Max. Units
Conditions
MOSFET symbol
D
IS
––– ––– 12
A
showing the
G
ISM
Pulsed Source Current
(Body Diode)
integral reverse
––– ––– 60
S
p-n junction diode.
TJ = 25°C, IS = 6.6A, VGS = 0V
TJ = 25°C, IF = 9.0A
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
––– ––– 1.3
––– 130 190
––– 650 970
V
ns
Qrr
nC di/dt = 100A/µs
Notes:
Pulse width ≤ 300µs; duty cycle ≤ 2%.
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
VDD = 15V, starting TJ = 25°C, L = 3.1mH
RG = 25Ω, IAS = 9.0A. (See Figure 12)
ꢀ t=60s, ƒ=60Hz
Uses IRF530N data and test conditions
ISD ≤ 9.0A, di/dt ≤ 520A/µs, VDD ≤ V(BR)DSS
TJ ≤ 175°C
,
IRFI530N
100
10
1
100
10
1
VGS
15V
VGS
15V
TOP
TOP
10V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
BOTTOM 4.5V
4.5V
4.5V
20µs PULSE W IDTH
20µs PULSE W IDTH
T
= 175°C
T
= 25°C
J
J
A
100
A
0.1
1
10
100
0.1
1
10
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
3.0
2.5
2.0
1.5
1.0
0.5
0.0
100
10
1
I
= 15A
D
T J = 25°C
TJ = 175°C
V
DS = 50V
V
= 10V
20µs PU LSE W ID TH
GS
A
10 A
4
5
6
7
8
9
-60 -40 -20
0
20
40
60
80 100 120 140 160 180
T
J
, Junction Tem perature (°C)
VG S , G ate-to-Source Voltage (V )
Fig 4. Normalized On-Resistance
Fig 3. Typical Transfer Characteristics
Vs. Temperature
IRFI530N
20
16
12
8
1200
I
= 9.0A
V
C
C
C
= 0V,
f = 1M Hz
D
GS
= C
+ C
+ C
,
C
SHORTED
V
V
V
= 80V
= 50V
= 20V
iss
gs
gd
ds
DS
DS
DS
= C
= C
rss
gd
ds
1000
800
600
400
200
0
oss
gd
C
iss
C
C
oss
rss
4
FOR TEST CIRCUIT
SEE FIGURE 13
A
0
A
1
10
100
0
5
10
15
20
25
30 35 40
45
V
, Drain-to-Source Voltage (V)
DS
Q
, Total Gate Charge (nC)
G
Fig 5. Typical Capacitance Vs.
Fig 6. Typical Gate Charge Vs.
Drain-to-Source Voltage
Gate-to-Source Voltage
100
10
1
1000
OPERATION IN THIS AREA LIM ITED
BY R
DS(on)
100
10
1
T
= 175°C
J
10µs
T
= 25°C
J
100µs
1m s
T
T
= 25°C
C
J
= 175°C
V
= 0V
Single Pulse
10m s
G S
A
A
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1
10
100
1000
V
, Drain-to-Source Voltage (V)
V
, Source-to-Drain Voltage (V)
DS
SD
Fig 7. Typical Source-Drain Diode
Fig 8. Maximum Safe Operating Area
Forward Voltage
IRFI530N
RD
VDS
8.0
6.0
4.0
2.0
0.0
VGS
10V
D.U.T.
RG
+VDD
-
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
25
50
75
100
125
150
175
°
, Case Temperature ( C)
T
10%
C
V
GS
t
t
r
t
t
f
d(on)
d(off)
Fig 9. Maximum Drain Current Vs.
Fig 10b. Switching Time Waveforms
Case Temperature
10
D = 0.50
0.20
1
0.10
0.05
P
DM
0.02
0.01
0.1
SINGLE PULSE
t
1
(THERMAL RESPONSE)
t
2
Notes:
1. Duty factor D =
t / t
1 2
2. Peak T = P
J
x Z
+ T
C
DM
thJC
0.01
0.00001
0.0001
0.001
0.01
0.1
1
10
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
IRFI530N
L
V
350
300
250
200
150
100
50
DS
I
D
TOP
3.7A
6.4A
9.0A
D.U.T.
BOTTOM
R
G
+
-
V
DD
I
10 V
AS
t
p
0.01Ω
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
V
DD
V
= 25V
50
DD
0
A
175
25
75
100
125
150
Starting T , Junction Tem perature (°C)
V
J
DS
Fig 12c. Maximum Avalanche Energy
I
AS
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
.3µF
Q
G
+
10 V
V
DS
D.U.T.
-
Q
Q
GD
GS
V
GS
V
G
3mA
I
I
D
G
Current Sampling Resistors
Charge
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
IRFI530N
Peak Diode Recovery dv/dt Test Circuit
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T
-
+
-
-
+
RG
• dv/dt controlled by RG
+
-
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VDD
Driver Gate Drive
P.W.
Period
Period
D =
P.W.
V
=10V
*
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
IRFI530N
Package Outline
TO-220 FullPak Outline
Dimensions are shown in millimeters (inches)
10.60 (.417)
10.40 (.409)
3.40 (.133)
3.10 (.123)
4.80 (.189)
4.60 (.181)
ø
2.80 (.110)
2.60 (.102)
- A
-
3.70 (.145)
3.20 (.126)
LEAD ASSIGNMENTS
1 - GATE
7.10 (.280)
6.70 (.263)
2 - DRAIN
3 - SOURCE
16.00 (.630)
15.80 (.622)
1.15 (.045)
MIN.
NOTES:
1
DIMENSIONING
&
TOLERANCING
PER ANSI Y14.5M , 1982
1
2
3
2
CONTROLLING DIM ENSION: INCH.
3.30 (.130)
3.10 (.122)
- B
-
13.70 (.540)
13.50 (.530)
C
D
A
B
0.48 (.019)
0.44 (.017)
0.90 (.035)
3X
0.70 (.028)
3X
1.40 (.055)
1.05 (.042)
3X
2.85 (.112)
2.65 (.104)
0.25 (.010)
A
M
B
M
MINIMUM CREEPAGE
DISTANCE BETW EEN
A-B-C-D = 4.80 (.189)
2.54 (.100)
2X
Part Marking Information
TO-220 FullPak
EXAM PLE : TH IS IS AN IR FI840G
W ITH ASSEM BLY
A
LO T CO D E E401
PART N UM B ER
INTERN ATIO NAL
RECTIFIER
LO GO
IR FI840G
E401 9245
ASSEM BLY
D ATE CO DE
(YYW W )
LOT
CO DE
YY
=
YE AR
= W EE K
W W
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086
IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371
http://www.irf.com/
Data and specifications subject to change without notice.
3/98
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