IRFIZ34V [INFINEON]
Power MOSFET(Vdss=60V, Rds(on)=28mohm, Id=20A); 功率MOSFET ( VDSS = 60V , RDS(ON) = 28mohm ,ID = 20A )型号: | IRFIZ34V |
厂家: | Infineon |
描述: | Power MOSFET(Vdss=60V, Rds(on)=28mohm, Id=20A) |
文件: | 总8页 (文件大小:105K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PD - 94053
IRFIZ34V
HEXFET® Power MOSFET
l Advanced Process Technology
l Ultra Low On-Resistance
l Dynamic dv/dt Rating
D
VDSS = 60V
l 175°C Operating Temperature
l Fast Switching
RDS(on) = 28mΩ
G
l Fully Avalanche Rated
l Optimized for SMPS Applications
ID = 20A
S
Description
AdvancedHEXFET® PowerMOSFETsfromInternational
Rectifierutilizeadvancedprocessingtechniquestoachieve
extremelylowon-resistancepersiliconarea. Thisbenefit,
combined with the fast switching speed and ruggedized
device design that HEXFET power MOSFETs are well
knownfor,providesthedesignerwithanextremelyefficient
andreliabledeviceforuseinawidevarietyofapplications.
The TO-220 Fullpak eliminates the need for additional
insulatinghardwareincommercial-industrialapplications.
The moulding compound used provides a high isolation
capability and a low thermal resistance between the tab
and external heatsink. This isolation is equivalent to
using a 100 micron mica barrier with standard TO-220
product. The Fullpak is mounted to a heatsink using a
single clip or by a single screw fixing.
TO-220 Full-Pak
Absolute Maximum Ratings
Parameter
Max.
Units
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
20
14
A
120
PD @TC = 25°C
Power Dissipation
30
W
W/°C
V
Linear Derating Factor
0.20
VGS
EAS
IAR
Gate-to-Source Voltage
± 20
Single Pulse Avalanche Energyꢀ
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt ꢀ
Operating Junction and
81
mJ
A
30
3.0
EAR
dv/dt
TJ
mJ
V/ns
4.5
-55 to + 175
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 srew
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
Junction-to-Case
Typ.
–––
Max.
5.0
Units
RθJC
RθJA
Junction-to-Ambient
–––
65
°C/W
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1
12/12/00
IRFIZ34V
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
60 ––– –––
Conditions
VGS = 0V, ID = 250µA
V(BR)DSS
Drain-to-Source Breakdown Voltage
V
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.062 ––– V/°C Reference to 25°C, ID = 1mAꢀ
RDS(on)
VGS(th)
gfs
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
––– ––– 28
mΩ VGS = 10V, ID = 18A
2.0
15
––– 4.0
––– –––
V
S
VDS = VGS, ID = 250µA
VDS = 25V, ID = 18Aꢀ
VDS = 60V, VGS = 0V
VDS = 48V, VGS = 0V, TJ = 150°C
VGS = 20V
Forward Transconductance
––– ––– 25
––– ––– 250
––– ––– 100
––– ––– -100
––– ––– 49
––– ––– 12
––– ––– 18
IDSS
Drain-to-Source Leakage Current
µA
nA
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
IGSS
VGS = -20V
Qg
ID = 30A
Qgs
Qgd
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
nC VDS = 48V
VGS = 10V, See Fig. 6 and 13ꢀ
VDD = 30V
–––
–––
–––
–––
10 –––
65 –––
31 –––
40 –––
ID = 30A
ns
td(off)
tf
Turn-Off Delay Time
Fall Time
RG = 12Ω
VGS = 10V, See Fig. 10 ꢀ
Between lead,
6mm (0.25in.)
D
4.5
LD
LS
Internal Drain Inductance
Internal Source Inductance
–––
–––
–––
–––
nH
G
from package
7.5
and center of die contact
VGS = 0V
S
Ciss
Coss
Crss
Input Capacitance
––– 1120 –––
––– 250 –––
Output Capacitance
VDS = 25V
Reverse Transfer Capacitance
–––
59 –––
pF
ƒ = 1.0MHz, See Fig. 5ꢀ
Source-Drain Ratings and Characteristics
Parameter
Continuous Source Current
(Body Diode)
Min. Typ. Max. Units
Conditions
MOSFET symbol
showing the
D
IS
20
––– –––
––– –––
A
G
ISM
Pulsed Source Current
integral reverse
120
S
(Body Diode)
p-n junction diode.
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
––– ––– 1.6
––– 70 110
––– 99 150
V
TJ = 25°C, IS = 30A, VGS = 0V
TJ = 25°C, IF = 30A
ns
Qrr
ton
nC di/dt = 100A/µs ꢀ
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
ISD ≤ 30A, di/dt ≤ 250A/µs, VDD ≤ V(BR)DSS
TJ ≤ 175°C
,
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Pulse width ≤ 400µs; duty cycle ≤ 2%.
ꢀUses IRFZ34V data and test conditions
Starting TJ = 25°C, L = 180µH
RG = 25Ω, IAS = 30A. (See Figure 12)
2
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IRFIZ34V
1000
100
10
1000
100
10
VGS
15V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
TOP
TOP
10V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
BOTTOM 4.5V
4.5V
4.5V
20µs PULSE WIDTH
T = 175 C
J
20µs PULSE WIDTH
°
°
T = 25 C
J
1
0.1
1
0.1
1
10
100
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
3.5
30A
=
I
D
3.0
2.5
2.0
1.5
1.0
0.5
0.0
°
T = 25 C
J
100
10
1
°
T = 175 C
J
V
= 50V
DS
20µs PULSE WIDTH
V
= 10V
GS
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
°
4
5
6
7
8
9
10
11
T , Junction Temperature ( C)
J
V
, Gate-to-Source Voltage (V)
GS
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
Vs. Temperature
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3
IRFIZ34V
20
16
12
8
2000
I
D
= 30A
V
= 0V,
f = 1MHz
C
GS
C
= C + C
SHORTED
ds
iss
gs
gd ,
gd
V
V
V
= 48V
= 30V
= 12V
C
= C
gd
DS
DS
DS
rss
C
= C + C
1600
1200
800
400
0
oss ds
C
iss
C
C
oss
4
FOR TEST CIRCUIT
SEE FIGURE 13
rss
0
1
10
100
0
10
20
30
40
50
V
, Drain-to-Source Voltage (V)
Q
, Total Gate Charge (nC)
DS
G
Fig 6. Typical Gate Charge Vs.
Fig 5. Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
1000
1000
100
10
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
100
10
1
10us
°
T = 175 C
J
100us
1ms
°
T = 25 C
J
10ms
°
= 25 C
T
C
°
T
= 175 C
J
V
= 0 V
Single Pulse
GS
1.6
0.1
0.0
1
0.4
SD
0.8
1.2
2.0
1
10
100
V
,Source-to-Drain Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
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IRFIZ34V
20
15
10
5
RD
VDS
VGS
10V
D.U.T.
RG
+VDD
-
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
0
25
50
75
100
125
150
175
°
, Case Temperature ( C)
T
C
10%
V
GS
Fig 9. Maximum Drain Current Vs.
t
t
r
t
t
f
d(on)
d(off)
Case Temperature
Fig 10b. Switching Time Waveforms
10
D = 0.50
0.20
1
0.10
0.05
0.02
0.01
P
DM
SINGLE PULSE
(THERMAL RESPONSE)
0.1
t
1
t
2
Notes:
1. Duty factor D = t / t
1
2
2. Peak T = P
x Z
+ T
thJC C
J
DM
0.01
0.00001
0.0001
0.001
0.01
0.1
1
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFIZ34V
160
120
80
I
15V
D
TOP
12A
21A
30A
BOTTOM
D RIVER
L
V
DS
D.U .T
R
+
G
V
DD
-
I
A
AS
20V
0.01
Ω
t
p
Fig 12a. Unclamped Inductive Test Circuit
40
V
(BR)DSS
t
p
0
25
50
75
100
125
150
175
°
Starting T , Junction Temperature ( C)
J
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I
AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
.3µF
Q
G
+
10 V
V
DS
D.U.T.
-
Q
Q
GD
GS
V
GS
V
G
3mA
I
I
D
G
Current Sampling Resistors
Charge
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
6
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IRFIZ34V
Peak Diode Recovery dv/dt Test Circuit
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T*
-
+
-
-
+
RG
• dv/dt controlled by RG
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
+
-
VDD
VGS
* Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
Period
Period
D =
P.W.
V
[
=10V
] ***
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
[
[
]
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
]
SD
Ripple ≤ 5%
*** VGS = 5.0V for Logic Level and 3V Drive Devices
Fig 14. For N-channel HEXFET® power MOSFETs
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7
IRFIZ34V
Package Outline
TO-220 Full-pak
Dimensions are shown in millimeters (inches)
10.60 (.417)
10.40 (.409)
3.40 (.133)
4.80 (.189)
4.60 (.181)
ø
3.10 (.123)
- A -
2.80 (.110)
2.60 (.102)
3.70 (.145)
3.20 (.126)
LEAD AS SIGN MEN TS
1 - GATE
7.10 (.280)
6.70 (.263)
2 - DRAIN
3 - SOU RCE
16.00 (.630)
15.80 (.622)
1.15 (.045)
NOTES:
MIN.
1
D IMENSION ING & TOLERANCING
PER ANSI Y14.5M , 1982
1
2
3
2
C ONTROLLING D IM ENSION : INCH .
3.30 (.130)
3.10 (.122)
- B
-
13.70 (.540)
13.50 (.530)
C
D
A
B
0.48 (.019)
0.44 (.017)
0.90 (.035)
0.70 (.028)
3X
3X
1.40 (.055)
3X
1.05 (.042)
2.85 (.112)
2.65 (.104)
0.25 (.010)
A
M
B
M
M IN IM UM C REE PAGE
D ISTANCE BETW EEN
A-B-C-D = 4.80 (.189)
2.54 (.100)
2X
Part Marking Information
TO-220 Full-pak
EXAM PLE : TH IS IS AN IRFI840G
W ITH ASSEMBLY
A
LO T COD E E401
PAR T N UMBER
IN TER NATIONAL
RECTIFIER
LO G O
IRFI840G
E401 9245
A SSEMBLY
DATE CO DE
(YYW W )
LO T
COD E
YY
=
YEAR
= W EEK
W W
Data and specifications subject to change without notice.
This product has been designed and qualified for the industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.12/00
8
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