IRFIZ48VPBF [INFINEON]
HEXFET Power MOSFET; HEXFET功率MOSFET
| 型号： | IRFIZ48VPBF |
| 厂家： | 
Infineon |
| 描述： | HEXFET Power MOSFET |
| 文件： | 总8页 (文件大小：97K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD-94072
IRFIZ48V
HEXFET® Power MOSFET
l Advanced Process Technology
l Ultra Low On-Resistance
l Isolated Package
D
VDSS = 60V
l High Voltage Isolation = 2.5KVRMS
l Fast Switching
RDS(on) = 12mΩ
G
l Fully Avalanche Rated
l Optimized for SMPS Applications
ID = 39A
S
Description
Advanced HEXFET® Power MOSFETs from International
Rectifier utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized
device design that HEXFET power MOSFETs are well
known for, provides the designer with an extremely efficient
and reliable device for use in a wide variety of applications.
The TO-220 Fullpak eliminates the need for additional
insulating hardware in commercial-industrial applications.
The moulding compound used provides a high isolation
capability and a low thermal resistance between the tab and
external heatsink. This isolation is equivalent to using a 100
micron mica barrier with standard TO-220 product. The
Fullpak is mounted to a heatsink using a single clip or by a
single screw fixing.
TO-220 FULLPAK
Absolute Maximum Ratings
Parameter
Max.
39
Units
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
27
A
290
43
PD @TC = 25°C
Power Dissipation
W
W/°C
V
Linear Derating Factor
0.29
± 20
72
VGS
IAR
Gate-to-Source Voltage
Avalanche Current
A
EAR
dv/dt
TJ
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
15
mJ
V/ns
5.3
-55 to + 175
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 srew
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
Junction-to-Case
Junction-to-Ambient
Typ.
–––
Max.
3.5
65
Units
°C/W
RθJC
RθJA
–––
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1
02/12/01
IRFIZ48V
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
60 ––– –––
Conditions
VGS = 0V, ID = 250µA
V(BR)DSS
Drain-to-Source Breakdown Voltage
V
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.064 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on)
VGS(th)
gfs
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
––– ––– 12.0 mΩ VGS = 10V, ID = 43A
2.0
35
––– 4.0
V
S
VDS = VGS, ID = 250µA
Forward Transconductance
––– –––
VDS = 25V, ID = 43A
VDS = 60V, VGS = 0V
––– ––– 25
––– ––– 250
––– ––– 100
––– ––– -100
––– ––– 110
––– ––– 29
––– ––– 36
IDSS
Drain-to-Source Leakage Current
µA
nA
VDS = 48V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
VGS = 20V
IGSS
VGS = -20V
ID = 72A
Qg
Qgs
Qgd
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
nC VDS = 48V
VGS = 10V, See Fig. 6 and 13
–––
7.6 –––
VDD = 30V
––– 200 –––
––– 157 –––
––– 166 –––
ID = 72A
ns
td(off)
tf
Turn-Off Delay Time
Fall Time
RG = 9.1Ω
RD = 0.34Ω, See Fig. 10
Between lead,
6mm (0.25in.)
D
LD
LS
Internal Drain Inductance
Internal Source Inductance
–––
–––
4.5 –––
–––
nH
G
from package
7.5
and center of die contact
VGS = 0V
S
Ciss
Coss
Crss
Input Capacitance
––– 1985 –––
––– 496 –––
Output Capacitance
VDS = 25V
Reverse Transfer Capacitance
–––
91 –––
pF
ƒ = 1.0MHz, See Fig. 5
Eas
Single Pulse Avalanche Energy
––– 780ꢀ170 mJ IAS = 72A, L = 64mH
Source-Drain Ratings and Characteristics
Parameter
Continuous Source Current
(Body Diode)
Min. Typ. Max. Units
Conditions
MOSFET symbol
D
IS
39
––– –––
showing the
A
G
ISM
Pulsed Source Current
(Body Diode)
integral reverse
p-n junction diode.
––– ––– 290
S
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
––– ––– 2.0
––– 70 100
––– 155 233
V
TJ = 25°C, IS = 72A, VGS = 0V
TJ = 25°C, IF = 72A
ns
Qrr
ton
nC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
ꢀThis is a typical value at device destruction and represents
operation outside rated limits.
max. junction temperature. ( See fig. 11 )
This is a calculated value limited to TJ = 175°C .
Uses IRFZ48V data and test conditions.
t = 60s, f = 60Hz
Starting TJ = 25°C, L = 64µH
RG = 25Ω, IAS = 72A. (See Figure 12)
ISD ≤ 72A, di/dt ≤ 151A/µs, VDD ≤ V(BR)DSS
TJ ≤ 175°C
,
Pulse width ≤ 300µs; duty cycle ≤ 2%.
2
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IRFIZ48V
1000
100
10
1000
100
10
VGS
15V
VGS
15V
TOP
TOP
10V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM4.5V
BOTTOM4.5V
4.5V
4.5V
20µs PULSE WIDTH
20µs PULSE WIDTH
°
T = 25 C
J
°
T = 175 C
J
1
0.1
1
0.1
1
10
100
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
3.0
1000
72A
=
I
D
°
T = 25 C
2.5
2.0
1.5
1.0
0.5
0.0
J
°
T = 175 C
J
100
10
V
= 25V
DS
20µs PULSE WIDTH
V
=10V
GS
1
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
4
6
8
10 12 14
°
T , Junction Temperature( C)
J
V
, Gate-to-Source Voltage (V)
GS
Fig 4. Normalized On-Resistance
Fig 3. Typical Transfer Characteristics
Vs. Temperature
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3
IRFIZ48V
20
15
10
5
4000
I
D
=
72A
V
C
= 0V,
f = 1 MHZ
GS
V
V
V
= 48V
= 30V
= 12V
= C + C , C SHORTED
DS
DS
DS
is
gs
gd ds
C
C
= C
rss
oss
gd
= C + C
ds gd
3000
2000
1000
Ciss
Coss
Crss
0
1
0
0
20
40
60
80
100
120
10
100
Q
, Total Gate Charge (nC)
G
V
, Drain-to-Source Voltage (V)
DS
Fig 5. Typical Capacitance Vs.
Fig 6. Typical Gate Charge Vs.
Drain-to-Source Voltage
Gate-to-Source Voltage
1000
1000
100
10
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
°
T = 175 C
J
10us
100
10
1
°
100us
T = 25 C
J
1ms
1
10ms
°
T = 25 C
C
°
T = 175 C
Single Pulse
J
V
= 0 V
GS
0.1
0.2
1
10
100
1000
0.6
1.0
1.4
1.8
V
, Drain-to-Source Voltage (V)
V
,Source-to-Drain Voltage (V)
DS
SD
Fig 7. Typical Source-Drain Diode
Fig 8. Maximum Safe Operating Area
Forward Voltage
4
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IRFIZ48V
RD
VDS
40
30
20
10
0
VGS
10V
D.U.T.
RG
+
-
VDD
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
25
50
75
100
125
150
175
°
, Case Temperature ( C)
T
10%
C
V
GS
t
t
r
t
t
f
d(on)
d(off)
Fig 9. Maximum Drain Current Vs.
Fig 10b. Switching Time Waveforms
Case Temperature
10
D = 0.50
1
0.20
0.10
0.05
P
DM
0.02
0.01
0.1
t
1
t
2
SINGLE PULSE
(THERMAL RESPONSE)
Notes:
1. Duty factor D = t / t
1
2
2. Peak T = P
J
x Z
+ T
thJC C
DM
0.01
0.00001
0.0001
0.001
0.01
0.1
1
10
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFIZ48V
400
300
200
100
0
I
D
15V
TOP
29A
51A
BOTTOM 72A
D RIV ER
L
V
D S
D .U .T
R
+
G
V
D D
-
I
A
AS
20V
0.01
Ω
t
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR )D SS
t
p
25
50
75
100
125
150
175
°
Starting T , Junction Temperature ( C)
J
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I
AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
.3µF
Q
G
+
10 V
V
DS
D.U.T.
-
Q
Q
GD
GS
V
GS
V
G
3mA
I
I
D
G
Current Sampling Resistors
Charge
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
6
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IRFIZ48V
Peak Diode Recovery dv/dt Test Circuit
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T
-
+
-
-
+
RG
• dv/dt controlled by RG
+
-
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VDD
Driver Gate Drive
P.W.
P.W.
Period
Period
D =
V
=10V
*
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS Power MOSFETS
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7
IRFIZ48V
Package Outline
TO-220 Fullpak Outline
Dimensions are shown in millimeters (inches)
10.60 (.417)
10.40 (.409)
3.40 (.133)
3.10 (.123)
4.80 (.189)
4.60 (.181)
ø
2.80 (.110)
2.60 (.102)
- A
-
3.70 (.145)
3.20 (.126)
LEAD ASSIGNMENTS
1 - GATE
7.10 (.280)
6.70 (.263)
2 - DRAIN
3 - SOURCE
16.00 (.630)
15.80 (.622)
1.15 (.045)
MIN.
NOTES:
1
DIMENSIONING
&
TOLERANCING
PER ANSI Y14.5M, 1982
1
2
3
2
CONTROLLING DIMENSION: INCH.
3.30 (.130)
3.10 (.122)
- B
-
13.70 (.540)
13.50 (.530)
C
D
A
B
0.48 (.019)
0.44 (.017)
0.90 (.035)
3X
0.70 (.028)
3X
1.40 (.055)
1.05 (.042)
3X
2.85 (.112)
2.65 (.104)
0.25 (.010)
A
M
B
M
MINIMUM CREEPAGE
DISTANCE BETW EEN
A-B-C-D = 4.80 (.189)
2.54 (.100)
2X
Part Marking Information
TO-220 Fullpak
EXAM PLE : TH IS IS AN IR FI840G
W ITH ASSEM BLY
A
LO T CO D E E401
PART N UMB ER
INTERN ATIO NAL
RECTIFIER
LO GO
IR FI840G
E401 9245
ASSEM BLY
D ATE CO DE
(YYW W )
LOT
CO DE
YY
=
YE AR
= W EE K
W W
Data and specifications subject to change without notice.
This product has been designed and qualified for the industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.01/01
8
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