IRFP4368 [INFINEON]

The StrongIRFET™ power MOSFET family is optimized for low RDS(on) and high current capability. The devices are ideal for low frequency applications requiring performance and ruggedness. The comprehensive portfolio addresses a broad range of applications including DC motors, battery management systems, inverters, and DC-DC converters. ;
IRFP4368
型号: IRFP4368
厂家: Infineon    Infineon
描述:

The StrongIRFET™ power MOSFET family is optimized for low RDS(on) and high current capability. The devices are ideal for low frequency applications requiring performance and ruggedness. The comprehensive portfolio addresses a broad range of applications including DC motors, battery management systems, inverters, and DC-DC converters. 

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PD - 97322  
IRFP4368PbF  
Applications  
l High Efficiency Synchronous Rectification in  
HEXFET® Power MOSFET  
SMPS  
l Uninterruptible Power Supply  
l High Speed Power Switching  
l Hard Switched and High Frequency Circuits  
D
S
VDSS  
RDS(on) typ.  
max.  
ID (Silicon Limited)  
75V  
1.46mΩ  
1.85mΩ  
G
350A  
c
ID (Package Limited)  
195A  
Benefits  
l Improved Gate, Avalanche and Dynamic  
dv/dt Ruggedness  
l Fully Characterized Capacitance and  
Avalanche SOA  
D
l Enhanced body diode dV/dt and dI/dt  
Capability  
S
D
G
TO-247AC  
G
D
S
Gate  
Drain  
Source  
Absolute Maximum Ratings  
Symbol  
Parameter  
Max.  
350c  
250c  
195  
Units  
ID @ TC = 25°C  
Continuous Drain Current, VGS @ 10V (Silicon Limited)  
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited)  
A
ID @ TC = 25°C  
IDM  
Continuous Drain Current, VGS @ 10V (Wire Bond Limited)  
Pulsed Drain Current d  
1280  
520  
PD @TC = 25°C  
W
Maximum Power Dissipation  
Linear Derating Factor  
3.4  
W/°C  
V
VGS  
20  
Gate-to-Source Voltage  
13  
Peak Diode Recovery f  
dv/dt  
TJ  
V/ns  
°C  
-55 to + 175  
Operating Junction and  
TSTG  
Storage Temperature Range  
Soldering Temperature, for 10 seconds  
(1.6mm from case)  
300  
10lbxin (1.1Nxm)  
Mounting torque, 6-32 or M3 screw  
Avalanche Characteristics  
Single Pulse Avalanche Energy e  
EAS (Thermally limited)  
430  
mJ  
A
Avalanche Currentꢀd  
IAR  
See Fig. 14, 15, 22a, 22b  
Repetitive Avalanche Energy g  
EAR  
mJ  
Thermal Resistance  
Symbol  
Parameter  
Junction-to-Case k  
Typ.  
–––  
Max.  
0.29  
–––  
40  
Units  
RθJC  
RθCS  
RθJA  
0.24  
–––  
°C/W  
Case-to-Sink, Flat Greased Surface  
Junction-to-Ambient  
jk  
www.irf.com  
1
06/02/08  
IRFP4368PbF  
Static @ TJ = 25°C (unless otherwise specified)  
Symbol  
V(BR)DSS  
Parameter  
Drain-to-Source Breakdown Voltage  
Breakdown Voltage Temp. Coefficient  
Static Drain-to-Source On-Resistance  
Gate Threshold Voltage  
Min. Typ. Max. Units  
75 ––– –––  
––– 0.077 ––– V/°C Reference to 25°C, ID = 5mAd  
Conditions  
VGS = 0V, ID = 250µA  
V
V(BR)DSS/TJ  
RDS(on)  
––– 1.46 1.85  
VGS = 10V, ID = 195A g  
mΩ  
V
VGS(th)  
2.0  
–––  
4.0  
20  
VDS = VGS, ID = 250µA  
VDS = 75V, VGS = 0V  
VDS = 75V, VGS = 0V, TJ = 125°C  
VGS = 20V  
V
IDSS  
Drain-to-Source Leakage Current  
––– –––  
µA  
––– ––– 250  
––– ––– 100  
––– ––– -100  
IGSS  
Gate-to-Source Forward Leakage  
Gate-to-Source Reverse Leakage  
nA  
GS = -20V  
Dynamic @ TJ = 25°C (unless otherwise specified)  
Symbol  
gfs  
Parameter  
Forward Transconductance  
Total Gate Charge  
Min. Typ. Max. Units  
Conditions  
VDS = 50V, ID = 195A  
650 ––– –––  
S
Qg  
––– 380 570  
nC ID = 195A  
VDS = 38V  
Qgs  
Qgd  
Qsync  
Gate-to-Source Charge  
–––  
79  
–––  
Gate-to-Drain ("Miller") Charge  
Total Gate Charge Sync. (Qg - Qgd)  
––– 105 –––  
––– 275 –––  
VGS = 10V g  
ID = 195A, VDS =0V, VGS = 10V  
RG(int)  
td(on)  
–––  
Internal Gate Resistance  
Turn-On Delay Time  
Rise Time  
0.80 –––  
43 –––  
–––  
ns VDD = 49V  
ID = 195A  
RG = 2.7Ω  
VGS = 10V g  
tr  
––– 220 –––  
––– 170 –––  
––– 260 –––  
––– 19230 –––  
––– 1670 –––  
––– 770 –––  
––– 1700 –––  
––– 1410 –––  
td(off)  
Turn-Off Delay Time  
Fall Time  
tf  
Ciss  
Input Capacitance  
Output Capacitance  
Reverse Transfer Capacitance  
pF  
V
GS = 0V  
Coss  
VDS = 50V  
Crss  
ƒ = 100kHz  
Coss eff. (ER)  
Coss eff. (TR)  
V
GS = 0V, VDS = 0V to 60V i  
GS = 0V, VDS = 0V to 60V h  
Effective Output Capacitance (Energy Related)  
i
V
Effective Output Capacitance (Time Related)  
h
Diode Characteristics  
Symbol  
Parameter  
Min. Typ. Max. Units  
Conditions  
IS  
Continuous Source Current  
––– –––  
A
MOSFET symbol  
D
S
350  
c
(Body Diode)  
showing the  
integral reverse  
G
ISM  
Pulsed Source Current  
(Body Diode)ꢁdi  
Diode Forward Voltage  
Reverse Recovery Time  
––– ––– 1280  
p-n junction diode.  
TJ = 25°C, IS = 195A, VGS = 0V g  
VSD  
trr  
––– ––– 1.3  
V
TJ = 25°C  
TJ = 125°C  
TJ = 25°C  
TJ = 125°C  
TJ = 25°C  
VR = 64V,  
––– 130 200  
––– 140 210  
––– 450 680  
––– 530 800  
ns  
IF = 195A  
di/dt = 100A/µs g  
Qrr  
Reverse Recovery Charge  
nC  
IRRM  
ton  
Reverse Recovery Current  
Forward Turn-On Time  
–––  
9.1  
–––  
A
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)  
Notes:  
 Calculated continuous current based on maximum allowable junction  
temperature. Bond wire current limit is 195A. Note that current  
limitations arising from heating of the device leads may occur with  
„ ISD 195A, di/dt 1740A/µs, VDD V(BR)DSS, TJ 175°C.  
Pulse width 400µs; duty cycle 2%.  
† Coss eff. (TR) is a fixed capacitance that gives the same charging time  
some lead mounting arrangements. Refer to App Notes (AN-1140).  
‚ Repetitive rating; pulse width limited by max. junction  
temperature.  
as Coss while VDS is rising from 0 to 80% VDSS  
‡ Coss eff. (ER) is a fixed capacitance that gives the same energy as  
Coss while VDS is rising from 0 to 80% VDSS  
ˆ When mounted on 1" square PCB (FR-4 or G-10 Material). For recom  
.
.
ƒ Limited by TJmax, starting TJ = 25°C, L = 0.022mH  
mended footprint and soldering techniques refer to application note #AN-994.  
‰ Rθ is measured at TJ approximately 90°C.  
RG = 25, IAS = 195A, VGS =10V. Part not recommended for use  
above this value.  
2
www.irf.com  
IRFP4368PbF  
1000  
100  
10  
1000  
100  
10  
VGS  
15V  
10V  
8.0V  
7.0V  
6.0V  
5.5V  
4.8V  
4.5V  
VGS  
15V  
10V  
8.0V  
7.0V  
6.0V  
5.5V  
4.8V  
4.5V  
TOP  
TOP  
BOTTOM  
BOTTOM  
4.5V  
4.5V  
60µs PULSE WIDTH  
Tj = 25°C  
60µs PULSE WIDTH  
Tj = 175°C  
0.1  
1
10  
100  
0.1  
1
10  
100  
V
, Drain-to-Source Voltage (V)  
DS  
V
, Drain-to-Source Voltage (V)  
DS  
Fig 1. Typical Output Characteristics  
Fig 2. Typical Output Characteristics  
1000  
100  
10  
2.5  
2.0  
1.5  
1.0  
0.5  
I
= 195A  
= 10V  
V
= 25V  
D
DS  
60µs PULSE WIDTH  
V
GS  
T
= 175°C  
J
T
= 25°C  
J
1.0  
1
2
3
4
5
6
7
-60 -40 -20  
T
0
20 40 60 80 100120140160180  
, Junction Temperature (°C)  
J
V
, Gate-to-Source Voltage (V)  
GS  
Fig 4. Normalized On-Resistance vs. Temperature  
Fig 3. Typical Transfer Characteristics  
1E+006  
100000  
10000  
1000  
12.0  
V
C
= 0V,  
f = 1 MHZ  
GS  
I = 195A  
D
= C + C , C SHORTED  
iss  
gs gd ds  
C
= C  
10.0  
rss  
gd  
V
V
= 60V  
= 38V  
DS  
DS  
C
= C + C  
oss  
ds  
gd  
8.0  
6.0  
4.0  
2.0  
0.0  
C
C
iss  
oss  
C
rss  
100  
1
10  
, Drain-to-Source Voltage (V)  
100  
0
50 100 150 200 250 300 350 400  
, Total Gate Charge (nC)  
V
Q
DS  
G
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage  
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage  
www.irf.com  
3
IRFP4368PbF  
10000  
1000  
100  
10  
1000  
OPERATION IN THIS AREA  
LIMITED BY R (on)  
DS  
T
= 175°C  
J
100  
10  
1
100µsec  
T
= 25°C  
J
1msec  
10msec  
Tc = 25°C  
Tj = 175°C  
Single Pulse  
V
= 0V  
GS  
DC  
10  
1
0.1  
1
100  
0.0  
0.4  
0.8  
1.2  
1.6  
2.0  
V
, Drain-to-Source Voltage (V)  
V
, Source-to-Drain Voltage (V)  
DS  
SD  
Fig 8. Maximum Safe Operating Area  
Fig 7. Typical Source-Drain Diode Forward Voltage  
350  
95  
90  
85  
80  
75  
70  
Id = 5.0mA  
300  
250  
200  
150  
100  
50  
Limited By Package  
0
25  
50  
75  
100  
125  
150  
175  
-60 -40 -20  
0
T
20 40 60 80 100120140160180  
, Temperature ( °C )  
J
T
, Case Temperature (°C)  
C
Fig 10. Drain-to-Source Breakdown Voltage  
Fig 9. Maximum Drain Current vs. Case Temperature  
6.0  
2000  
I
D
TOP  
33A  
53A  
5.0  
4.0  
3.0  
2.0  
1.0  
0.0  
1500  
1000  
500  
0
BOTTOM 195A  
10  
20  
V
30  
40  
50  
60  
70  
80  
25  
50  
75  
100  
125  
150  
175  
Starting T , Junction Temperature (°C)  
J
Drain-to-Source Voltage (V)  
DS,  
Fig 12. Maximum Avalanche Energy vs. DrainCurrent  
Fig 11. Typical COSS Stored Energy  
4
www.irf.com  
IRFP4368PbF  
1
0.1  
D = 0.50  
0.20  
0.10  
0.05  
R1  
R1  
R2  
R2  
R3  
R3  
R4  
R4  
Ri (°C/W) τi (sec)  
0.01  
0.02  
0.01  
0.0145  
0.0661  
0.1257  
0.0838  
0.000024  
0.000148  
0.002766  
0.017517  
τ
τ
J τJ  
τ
Cτ  
1τ1  
Ci= τi/Ri  
τ
τ
τ
2τ2  
3τ3  
4τ4  
0.001  
0.0001  
SINGLE PULSE  
( THERMAL RESPONSE )  
Notes:  
1. Duty Factor D = t1/t2  
2. Peak Tj = P dm x Zthjc + Tc  
1E-006  
1E-005  
0.0001  
0.001  
0.01  
0.1  
t
, Rectangular Pulse Duration (sec)  
1
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case  
1000  
100  
10  
Duty Cycle = Single Pulse  
Allowed avalanche Current vs avalanche  
pulsewidth, tav, assuming Tj = 150°C and  
0.01  
Tstart =25°C (Single Pulse)  
0.05  
0.10  
Allowed avalanche Current vs avalanche  
pulsewidth, tav, assuming  
Tstart = 150°C.  
j = 25°C and  
∆Τ  
1
1.0E-06  
1.0E-05  
1.0E-04  
1.0E-03  
1.0E-02  
1.0E-01  
tav (sec)  
Fig 14. Typical Avalanche Current vs.Pulsewidth  
500  
400  
300  
200  
100  
0
Notes on Repetitive Avalanche Curves , Figures 14, 15:  
(For further info, see AN-1005 at www.irf.com)  
1. Avalanche failures assumption:  
Purely a thermal phenomenon and failure occurs at a temperature far in  
excess of Tjmax. This is validated for every part type.  
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.  
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.  
4. PD (ave) = Average power dissipation per single avalanche pulse.  
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase  
during avalanche).  
6. Iav = Allowable avalanche current.  
7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as  
25°C in Figure 14, 15).  
tav = Average time in avalanche.  
D = Duty cycle in avalanche = tav ·f  
TOP  
BOTTOM 1.0% Duty Cycle  
= 195A  
Single Pulse  
I
D
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)  
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC  
25  
50  
75  
100  
125  
150  
175  
Iav = 2DT/ [1.3·BV·Zth]  
Starting T , Junction Temperature (°C)  
EAS (AR) = PD (ave)·tav  
J
Fig 15. Maximum Avalanche Energy vs. Temperature  
www.irf.com  
5
IRFP4368PbF  
4.0  
3.5  
3.0  
2.5  
30  
25  
20  
15  
10  
5
I
= 72A  
= 64V  
F
V
R
T = 25°C  
J
T = 125°C  
J
I
I
I
= 250µA  
= 1.0mA  
= 1.0A  
D
D
D
2.0  
1.5  
1.0  
0.5  
-75 -50 -25  
0
25 50 75 100 125 150 175 200  
, Temperature ( °C )  
0
200  
400  
600  
800  
1000  
T
di /dt (A/µs)  
J
F
Fig. 17 - Typical Recovery Current vs. dif/dt  
Fig 16. Threshold Voltage vs. Temperature  
30  
25  
20  
15  
10  
5
1000  
920  
840  
760  
680  
600  
520  
440  
360  
280  
200  
I
= 108A  
= 64V  
I
= 72A  
V = 64V  
R
F
F
V
R
T = 25°C  
T = 25°C  
J
J
T = 125°C  
J
T = 125°C  
J
0
200  
400  
600  
800  
1000  
0
200  
400  
600  
800  
1000  
di /dt (A/µs)  
di /dt (A/µs)  
F
F
Fig. 18 - Typical Recovery Current vs. dif/dt  
Fig. 19 - Typical Stored Charge vs. dif/dt  
1000  
I
= 108A  
= 64V  
F
920  
840  
760  
680  
600  
520  
440  
360  
280  
200  
V
R
T = 25°C  
J
T = 125°C  
J
0
200  
400  
600  
800  
1000  
di /dt (A/µs)  
F
Fig. 20 - Typical Stored Charge vs. dif/dt  
6
www.irf.com  
IRFP4368PbF  
Driver Gate Drive  
P.W.  
P.W.  
Period  
Period  
D =  
D.U.T  
+
*
=10V  
V
GS  
ƒ
Circuit Layout Considerations  
Low Stray Inductance  
Ground Plane  
Low Leakage Inductance  
Current Transformer  
-
D.U.T. I Waveform  
SD  
+
‚
-
Reverse  
Recovery  
Current  
Body Diode Forward  
„
Current  
di/dt  
-
+
D.U.T. V Waveform  
DS  
Diode Recovery  
dv/dt  

V
DD  
VDD  
Re-Applied  
Voltage  
dv/dt controlled by RG  
RG  
+
-
Body Diode  
Forward Drop  
Driver same type as D.U.T.  
ISD controlled by Duty Factor "D"  
D.U.T. - Device Under Test  
Inductor Current  
I
SD  
Ripple 5%  
* VGS = 5V for Logic Level Devices  
Fig 20. Peak Diode Recovery dv/dt Test Circuit for N-Channel  
HEXFET® Power MOSFETs  
V
(BR)DSS  
15V  
t
p
DRIVER  
+
L
V
DS  
D.U.T  
R
G
V
DD  
-
I
A
AS  
V
2
GS  
0.01Ω  
t
p
I
AS  
Fig 21b. Unclamped Inductive Waveforms  
Fig 21a. Unclamped Inductive Test Circuit  
LD  
VDS  
VDS  
90%  
+
-
VDD  
10%  
VGS  
D.U.T  
VGS  
Pulse Width < 1µs  
Duty Factor < 0.1%  
td(on)  
td(off)  
tr  
tf  
Fig 22a. Switching Time Test Circuit  
Fig 22b. Switching Time Waveforms  
Id  
Vds  
Vgs  
L
VCC  
DUT  
Vgs(th)  
0
1K  
Qgs1  
Qgs2  
Qgd  
Qgodr  
Fig 23a. Gate Charge Test Circuit  
Fig 23b. Gate Charge Waveform  
www.irf.com  
7
IRFP4368PbF  
TO-247AC Package Outline  
Dimensions are shown in millimeters (inches)  
TO-247AC Part Marking Information  
TO-247AC package is not recommended for Surface Mount Application.  
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/  
Data and specifications subject to change without notice.  
This product has been designed and qualified for the Industrial market.  
Qualification Standards can be found on IR’s Web site.  
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105  
TAC Fax: (310) 252-7903  
Visit us at www.irf.com for sales contact information. 06/08  
www.irf.com  
8
IMPORTANT NOTICE  
The information given in this document shall in no For further information on the product, technology,  
event be regarded as a guarantee of conditions or delivery terms and conditions and prices please  
characteristics (“Beschaffenheitsgarantie”) .  
contact your nearest Infineon Technologies office  
(www.infineon.com).  
With respect to any examples, hints or any typical  
values stated herein and/or any information  
regarding the application of the product, Infineon  
Technologies hereby disclaims any and all  
warranties and liabilities of any kind, including  
without limitation warranties of non-infringement  
of intellectual property rights of any third party.  
WARNINGS  
Due to technical requirements products may  
contain dangerous substances. For information on  
the types in question please contact your nearest  
Infineon Technologies office.  
In addition, any information given in this document  
is subject to customers compliance with its  
obligations stated in this document and any  
applicable legal requirements, norms and  
standards concerning customers products and any  
use of the product of Infineon Technologies in  
customers applications.  
Except as otherwise explicitly approved by Infineon  
Technologies in a written document signed by  
authorized  
representatives  
of  
Infineon  
Technologies, Infineon Technologies’ products may  
not be used in any applications where a failure of  
the product or any consequences of the use thereof  
can reasonably be expected to result in personal  
injury.  
The data contained in this document is exclusively  
intended for technically trained staff. It is the  
responsibility of customers technical departments  
to evaluate the suitability of the product for the  
intended application and the completeness of the  
product information given in this document with  
respect to such application.  

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