IRFR3418PBF [INFINEON]
HEXFET Power MOSFET; HEXFET功率MOSFET
| 型号： | IRFR3418PBF |
| 厂家： | 
Infineon |
| 描述： | HEXFET Power MOSFET |
| 文件： | 总10页 (文件大小：236K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 95516A
IRFR3418PbF
IRFU3418PbF
HEXFET® Power MOSFET
Applications
l High frequency DC-DC converters
VDSS RDS(on) Max
ID
l Lead-Free
14m
80V
30A
Benefits
l Low Gate-to-Drain Charge to Reduce
Switching Losses
l Fully Characterized Capacitance Including
Effective COSS to Simplify Design, (See
App. Note AN1001)
l Fully Characterized Avalanche Voltage
and Current
D-Pak
IRFR3418
I-Pak
IRFU3418
Absolute Maximum Ratings
Parameter
Max.
80
Units
VDS
VGS
Drain-to-Source Voltage
V
Gate-to-Source Voltage
± 20
70
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
I
I
I
@ T = 25°C
C
D
D
@ T = 100°C
C
50
280
140
3.8
A
DM
P
P
@T = 25°C
C
Maximum Power Dissipation
Maximum Power Dissipation
W
D
D
@T = 25°C
A
Linear Derating Factor
0.95
W/°C
dv/dt
T
J
Peak Diode Recovery dv/dt
Operating Junction and
5.2
V/ns
°C
-55 to + 175
T
Storage Temperature Range
STG
Soldering Temperature, for 10 seconds
300 (1.6mm from case )
Thermal Resistance
Parameter
Typ.
–––
–––
–––
Max.
1.05
40
Units
RθJC
RθJA
RθJA
Junction-to-Case
Junction-to-Ambient (PCB Mount) *
Junction-to-Ambient
°C/W
110
Notes through are on page 10
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1
12/03/04
IRFR/U3418PbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
Conditions
V(BR)DSS
∆V(BR)DSS/∆TJ
RDS(on)
Drain-to-Source Breakdown Voltage
80
–––
0.08
11.5
–––
–––
–––
–––
–––
–––
V
VGS = 0V, ID = 250µA
Breakdown Voltage Temp. Coefficient –––
––– V/°C Reference to 25°C, ID = 1mA
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
–––
3.5
14
5.5
V
GS = 10V, ID = 18A
VDS = VGS, ID = 250µA
DS = 80V, VGS = 0V
VDS = 64V, VGS = 0V, TJ = 150°C
GS = 20V
VGS = -20V
mΩ
V
VGS(th)
IDSS
Drain-to-Source Leakage Current
–––
–––
–––
–––
1.0
µA
V
250
100
-100
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
nA
V
Dynamic @ TJ = 25°C (unless otherwise specified)
Parameter
Forward Transconductance
Total Gate Charge
Min. Typ. Max. Units
Conditions
VDS = 25V, ID = 18A
D = 18A
gfs
66
–––
63
23
23
24
72
41
27
–––
94
S
Qg
–––
–––
–––
–––
–––
–––
–––
I
Qgs
Qgd
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
–––
–––
–––
–––
–––
–––
nC VDS = 40V
VGS = 10V
VDD = 40V
ID = 18A
td(off)
tf
Turn-Off Delay Time
Fall Time
ns RG = 6.8Ω
VGS = 10V
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Input Capacitance
––– 3510 –––
VGS = 0V
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
–––
–––
330
190
–––
–––
V
DS = 25V
pF ƒ = 1.0MHz
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
––– 1220 –––
–––
–––
240
360
–––
–––
VGS = 0V, VDS = 64V, ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 64V
Avalanche Characteristics
Parameter
Single Pulse Avalanche Energy
Typ.
–––
–––
Max.
260
18
Units
mJ
EAS
IAR
Avalanche Current
A
Diode Characteristics
Parameter
Min. Typ. Max. Units
Conditions
D
I
I
Continuous Source Current
–––
–––
70
A
MOSFET symbol
S
(Body Diode)
Pulsed Source Current
showing the
integral reverse
G
–––
–––
280
SM
S
(Body Diode)
p-n junction diode.
V
t
Diode Forward Voltage
–––
–––
–––
–––
57
1.3
–––
–––
V
T = 25°C, I = 18A, V = 0V
J S GS
SD
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
ns T = 150°C, I = 18A, VDD = 25V
J F
rr
di/dt = 100A/µs
Q
t
130
nC
rr
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
on
2
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IRFR/U3418PbF
1000
100
10
1000
100
10
VGS
15V
10V
9.0V
8.0V
7.5V
7.0V
6.5V
6.0V
VGS
15V
10V
9.0V
8.0V
7.5V
7.0V
6.5V
6.0V
TOP
TOP
BOTTOM
BOTTOM
1
6.0V
0.1
6.0V
1
0.01
0.001
20µs PULSE WIDTH
Tj = 175°C
20µs PULSE WIDTH
Tj = 25°C
0.1
0.1
1
10
100
1000
0.1
1
10
100
1000
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
2.5
1000.00
100.00
70A
=
I
D
2.0
1.5
1.0
0.5
0.0
T
= 175°C
J
10.00
1.00
0.10
0.01
T
= 25°C
J
V
= 25V
DS
20µs PULSE WIDTH
V
=10V
GS
20 40 60 80 100 120 140 160 180
-60 -40 -20
0
5
6
7
8
9
10 11 12 13 14 15
TJ, Junction Temperature (°C)
V
, Gate-to-Source Voltage (V)
GS
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
Vs. Temperature
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3
IRFR/U3418PbF
12.0
10.0
8.0
100000
V
= 0V,
f = 1 MHZ
GS
I = 18A
D
C
= C + C , C SHORTED
iss
gs gd ds
V
V
V
= 64V
= 40V
= 16V
C
= C
gd
DS
DS
DS
rss
C
= C + C
oss
ds gd
10000
1000
100
C
iss
6.0
C
C
oss
4.0
rss
2.0
10
0.0
1
10
, Drain-to-Source Voltage (V)
100
0
10
20
30
40
50
60
70
V
DS
Q
Total Gate Charge (nC)
G
Fig 6. Typical Gate Charge Vs.
Fig 5. Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
1000.00
100.00
10.00
1.00
10000
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R
(on)
DS
T
= 175°C
J
100µsec
T
= 25°C
J
1msec
1
T
= 25°C
C
Tj = 175°C
Single Pulse
10msec
V
= 0V
GS
0.10
0.1
0.0
0.5
1.0
1.5
2.0
1
10
100
1000
V
, Source-toDrain Voltage (V)
V
, Drain-to-Source Voltage (V)
SD
DS
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
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IRFR/U3418PbF
RD
80
60
40
20
0
VDS
LIMITED BY PACKAGE
VGS
D.U.T.
RG
+VDD
-
VGS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
25
50
75
100
125
150
175
°
T , Case Temperature ( C)
C
10%
V
GS
t
t
r
t
t
f
Fig 9. Maximum Drain Current Vs.
d(on)
d(off)
Case Temperature
Fig 10b. Switching Time Waveforms
10
1
D = 0.50
0.20
P
2
DM
0.10
0.05
0.1
t
1
SINGLE PULSE
(THERMAL RESPONSE)
0.02
0.01
t
2
Notes:
1. Duty factor D =
t / t
1
2. Peak T =P
x Z
+ T
C
J
DM
thJC
0.01
0.00001
0.0001
0.001
0.01
0.1
1
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFR/U3418PbF
600
500
400
300
200
100
0
15V
I
D
TOP
7.3A
13A
BOTTOM 18A
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
V
GS
Ω
0.01
t
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
25
50
75
100
125
150
175
Starting TJ, Junction Temperature (°C)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I
AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
.3µF
Q
G
+
VGS
V
DS
D.U.T.
-
Q
Q
GD
GS
V
GS
V
G
3mA
I
I
D
G
Current Sampling Resistors
Charge
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
6
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IRFR/U3418PbF
Peak Diode Recovery dv/dt Test Circuit
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T
-
+
-
-
+
RG
• dv/dt controlled by RG
+
-
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VDD
Driver Gate Drive
P.W.
P.W.
Period
Period
D =
V
=10V
*
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFET® Power MOSFETs
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7
IRFR/U3418PbF
D-Pak (TO-252AA) Package Outline
D-Pak (TO-252AA) Part Marking Information
EXAMPLE: THIS IS AN IRFR120
PART NUMBER
WIT H AS S EMBLY
LOT CODE 1234
INTERNATIONAL
RECTIFIER
LOGO
DAT E CODE
YEAR 9 = 1999
WEEK 16
IRFU120
916A
ASSEMBLED ON WW 16, 1999
IN THE ASSEMBLY LINE "A"
12
34
LINE A
Note: "P" in assembly line position
ASSEMBLY
LOT CODE
indicates "Lead-F ree"
OR
PART NUMBER
DAT E CODE
P = DESIGNATES LEAD-FREE
PRODUCT (OPTIONAL)
INTERNATIONAL
RECTIFIER
LOGO
IRFU120
12 34
YEAR 9 = 1999
ASSEMBLY
LOT CODE
WEEK 16
A= ASSEMBLYSITE CODE
8
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IRFR/U3418PbF
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
PART NUMBER
EXAMPLE: THIS IS AN IRFU120
INTERNATIONAL
WIT H AS S EMBL Y
DAT E CODE
YEAR 9 = 1999
WEE K 19
RECTIFIER
LOGO
IRFU120
919A
78
LOT CODE 5678
AS SEMBLED ON WW 19, 1999
IN THE AS SEMBLY LINE "A"
56
LINE A
AS S E MB L Y
LOT CODE
Note: "P" in assembly line
pos ition indicates "L ead-F ree"
OR
PART NUMBER
DAT E CODE
P = DESIGNATES LEAD-FREE
PRODUCT (OPTIONAL)
INTERNATIONAL
RECTIFIER
LOGO
IRFU120
56 78
YEAR 9 = 1999
AS S E MB LY
LOT CODE
WEEK 19
A = AS S E MB L Y S I T E CODE
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9
IRFR/U3418PbF
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRL
TRR
16.3 ( .641 )
15.7 ( .619 )
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Notes:
Pulse width ≤ 300µs; duty cycle ≤ 2%.
ꢀ Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
Repetitive rating; pulse width limited by
max. junction temperature.
Starting TJ = 25°C, L = 1.6mH
RG = 25Ω, IAS = 18A.
Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 30A.
ISD ≤ 18A, di/dt ≤ 350A/µs, VDD ≤ V(BR)DSS
,
TJ ≤ 175°C.
* When mounted on 1" square PCB (FR-4 or G-10 Material).
For recommended footprint and soldering techniques refer to application note #AN-994.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.12/04
10
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