IRFS3006-7PPBF [INFINEON]
HEXFET Power MOSFET; HEXFET功率MOSFET
| 型号： | IRFS3006-7PPBF |
| 厂家： | 
Infineon |
| 描述： | HEXFET Power MOSFET |
| 文件： | 总9页 (文件大小：309K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 96187
IRFS3006-7PPbF
HEXFET® Power MOSFET
Applications
l High Efficiency Synchronous Rectification in SMPS
l Uninterruptible Power Supply
l High Speed Power Switching
D
VDSS
RDS(on) typ.
max.
ID (Silicon Limited)
ID (Package Limited)
60V
1.5m
2.1m
293A
240A
G
l Hard Switched and High Frequency Circuits
S
Benefits
l Improved Gate, Avalanche and Dynamic dV/dt
D
Ruggedness
l Fully Characterized Capacitance and Avalanche
SOA
l Enhanced body diode dV/dt and dI/dt Capability
l Lead-Free
S
S
S
S
S
G
D2Pak 7 Pin
G
D
S
Gate
Drain
Source
Absolute Maximum Ratings
Symbol
Parameter
Max.
293
Units
ID @ TC = 25°C
Continuous Drain Current, VGS @ 10V (Silicon Limited)
ID @ TC = 100°C
ID @ TC = 25°C
IDM
Continuous Drain Current, VGS @ 10V (Silicon Limited)
207
A
Continuous Drain Current, VGS @ 10V (Package Limited)
Pulsed Drain Current
240
1172
375
PD @TC = 25°C
W
Maximum Power Dissipation
Linear Derating Factor
2.5
W/°C
V
VGS
± 20
Gate-to-Source Voltage
11
Peak Diode Recovery
dv/dt
TJ
V/ns
-55 to + 175
Operating Junction and
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
°C
300
10lb in (1.1N m)
Mounting torque, 6-32 or M3 screw
Avalanche Characteristics
Single Pulse Avalanche Energy
EAS (Thermally limited)
303
mJ
A
Avalanche Current
IAR
See Fig. 14, 15, 22a, 22b,
Repetitive Avalanche Energy
EAR
mJ
Thermal Resistance
Symbol
Parameter
Typ.
–––
Max.
0.4
Units
RθJC
Junction-to-Case
°C/W
RθJA
–––
40
Junction-to-Ambient (PCB Mount)
www.irf.com
1
10/06/08
IRFS3006-7PPbF
Static @ TJ = 25°C (unless otherwise specified)
Symbol
V(BR)DSS
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Min. Typ. Max. Units
60 ––– –––
––– 0.07 ––– V/°C Reference to 25°C, ID = 5mA
Conditions
VGS = 0V, ID = 250µA
V
∆V(BR)DSS/∆TJ
RDS(on)
–––
2.0
1.5
2.1
4.0
20
VGS = 10V, ID = 168A
VDS = VGS, ID = 250µA
mΩ
V
VGS(th)
–––
IDSS
Drain-to-Source Leakage Current
––– –––
V
V
V
V
DS = 60V, VGS = 0V
DS = 60V, VGS = 0V, TJ = 125°C
GS = 20V
µA
––– ––– 250
––– ––– 100
––– ––– -100
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Internal Gate Resistance
nA
GS = -20V
RG(int)
–––
2.1
–––
Ω
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Parameter
Forward Transconductance
Min. Typ. Max. Units
Conditions
VDS = 25V, ID = 168A
290 ––– –––
S
Qg
Total Gate Charge
––– 200 300
ID = 168A
Qgs
Qgd
Qsync
td(on)
tr
Gate-to-Source Charge
–––
–––
37
60
–––
–––
VDS = 30V
nC
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Qg - Qgd)
VGS = 10V
––– 140 –––
ID = 168A, VDS =0V, VGS = 10V
VDD = 39V
Turn-On Delay Time
–––
–––
14
61
–––
–––
Rise Time
ID = 168A
ns
td(off)
tf
Turn-Off Delay Time
––– 118 –––
––– 69 –––
RG = 2.7Ω
VGS = 10V
Fall Time
Ciss
Coss
Crss
Input Capacitance
––– 8850 –––
––– 1007 –––
––– 525 –––
––– 1460 –––
––– 1915 –––
V
GS = 0V
Output Capacitance
VDS = 50V
Reverse Transfer Capacitance
Effective Output Capacitance (Energy Related)
Effective Output Capacitance (Time Related)
ƒ = 1.0MHz (See Fig 5)
pF
Coss eff. (ER)
oss eff. (TR)
V
GS = 0V, VDS = 0V to 48V (See Fig 11)
GS = 0V, VDS = 0V to 48V
C
V
Diode Characteristics
Symbol
Parameter
Continuous Source Current
Min. Typ. Max. Units
Conditions
MOSFET symbol
D
IS
––– ––– 293
A
(Body Diode)
showing the
G
ISM
Pulsed Source Current
(Body Diode)
integral reverse
––– ––– 1172
S
p-n junction diode.
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
––– –––
1.3
–––
–––
–––
–––
V
TJ = 25°C, IS = 168A, VGS = 0V
TJ = 25°C
TJ = 125°C
TJ = 25°C
TJ = 125°C
TJ = 25°C
VR = 51V,
–––
–––
–––
–––
44
48
51
62
ns
IF = 168A
di/dt = 100A/µs
Qrr
Reverse Recovery Charge
nC
A
IRRM
ton
Reverse Recovery Current
Forward Turn-On Time
––– 2.03 –––
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
ꢀ Pulse width ≤ 400µs; duty cycle ≤ 2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time
Calcuted continuous current based on maximum allowable junction
temperature Bond wire current limit is 240A. Note that current
limitation arising from heating of the device leds may occur with
some lead mounting arrangements.
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.021mH
RG = 25Ω, IAS = 168A, VGS =10V. Part not recommended for use
above this value .
as Coss while VDS is rising from 0 to 80% VDSS
Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS
When mounted on 1" square PCB (FR-4 or G-10 Material). For
recommended footprint and soldering techniquea refer to applocation
note # AN-994 echniques refer to application note #AN-994.
Rθ is measured at TJ approximately 90°C
.
.
RθJC value shown is at time zero
ISD ≤ 168A, di/dt ≤ 1410 A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
2
www.irf.com
IRFS3006-7PPbF
1000
100
10
1000
100
10
VGS
15V
10V
8.0V
6.0V
5.0V
4.5V
4.0V
3.5V
VGS
15V
10V
8.0V
6.0V
5.0V
4.5V
4.0V
3.5V
TOP
TOP
BOTTOM
BOTTOM
3.5V
1
60µs PULSE WIDTH
Tj = 175°C
≤
3.5V
60µs PULSE WIDTH
Tj = 25°C
≤
0.1
1
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
2.5
2.0
1.5
1.0
0.5
1000
100
10
I
= 168A
= 10V
D
V
GS
T
= 175°C
J
T
= 25°C
J
1
V
= 25V
DS
≤60µs PULSE WIDTH
0.1
2
3
4
5
6
7
-60 -40 -20 0 20 40 60 80 100120140160180
, Junction Temperature (°C)
T
J
V
, Gate-to-Source Voltage (V)
GS
Fig 4. Normalized On-Resistance vs. Temperature
Fig 3. Typical Transfer Characteristics
100000
10000
1000
16.0
V
= 0V,
= C
f = 1 MHZ
GS
I = 168A
D
C
C
C
+ C , C
SHORTED
ds
iss
gs
gd
= C
rss
oss
gd
= C + C
V
V
= 48V
= 30V
ds
gd
DS
DS
12.0
8.0
C
iss
C
oss
C
rss
4.0
100
0.0
1
10
, Drain-to-Source Voltage (V)
100
0
40
80
120 160 200 240 280
V
Q , Total Gate Charge (nC)
DS
G
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
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3
IRFS3006-7PPbF
1000
10000
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R (on)
DS
T
= 175°C
J
100µsec
100
10
1msec
10msec
LIMITED BY PACKAGE
T
= 25°C
J
DC
1
Tc = 25°C
Tj = 175°C
Single Pulse
V
= 0V
GS
1.0
0.1
0.0
0.4
0.8
1.2
1.6
2.0
0.1
1
10
100
V
, Source-to-Drain Voltage (V)
V
, Drain-to-Source Voltage (V)
SD
DS
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
350
300
250
200
150
100
50
80
Limited By Package
Id = 5mA
75
70
65
60
55
0
25
50
75
100
125
150
175
-60 -40 -20 0 20 40 60 80 100120140160180
T
, Case Temperature (°C)
T
, Temperature ( °C )
C
J
Fig 9. Maximum Drain Current vs.
Fig 10. Drain-to-Source Breakdown Voltage
Case Temperature
1400
2.5
I
D
35A
70A
1200
1000
800
600
400
200
0
TOP
2.0
1.5
1.0
0.5
0.0
BOTTOM 168A
0
10
V
20
30
40
50
60
25
50
75
100
125
150
175
Starting T , Junction Temperature (°C)
J
Drain-to-Source Voltage (V)
DS,
Fig 11. Typical COSS Stored Energy
Fig 12. Maximum Avalanche Energy vs. DrainCurrent
4
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IRFS3006-7PPbF
1
0.1
D = 0.50
0.20
0.10
0.05
R1
R1
R2
R2
R3
R3
R4
R4
0.02
0.01
Ri (°C/W) τi (sec)
0.01
0.0062
0.0431
0.1462
0.2047
0.000005
0.000045
0.001067
0.010195
τ
τ
J τJ
τ
Cτ
1τ1
Ci= τi/Ri
τ
τ
τ
2 τ2
3τ3
4τ4
SINGLE PULSE
( THERMAL RESPONSE )
0.001
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
, Rectangular Pulse Duration (sec)
1
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
100
10
Duty Cycle = Single Pulse
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ∆Tj = 150°C and
Tstart =25°C (Single Pulse)
0.01
0.05
0.10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ∆Τ j = 25°C and
Tstart = 150°C.
1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current vs.Pulsewidth
350
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
TOP
BOTTOM 1.0% Duty Cycle
= 168A
Single Pulse
300
250
200
150
100
50
I
D
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
0
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
25
50
75
100
125
150
175
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
Starting T , Junction Temperature (°C)
J
Fig 15. Maximum Avalanche Energy vs. Temperature
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5
IRFS3006-7PPbF
20
16
12
8
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
I
I
I
= 250µA
= 1.0mA
= 1.0A
I = 112A
D
D
D
F
V
= 51V
R
T = 25°C
J
T = 125°C
J
4
0
0
200
400
600
800 1000 1200
-75 -50 -25
0
25 50 75 100 125 150 175
di /dt (A/µs)
T , Temperature ( °C )
F
J
Fig. 17 - Typical Recovery Current vs. dif/dt
Fig 16. Threshold Voltage vs. Temperature
20
600
I = 168A
I = 112A
F
F
V
= 51V
V
= 51V
R
500
400
300
200
100
0
R
16
12
8
T = 25°C
T = 25°C
J
J
T = 125°C
J
T = 125°C
J
4
0
0
200
400
600
800 1000 1200
0
200
400
600
800 1000 1200
di /dt (A/µs)
di /dt (A/µs)
F
F
Fig. 18 - Typical Recovery Current vs. dif/dt
Fig. 19 - Typical Stored Charge vs. dif/dt
600
I = 168A
F
V
= 51V
500
400
300
200
100
0
R
T = 25°C
J
T = 125°C
J
0
200
400
600
800 1000 1200
di /dt (A/µs)
F
Fig. 20 - Typical Stored Charge vs. dif/dt
6
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IRFS3006-7PPbF
Driver Gate Drive
P.W.
P.W.
Period
D.U.T
Period
D =
+
*
=10V
V
GS
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D.U.T. I Waveform
SD
+
-
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
-
+
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
Re-Applied
Voltage
• dv/dt controlled by RG
RG
+
-
Body Diode
Forward Drop
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Inductor Current
I
SD
Ripple
≤ 5%
* VGS = 5V for Logic Level Devices
Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V
(BR)DSS
15V
t
p
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
V
2
GS
Ω
0.01
t
p
I
AS
Fig 22b. Unclamped Inductive Waveforms
Fig 22a. Unclamped Inductive Test Circuit
RD
VDS
V
DS
90%
VGS
D.U.T.
RG
+
VDD
-
VGS
10%
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
V
GS
t
t
r
t
t
f
d(on)
d(off)
Fig 23a. Switching Time Test Circuit
Fig 23b. Switching Time Waveforms
Id
Current Regulator
Same Type as D.U.T.
Vds
Vgs
50KΩ
.2µF
12V
.3µF
+
V
DS
D.U.T.
-
Vgs(th)
V
GS
3mA
I
I
D
G
Qgs1
Qgs2
Qgd
Qgodr
Current Sampling Resistors
Fig 24a. Gate Charge Test Circuit
Fig 24b. Gate Charge Waveform
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7
IRFS3006-7PPbF
D2Pak (TO-263CB) 7 Long Leads Package Outline
Dimensions are shown in milimeters (inches)
D2Pak - 7 Pin Part Marking Information
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
8
www.irf.com
IRFS3006-7PPbF
D2Pak - 7 Pin Tape and Reel
Dimensions are shown in milimeters (inches)
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 10/2008
www.irf.com
9
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