IRFS4710TRR [INFINEON]
Power Field-Effect Transistor, 75A I(D), 100V, 0.014ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, PLASTIC, D2PAK-3;
| 型号： | IRFS4710TRR |
| 厂家： | 
Infineon |
| 描述： | Power Field-Effect Transistor, 75A I(D), 100V, 0.014ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, PLASTIC, D2PAK-3 开关 脉冲 晶体管 |
| 文件： | 总12页 (文件大小：663K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD-95146
IRFB4710PbF
IRFS4710PbF
IRFSL4710PbF
HEXFET® Power MOSFET
Applications
l High frequency DC-DC converters
l Motor Control
VDSS
100V
RDS(on) max
ID
75A
0.014Ω
l Uninterrutible Power Supplies
l Lead-Free
Benefits
l Low Gate-to-Drain Charge to Reduce
Switching Losses
l Fully Characterized Capacitance Including
Effective COSS to Simplify Design, (See
App. Note AN1001)
l Fully Characterized Avalanche Voltage
and Current
D2Pak
IRFS4710
TO-262
IRFSL4710
TO-220AB
IRFB4710
Absolute Maximum Ratings
Parameter
Max.
75
53
Units
A
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
300
PD @TA = 25°C
PD @TC = 25°C
Power Dissipation
3.8
W
Power Dissipation
200
Linear Derating Factor
1.4
W/°C
V
VGS
dv/dt
TJ
Gate-to-Source Voltage
± 20
Peak Diode Recovery dv/dt
Operating Junction and
8.2
V/ns
-55 to + 175
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torqe, 6-32 or M3 screw
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
Junction-to-Case
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
Typ.
Max.
0.74
–––
62
Units
RθJC
RθCS
RθJA
RθJA
–––
0.50
–––
–––
°C/W
Junction-to-Ambient
40
Notes through are on page 11
www.irf.com
1
04/22/04
IRFB/IRFS/IRFL4710PbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
Min. Typ. Max. Units
100 ––– –––
––– 0.11 ––– V/°C Reference to 25°C, ID = 1mA
Conditions
VGS = 0V, ID = 250µA
V(BR)DSS
V
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient
RDS(on)
VGS(th)
Static Drain-to-Source On-Resistance ––– 0.011 0.014
Ω
VGS = 10V, ID = 45A
VDS = VGS, ID = 250µA
VDS = 95V, VGS = 0V
VDS = 80V, VGS = 0V, TJ = 150°C
VGS = 20V
Gate Threshold Voltage
3.5
––– 5.5
V
––– ––– 1.0
––– ––– 250
––– ––– 100
––– ––– -100
IDSS
Drain-to-Source Leakage Current
µA
nA
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
IGSS
VGS = -20V
Dynamic @ TJ = 25°C (unless otherwise specified)
Parameter
Forward Transconductance
Total Gate Charge
Min. Typ. Max. Units
35 ––– –––
––– 110 170
Conditions
VDS = 50V, ID = 45A
ID = 45A
gfs
S
Qg
Qgs
Qgd
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
–––
–––
–––
43 –––
40 –––
35 –––
nC VDS = 50V
VGS = 10V,
VDD = 50V
––– 130 –––
ID = 45A
ns
td(off)
tf
Turn-Off Delay Time
Fall Time
–––
–––
41 –––
38 –––
RG = 4.5Ω
VGS = 10V
VGS = 0V
Ciss
Coss
Crss
Coss
Coss
Input Capacitance
––– 6160 –––
––– 440 –––
––– 250 –––
––– 1580 –––
––– 280 –––
––– 430 –––
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
VDS = 25V
pF
ƒ = 1.0MHz
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
VGS = 0V, VDS = 80V, ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 80V ꢀ
Coss eff.
Avalanche Characteristics
Parameter
Single Pulse Avalanche Energy
Avalanche Current
Typ.
–––
–––
–––
Max.
190
45
Units
mJ
A
EAS
IAR
EAR
Repetitive Avalanche Energy
20
mJ
Diode Characteristics
Parameter
Min. Typ. Max. Units
Conditions
D
S
IS
Continuous Source Current
(Body Diode)
MOSFET symbol
75
––– –––
––– –––
showing the
A
G
ISM
Pulsed Source Current
(Body Diode)
integral reverse
p-n junction diode.
300
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
––– ––– 1.3
––– 74 110
––– 180 260
V
TJ = 25°C, IS = 45A, VGS = 0V
ns
TJ = 25°C, IF = 45A
Qrr
ton
nC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
2
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IRFB/IRFS/IRFL4710PbF
1000
100
10
1000
VGS
15V
12V
10V
8.0V
7.5V
7.0V
6.5V
VGS
TOP
TOP
15V
12V
10V
8.0V
7.5V
7.0V
6.5V
BOTTOM 6.0V
BOTTOM6.0V
100
10
1
1
6.0V
6.0V
0.1
20µs PULSE WIDTH
20µs PULSE WIDTH
T = 25 C
J
°
°
T = 175 C
J
0.01
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
3.0
1000
75A
=
I
D
2.5
2.0
1.5
1.0
0.5
0.0
°
T = 175 C
J
100
10
1
°
T = 25 C
J
V
= 50V
DS
V
=10V
20µs PULSE WIDTH
GS
0.1
6.0
7.0
8.0
9.0 10.0
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
°
V
, Gate-to-Source Voltage (V)
T , Junction Temperature ( C)
J
GS
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
Vs. Temperature
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3
IRFB/IRFS/IRFL4710PbF
20
16
12
8
10000
I
D
= 45A
V
= 0V,
f = 1 MHZ
GS
V
V
V
= 80V
= 50V
= 20V
DS
DS
DS
C
= C + C
gs gd
,
C
ds
SHORTED
iss
C
rss
= C
gd
8000
6000
4000
2000
0
C
oss
= C + C
ds gd
Ciss
4
Coss
Crss
FOR TEST CIRCUIT
SEE FIGURE 13
0
1
10
100
0
40
80
120
160
200
Q
, Total Gate Charge (nC)
V
DS
, Drain-to-Source Voltage (V)
G
Fig 6. Typical Gate Charge Vs.
Fig 5. Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
1000
100
10
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R
(on)
DS
°
T = 175 C
J
100µsec
1msec
°
T = 25 C
J
1
1
Tc = 25°C
Tj = 175°C
Single Pulse
10msec
V
= 0 V
GS
0.1
0.1
0.0
0.4
0.8
1.2
1.6
1
10
100
1000
V
,Source-to-Drain Voltage (V)
SD
V
DS
, Drain-toSource Voltage (V)
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
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IRFB/IRFS/IRFL4710PbF
RD
80
60
40
20
0
VDS
VGS
D.U.T.
RG
+VDD
-
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
25
50
75
100
125
150
175
°
, Case Temperature ( C)
T
C
10%
V
GS
t
t
r
t
t
f
Fig 9. Maximum Drain Current Vs.
d(on)
d(off)
Case Temperature
Fig 10b. Switching Time Waveforms
1
D = 0.50
0.20
0.1
0.10
0.05
P
2
DM
SINGLE PULSE
(THERMAL RESPONSE)
t
1
0.02
0.01
t
2
Notes:
1. Duty factor D =
t / t
1
2. Peak T =P
x Z
+ T
thJC C
J
DM
0.01
0.00001
0.0001
0.001
0.01
0.1
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFB/IRFS/IRFL4710PbF
350
300
250
200
150
100
50
I
D
15V
TOP
18A
32A
45A
BOTTOM
DR IVER
L
V
D S
D .U .T
A S
R
G
+
V
D D
-
I
A
V
2
GS
0.0 1
Ω
t
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
0
25
50
75
100
125
150
175
°
Starting T , Junction Temperature ( C)
J
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I
AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
Q
G
50KΩ
.2µF
12V
10 V
.3µF
Q
Q
GD
GS
+
V
DS
D.U.T.
-
V
GS
V
G
3mA
I
I
D
G
Charge
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
6
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IRFB/IRFS/IRFL4710PbF
Peak Diode Recovery dv/dt Test Circuit
+
-
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T
+
-
-
+
RG
• dv/dt controlled by RG
+
-
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VDD
Driver Gate Drive
P.W.
P.W.
Period
Period
D =
V
=10V
*
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFET® Power MOSFETs
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7
IRFB/IRFS/IRFL4710PbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
10.5 4 (.415 )
3.7 8 (.14 9)
- B
-
10.2 9 (.405 )
2.87 (.1 13 )
2.62 (.1 03 )
4.69 (.1 85)
4.20 (.1 65)
3.5 4 (.13 9)
1 .3 2 (.052)
1 .2 2 (.048)
- A
-
6.47 (.2 55)
6.10 (.2 40)
4
1 5.24 (.600 )
1 4.84 (.584 )
LEAD ASSIGNMENTS
1.15 (.04 5)
M IN
HEXFET
IGBTs, CoPACK
1
2
3
1- GATE
1- GATE
2- COLLECTOR
3- EMITTER
2- DRAIN
3- SOURCE
4- DRAIN4- COLLECTOR
14 .09 (.5 55)
13 .47 (.5 30)
4.06 (.160)
3.55 (.140)
0 .93 (.03 7)
0 .69 (.02 7)
0.55 (.022)
0.46 (.018)
3X
3 X
1 .40 (.05 5)
3 X
1 .15 (.04 5)
0.3 6 (.01 4)
M
B
A
M
2.92 (.11 5)
2.64 (.10 4)
2.54 (.1 00)
2X
N O TE S :
1
2
D IM E N S IO N IN G
&
T O LE R A N C IN G P E R A N S I Y 14 .5M , 19 82.
3
4
O U TLIN E C O N F O R M S TO JE D E C O U T LIN E TO -220 A B .
H E A T S IN K LE A D M E A S U R E M E N TS D O NO T IN C LU D E B U R R S .
C O N T R O L LIN G D IM E N S IO N : IN C H
&
TO-220AB Part Marking Information
EXAMPLE: THIS IS AN IRF1010
LOT CODE 1789
PART NUMBER
ASS EMBLED ON WW 19, 1997
IN THE ASS EMBLY LINE "C"
INTERNATIONAL
RECTIFIER
LOGO
Note: "P" in assembly line
position indicates "Lead-Free"
DATE CODE
YEAR 7 = 1997
WEEK 19
AS S E MB LY
LOT CODE
LINE C
8
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IRFB/IRFS/IRFL4710PbF
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
D2Pak Part Marking Information (Lead-Free)
T HIS IS AN IRF 530S WIT H
PAR T NU MB E R
LOT CODE 8024
INT E R NAT IONAL
R E CT IF IE R
LOGO
AS S E MB L E D ON WW 02, 2000
IN T H E AS S E MB LY L INE "L "
F 530S
DAT E CODE
YE AR 0 = 2000
WE E K 02
Note: "P" in as s embly line
pos ition indicates "Lead-F ree"
AS S E MB LY
LOT CODE
LINE
L
OR
PAR T NU MB E R
INT E R NAT IONAL
R E CT IF IE R
L OGO
F 530S
DAT E CODE
P
=
DE S IGNAT E S L EAD-F R E E
PR ODU CT (OPT IONAL )
AS S E MB L Y
L OT CODE
YE AR 0 = 2000
WE E K 02
A = AS S E MB L Y S IT E CODE
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9
IRFB/IRFS/IRFL4710PbF
TO-262 Package Outline
TO-262 Part Marking Information
EXAMPLE: THIS IS AN IRL3103L
LOT CODE 1789
PART NUMBE R
INTE RNAT IONAL
RECTIF IER
LOGO
AS S EMBLE D ON WW 19, 1997
IN THE AS S E MB LY LINE "C"
DATE CODE
YE AR 7 = 1997
WE EK 19
Note: "P" in as s embly line
pos ition indicates "L ead-F ree"
AS S EMB LY
LOT CODE
LINE C
OR
PART NUMBE R
INTE RNAT IONAL
RECTIF IER
LOGO
DATE CODE
P = DE S IGNAT E S LEAD-F REE
PRODUCT (OPT IONAL)
YE AR 7 = 1997
AS S EMB LY
LOT CODE
WE EK 19
A = AS S E MB LY S IT E CODE
10
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IRFB/IRFS/IRFL4710PbF
D2Pak Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR R
1.60 (.063)
1.50 (.059)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
0.368 (.0145 )
0.342 (.0135 )
F E E D D IRE C TIO N
TR L
11.60 (.457 )
11.40 (.449 )
1.85 (.073)
1.65 (.065)
24.30 (.9 57)
15.4 2 (.609 )
23.90 (.9 41)
15.2 2 (.601 )
1.75 (.069)
10 .90 (.42 9)
10 .70 (.42 1)
1.25 (.049)
4.7 2 (.136)
4.5 2 (.178)
16.10 (.634)
15.90 (.626)
FE E D D IR E C TIO N
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
60.00 (2.362)
M IN .
30.40 (1.197)
M AX.
N O TES
:
1. CO M FO RM S TO EIA-418.
2. CO N TRO LLIN G D IM ENS IO N: M ILLIMET ER.
3. DIM E NSIO N M E ASUR ED
4. IN CLUD ES FLAN G E D IS TO RTIO N
26.40 (1.039)
24.40 (.961)
4
@ HU B.
3
@
O U TER E DG E.
Notes:
Repetitive rating; pulse width limited by
Pulse width ≤ 400µs; duty cycle ≤ 2%.
max. junction temperature.
ꢀCoss eff. is a fixed capacitance that gives the same charging time
Starting TJ = 25°C, L = 190µH
RG = 25Ω, IAS = 45A, VGS = 10V
as Coss while VDS is rising from 0 to 80% VDSS
ISD ≤ 45A, di/dt ≤ 420A/µs, VDD ≤ V(BR)DSS
TJ ≤ 175°C
,
This is only applied to TO-220AB package
This is applied to D2Pak, when mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.04/04
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11
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/
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