IRFU2607Z [INFINEON]
AUTOMOTIVE MOSFET; 汽车MOSFET![IRFU2607Z](http://pdffile.icpdf.com/pdf1/p00094/img/icpdf/IRFU2607Z_494012_icpdf.jpg)
型号: | IRFU2607Z |
厂家: | ![]() |
描述: | AUTOMOTIVE MOSFET |
文件: | 总11页 (文件大小:283K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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PD - 96892
IRFR2607Z
IRFU2607Z
AUTOMOTIVE MOSFET
Features
HEXFET® Power MOSFET
O
Advanced Process Technology
D
O
O
O
O
Ultra Low On-Resistance
175°C Operating Temperature
Fast Switching
VDSS = 75V
Repetitive Avalanche Allowed up to Tjmax
RDS(on) = 22mΩ
G
Description
ID = 42A
Specifically designed for Automotive applications,
this HEXFET® Power MOSFET utilizes the latest
processingtechniquestoachieveextremelylowon-
resistance per silicon area. Additional features of
thisdesign area175°Cjunctionoperatingtempera-
ture, fast switching speed and improved repetitive
avalanche rating . These features combine to make
thisdesignanextremelyefficientandreliabledevice
foruseinAutomotiveapplicationsandawidevariety
of other applications.
S
D-Pak
I-Pak
IRFU2607Z
IRFR2607Z
Absolute Maximum Ratings
Parameter
Max.
Units
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V (Package Limited)
Pulsed Drain Current
I
I
I
I
@ T = 25°C
45
D
D
D
C
@ T = 100°C
32
42
A
C
@ T = 25°C
C
180
110
DM
P
@T = 25°C Power Dissipation
W
D
C
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
0.72
± 20
W/°C
V
V
GS
EAS (Thermally limited)
96
mJ
Single Pulse Avalanche Energy Tested Value
Avalanche Current
EAS (Tested )
96
IAR
See Fig.12a, 12b, 15, 16
A
Repetitive Avalanche Energy
Operating Junction and
EAR
mJ
T
T
-55 to + 175
J
Storage Temperature Range
°C
STG
Soldering Temperature, for 10 seconds
Mounting Torque, 6-32 or M3 screw
300 (1.6mm from case )
10 lbf in (1.1N m)
Thermal Resistance
Parameter
Typ.
–––
–––
–––
Max.
1.38
40
Units
Junction-to-Case
RθJC
RθJA
RθJA
Junction-to-Ambient (PCB mount)
Junction-to-Ambient
°C/W
110
www.irf.com
1
9/21/04
IRFR/U2607Z
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
Min. Typ. Max. Units
75 ––– –––
Conditions
VGS = 0V, ID = 250µA
V(BR)DSS
V
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.074 ––– V/°C Reference to 25°C, ID = 1mA
mΩ
V
RDS(on)
VGS(th)
gfs
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
–––
2.0
17.6
–––
–––
–––
–––
–––
22
4.0
–––
20
VGS = 10V, ID = 30A
VDS = VGS, ID = 50µA
Forward Transconductance
36
S
V
V
V
DS = 25V, ID = 30A
IDSS
Drain-to-Source Leakage Current
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
µA
DS = 75V, VGS = 0V
250
200
DS = 75V, VGS = 0V, TJ = 125°C
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
nA VGS = 20V
GS = -20V
ID = 30A
DS = 60V
––– -200
V
Qg
Qgs
Qgd
td(on)
tr
34
8.9
14
14
59
39
28
4.5
51
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
–––
–––
–––
–––
–––
–––
–––
nC
V
VGS = 10V
VDD = 38V
ID = 30A
Rise Time
td(off)
tf
Turn-Off Delay Time
ns
RG = 15 Ω
Fall Time
VGS = 10V
LD
Internal Drain Inductance
Between lead,
nH 6mm (0.25in.)
from package
LS
Internal Source Inductance
–––
7.5
–––
and center of die contact
VGS = 0V
DS = 25V
pF ƒ = 1.0MHz
Ciss
Coss
Crss
Coss
Coss
Input Capacitance
––– 1440 –––
Output Capacitance
–––
–––
–––
–––
–––
190
110
720
130
230
–––
–––
–––
–––
–––
V
Reverse Transfer Capacitance
Output Capacitance
V
V
V
GS = 0V, VDS = 1.0V, ƒ = 1.0MHz
Output Capacitance
GS = 0V, VDS = 60V, ƒ = 1.0MHz
GS = 0V, VDS = 0V to 60V
Coss eff.
Effective Output Capacitance
Source-Drain Ratings and Characteristics
Parameter
Min. Typ. Max. Units
Conditions
I
Continuous Source Current
–––
–––
45
MOSFET symbol
S
(Body Diode)
A
showing the
I
Pulsed Source Current
–––
–––
180
integral reverse
SM
(Body Diode)
p-n junction diode.
V
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
–––
–––
–––
–––
30
1.3
45
42
V
T = 25°C, I = 30A, V = 0V
J S GS
SD
t
ns T = 25°C, I = 30A, VDD = 38V
J F
rr
di/dt = 100A/µs
Q
28
nC
rr
t
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
on
2
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IRFR/U2607Z
1000
100
10
1000
100
10
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
TOP
TOP
BOTTOM
BOTTOM
4.5V
1
4.5V
≤ 60µs PULSE WIDTH
Tj = 25°C
≤ 60µs PULSE WIDTH
Tj = 175°C
0.1
1
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000.0
60
T
= 25°C
J
50
40
30
20
10
0
100.0
10.0
1.0
T
= 175°C
J
T
= 175°C
J
5°C
= 2
T
J
V
= 20V
DS
≤ 60µs PULSE WIDTH
V
= 10V
DS
380µs PULSE WIDTH
0.1
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0 10.0
0
10
20
30
40
V
, Gate-to-Source Voltage (V)
GS
I
Drain-to-Source Current (A)
D,
Fig 3. Typical Transfer Characteristics
Fig 4. Typical Forward Transconductance
Vs. Drain Current
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3
IRFR/U2607Z
2400
20
16
12
8
V
C
= 0V,
f = 1 MHZ
GS
I = 30A
D
= C + C , C SHORTED
iss
gs
gd ds
V
= 60V
DS
C
= C
2000
1600
1200
800
400
0
rss
gd
VDS= 30V
VDS= 12V
C
= C + C
oss
ds
gd
Ciss
4
Coss
Crss
FOR TEST CIRCUIT
SEE FIGURE 13
0
0
10
20
30
40
50
1
10
100
Q
Total Gate Charge (nC)
G
V
, Drain-to-Source Voltage (V)
DS
Fig 6. Typical Gate Charge Vs.
Fig 5. Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
1000.0
1000
OPERATION IN THIS AREA
LIMITED BY R
(on)
DS
100.0
10.0
1.0
100
10
1
T
= 175°C
J
100µsec
T
= 25°C
10msec
J
Tc = 25°C
Tj = 175°C
Single Pulse
1msec
DC
V
= 0V
GS
0.1
0.1
1
10
100
1000
0.0
0.4
V
0.8
1.2
1.6
2.0
2.4
V
, Drain-toSource Voltage (V)
, Source-to-Drain Voltage (V)
DS
SD
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
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IRFR/U2607Z
2.5
2.0
1.5
1.0
0.5
50
40
30
20
10
0
I
= 30A
LIMITED BY PACKAGE
D
V
= 10V
GS
25
50
75
100
125
150
175
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
T
, Case Temperature (°C)
C
T
, Junction Temperature (°C)
J
Fig 10. Normalized On-Resistance
Fig 9. Maximum Drain Current Vs.
Vs. Temperature
Case Temperature
10
1
0.1
D = 0.50
0.20
0.10
R1
R1
R2
R2
Ri (°C/W) τi (sec)
0.71826 0.000423
0.66173 0.004503
τ
J τJ
τ
0.05
τ
Cτ
1τ1
Ci= τi/Ri
τ
2τ2
0.02
0.01
0.01
0.001
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
, Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFR/U2607Z
400
300
200
100
0
15V
I
D
TOP
3.5A
4.8A
30A
DRIVER
+
L
V
BOTTOM
DS
D.U.T
AS
R
G
V
DD
-
I
A
V
20V
GS
0.01
Ω
t
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
25
50
75
100
125
150
175
Starting T , Junction Temperature (°C)
J
I
AS
Fig 12c. Maximum Avalanche Energy
Fig 12b. Unclamped Inductive Waveforms
Vs. Drain Current
Q
G
10 V
Q
Q
5.0
4.5
4.0
3.5
3.0
2.5
2.0
GS
GD
I
I
I
= 1.0A
D
D
D
= 1.0mA
= 250µA
V
G
ID = 50µA
Charge
Fig 13a. Basic Gate Charge Waveform
L
VCC
DUT
0
-75 -50 -25
0
J
25 50 75 100 125 150 175
, Temperature ( °C )
1K
T
Fig 14. Threshold Voltage Vs. Temperature
Fig 13b. Gate Charge Test Circuit
6
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IRFR/U2607Z
1000
100
10
Duty Cycle = Single Pulse
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming ∆Tj = 25°C due to
avalanche losses. Note: In no
case should Tj be allowed to
exceed Tjmax
0.01
0.05
0.10
1
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
100
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
TOP
BOTTOM 1% Duty Cycle
= 30A
Single Pulse
I
80
60
40
20
0
D
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
25
50
75
100
125
150
175
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
Starting T , Junction Temperature (°C)
J
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
Fig 16. Maximum Avalanche Energy
EAS (AR) = PD (ave)·tav
Vs. Temperature
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7
IRFR/U2607Z
Driver Gate Drive
P.W.
P.W.
Period
D.U.T
Period
D =
+
*
=10V
V
GS
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D.U.T. I Waveform
SD
+
-
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
-
+
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
Re-Applied
Voltage
• dv/dt controlled by RG
RG
+
-
Body Diode
Forward Drop
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
RD
VDS
VGS
D.U.T.
RG
+VDD
-
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 18a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
t
r
t
t
f
d(on)
d(off)
Fig 18b. Switching Time Waveforms
8
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IRFR/U2607Z
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
2.38 (.094)
2.19 (.086)
6.73 (.265)
6.35 (.250)
1.14 (.045)
0.89 (.035)
- A -
1.27 (.050)
5.46 (.215)
0.58 (.023)
0.46 (.018)
0.88 (.035)
5.21 (.205)
4
6.45 (.245)
5.68 (.224)
6.22 (.245)
5.97 (.235)
10.42 (.410)
9.40 (.370)
1.02 (.040)
1.64 (.025)
LEAD ASSIGNMENTS
1 - GATE
1
2
3
2 - DRAIN
0.51 (.020)
MIN.
- B -
3 - SOURCE
4 - DRAIN
1.52 (.060)
1.15 (.045)
0.89 (.035)
0.64 (.025)
3X
0.58 (.023)
0.46 (.018)
1.14 (.045)
0.76 (.030)
2X
0.25 (.010)
M A M B
NOTES:
2.28 (.090)
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH.
4.57 (.180)
3 CONFORMS TO JEDEC OUTLINE TO-252AA.
4 DIMENSIONS SHOWN ARE BEFORE SOLDER DIP,
SOLDER DIP MAX. +0.16 (.006).
D-Pak (TO-252AA) Part Marking Information
EXAMPLE: THIS IS AN IRFR120
PART NUMBER
WIT H AS S EMBLY
LOT CODE 1234
ASSEMBLED ON WW 16, 1999
IN THE ASSEMBLY LINE "A"
INTERNATIONAL
RECTIFIER
LOGO
DATE CODE
YEAR 9 = 1999
WEEK 16
IRFR120
916A
34
12
LINE A
Note: "P" in assembly line
position indicates "Lead-Free"
AS S E MB L Y
LOT CODE
OR
PART NUMBER
DATE CODE
INTERNATIONAL
RECTIFIER
LOGO
IRFR120
P916A
34
P = DESIGNATES LEAD-FREE
PRODUCT (OPTIONAL)
YEAR 9 = 1999
12
AS S E MB L Y
LOT CODE
WE E K 16
A= ASSEMBLY SITE CODE
www.irf.com
9
IRFR/U2607Z
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
6.73 (.265)
6.35 (.250)
2.38 (.094)
2.19 (.086)
- A -
0.58 (.023)
0.46 (.018)
1.27 (.050)
5.46 (.215)
0.88 (.035)
5.21 (.205)
LEAD ASSIGNMENTS
1 - GATE
4
2 - DRAIN
6.45 (.245)
5.68 (.224)
3 - SOURCE
4 - DRAIN
6.22 (.245)
5.97 (.235)
1.52 (.060)
1.15 (.045)
1
2
3
- B -
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH.
2.28 (.090)
1.91 (.075)
9.65 (.380)
8.89 (.350)
3 CONFORMS TO JEDEC OUTLINE TO-252AA.
4 DIMENSIONS SHOWN ARE BEFORE SOLDER DIP,
SOLDER DIP MAX. +0.16 (.006).
1.14 (.045)
0.76 (.030)
1.14 (.045)
0.89 (.035)
3X
0.89 (.035)
0.64 (.025)
3X
0.25 (.010)
M A M B
0.58 (.023)
0.46 (.018)
2.28 (.090)
2X
I-Pak (TO-251AA) Part Marking Information
PART NUMBER
EXAMPLE: THIS IS AN IRFU120
INTERNATIONAL
RECTIFIER
LOGO
WITH ASSEMBLY
LOT CODE 5678
ASSEMBLED ON WW 19, 1999
IN THE ASSEMBLY LINE "A"
DATE CODE
YEAR 9 = 1999
WEEK 19
IRFU120
919A
78
56
LINE A
ASSEMBLY
LOT CODE
Note: "P" in assembly line
pos ition indicates "L ead-F ree"
OR
PART NUMBER
DATE CODE
P = DESIGNATES LEAD-FREE
PRODUCT (OPTIONAL)
INTERNATIONAL
RECTIFIER
LOGO
IRFU120
56 78
YEAR 9 = 1999
AS S E MB L Y
LOT CODE
WEEK 19
A= ASSEMBLY SITE CODE
10
www.irf.com
IRFR/U2607Z
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRL
TRR
16.3 ( .641 )
15.7 ( .619 )
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Notes:
Coss eff. is a fixed capacitance that gives the same charging time
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
Limited by TJmax, starting TJ = 25°C, L = 0.21mH
RG = 25Ω, IAS = 30A, VGS =10V. Part not
recommended for use above this value.
Pulse width ≤ 1.0ms; duty cycle ≤ 2%.
as Coss while VDS is rising from 0 to 80% VDSS
.
ꢀ
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
avalanche performance.
This value determined from sample failure population. 100%
tested to this value in production.
When mounted on 1" square PCB (FR-4 or G-10 Material) .
For recommended footprint and soldering techniques refer to
application note #AN-994
Rθ is measured at TJ approximately 90°C
Data and specifications subject to change without notice.
This product has been designed for the Automotive [Q101] market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.9/04
www.irf.com
11
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