IRL2203 [INFINEON]
Power MOSFET(Vdss=30V, Rds(on)=7.0mohm, Id=116A); 功率MOSFET （ VDSS = 30V ， RDS（ON） = 7.0mohm ，ID = 116A ）
| 型号： | IRL2203 |
| 厂家： | 
Infineon |
| 描述： | Power MOSFET(Vdss=30V, Rds(on)=7.0mohm, Id=116A) |
| 文件： | 总8页 (文件大小：221K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 91366
IRL2203N
HEXFET® Power MOSFET
l Advanced Process Technology
l Ultra Low On-Resistance
l Dynamic dv/dt Rating
D
VDSS = 30V
l 175°C Operating Temperature
l Fast Switching
RDS(on) = 7.0mΩ
G
l Fully Avalanche Rated
ID = 116A
S
Description
AdvancedHEXFET® PowerMOSFETsfromInternational
Rectifierutilizeadvancedprocessingtechniquestoachieve
extremelylowon-resistancepersiliconarea. Thisbenefit,
combined with the fast switching speed and ruggedized
device design that HEXFET power MOSFETs are well
knownfor,providesthedesignerwithanextremelyefficient
andreliabledeviceforuseinawidevarietyofapplications.
The TO-220 package is universally preferred for all
commercial-industrial applications at power dissipation
levels to approximately 50 watts. The low thermal
resistance and low package cost of the TO-220 contribute
to its wide acceptance throughout the industry.
TO-220AB
Absolute Maximum Ratings
Parameter
Max.
116
82
Units
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
A
400
PD @TC = 25°C
Power Dissipation
180
W
W/°C
V
Linear Derating Factor
1.2
VGS
IAR
Gate-to-Source Voltage
± 16
60
Avalanche Current
A
EAR
dv/dt
TJ
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
18
mJ
V/ns
5.0
-55 to + 175
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 srew
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
Junction-to-Case
Typ.
–––
Max.
Units
RθJC
RθCS
RθJA
0.85
–––
62
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
0.50
–––
°C/W
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1
3/16/01
IRL2203N
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
30 ––– –––
Conditions
VGS = 0V, ID = 250µA
V(BR)DSS
Drain-to-Source Breakdown Voltage
V
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.029 ––– V/°C Reference to 25°C, ID = 1mA
––– ––– 7.0
––– ––– 10
VGS = 10V, ID = 60A
VGS = 4.5V, ID = 48A
VDS = VGS, ID = 250µA
VDS = 25V, ID = 60A
VDS = 30V, VGS = 0V
mΩ
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
gfs
Gate Threshold Voltage
1.0
73
––– –––
––– –––
V
S
Forward Transconductance
––– ––– 25
––– ––– 250
––– ––– 100
––– ––– -100
––– ––– 60
––– ––– 14
––– ––– 33
µA
nA
IDSS
Drain-to-Source Leakage Current
VDS = 24V, VGS = 0V, TJ = 125°C
VGS = 16V
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
IGSS
VGS = -16V
Qg
ID = 60A
Qgs
Qgd
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
nC VDS = 24V
VGS = 4.5V, See Fig. 6 and 13
–––
11 –––
VDD = 15V
––– 160 –––
ID = 60A
td(off)
tf
Turn-Off Delay Time
Fall Time
–––
–––
23 –––
66 –––
RG = 1.8Ω
VGS = 4.5V, See Fig. 10
Between lead,
6mm (0.25in.)
from package
and center of die contact
VGS = 0V
D
LD
Internal Drain Inductance
––– 4.5 –––
nH
pF
G
LS
Internal Source Inductance
––– 7.5 –––
S
Ciss
Coss
Crss
EAS
Input Capacitance
––– 3290 –––
––– 1270 –––
––– 170 –––
Output Capacitance
VDS = 25V
Reverse Transfer Capacitance
Single Pulse Avalanche Energy
ƒ = 1.0MHz, See Fig. 5
––– 1320ꢀ290 mJ IAS = 60A, L = 0.16mH
Source-Drain Ratings and Characteristics
Parameter
Continuous Source Current
(Body Diode)
Min. Typ. Max. Units
Conditions
MOSFET symbol
D
IS
––– ––– 116
showing the
A
G
ISM
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
integral reverse
p-n junction diode.
400
––– ––– 1.2
––– 56 84
––– 110 170
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
––– –––
S
VSD
trr
V
TJ = 25°C, IS = 60A, VGS = 0V
TJ = 25°C, IF = 60A
ns
Qrr
ton
nC di/dt = 100A/µs
Notes:
ISD ≤ 60A, di/dt ≤ 110A/µs, VDD ≤ V(BR)DSS
TJ ≤ 175°C
,
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Pulse width ≤ 400µs; duty cycle ≤ 2%.
ꢀThis is a typical value at device destruction and represents
operation outside rated limits.
Starting TJ = 25°C, L = 0.16mH
RG = 25Ω, IAS = 60A, VGS=10V (See Figure 12)
This is a calculated value limited to TJ = 175°C .
Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 75A.
2
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IRL2203N
1000
100
10
1000
100
10
VGS
15V
VGS
15V
10V
4.5V
3.7V
3.5V
3.3V
3.0V
TOP
TOP
10V
4.5V
3.7V
3.5V
3.3V
3.0V
BOTTOM 2.7V
BOTTOM 2.7V
2.7V
2.7V
20µs PULSE WIDTH
T = 175 C
J
20µs PULSE WIDTH
°
°
T = 25 C
J
1
0.1
1
0.1
1
10
100
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
2.5
100A
=
I
D
°
T = 25 C
J
2.0
1.5
1.0
0.5
0.0
°
T = 175 C
J
100
V
= 15V
DS
V
= 10V
GS
20µs PULSE WIDTH
10
2.0
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
°
3.0
4.0
5.0 6.0 7.0
T , Junction Temperature ( C)
J
V
, Gate-to-Source Voltage (V)
GS
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
Vs. Temperature
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3
IRL2203N
15
12
9
6000
I
D
= 60A
V
= 0V,
f = 1MHz
C
GS
C
= C + C
SHORTED
ds
iss
gs
gd ,
gd
C
= C
gd
V
V
= 24V
= 15V
rss
DS
DS
5000
4000
3000
2000
1000
0
C
= C + C
ds
oss
C
iss
6
C
oss
3
FOR TEST CIRCUIT
SEE FIGURE 13
C
rss
10
0
1
100
0
20
40
60
80
V
, Drain-to-Source Voltage (V)
Q
, Total Gate Charge (nC)
DS
G
Fig 6. Typical Gate Charge Vs.
Fig 5. Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
1000
10000
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R
(on)
DS
100
10
1
°
T = 175 C
J
100µsec
1msec
°
T = 25 C
J
Tc = 25°C
Tj = 175°C
Single Pulse
10msec
V
= 0 V
GS
2.0
1
0.1
0.0
0.4
0.8
1.2
1.6
2.4
1
10
, Drain-toSource Voltage (V)
100
V
,Source-to-Drain Voltage (V)
SD
V
DS
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
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IRL2203N
120
100
80
60
40
20
0
RD
VDS
LIMITED BY PACKAGE
VGS
D.U.T.
RG
+VDD
-
VGS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
25
50
75
100
125
150
175
°
, Case Temperature ( C)
T
C
10%
V
GS
Fig 9. Maximum Drain Current Vs.
t
t
r
t
t
f
d(on)
d(off)
Case Temperature
Fig 10b. Switching Time Waveforms
1
D = 0.50
0.20
0.10
0.05
0.1
P
DM
SINGLE PULSE
(THERMAL RESPONSE)
0.02
0.01
t
1
t
2
Notes:
1. Duty factor D =
t / t
1 2
2. Peak T = P
x Z
+ T
thJC C
J
DM
0.01
0.00001
0.0001
0.001
0.01
0.1
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRL2203N
600
500
400
300
200
100
0
I
15V
D
TOP
24A
42A
60A
BOTTOM
DR IVER
L
V
D S
D .U .T
A S
R
G
+
-
V
D D
I
A
V
GS
0.0 1
Ω
t
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
25
50
75
100
125
150
175
°
Starting T , Junction Temperature ( C)
J
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I
AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
.3µF
Q
G
+
VGS
V
DS
D.U.T.
-
Q
Q
GD
GS
V
GS
V
G
3mA
I
I
D
G
Current Sampling Resistors
Charge
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
6
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IRL2203N
Peak Diode Recovery dv/dt Test Circuit
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T*
-
+
-
-
+
RG
• dv/dt controlled by RG
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
+
-
VDD
VGS
* Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
Period
Period
D =
P.W.
V
[
=10V
] ***
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
[
[
]
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
]
SD
Ripple ≤ 5%
*** VGS = 5.0V for Logic Level and 3V Drive Devices
Fig 14. For N-channel HEXFET® power MOSFETs
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7
IRL2203N
Package Outline
TO-220AB
Dimensions are shown in millimeters (inches)
10.54 (.415)
10.29 (.405)
- B
-
3.78 (.149)
3.54 (.139)
2.87 (.113)
2.62 (.103)
4.69 (.185)
4.20 (.165)
1.32 (.052)
1.22 (.048)
- A
-
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
1.15 (.045)
M IN
LEAD ASSIG NM ENTS
1
2
3
4
- GATE
1
2
3
- DRAIN
- SOU RC E
- DRAIN
14.09 (.555)
13.47 (.530)
4.06 (.160)
3.55 (.140)
0.93 (.037)
0.69 (.027)
0.55 (.022)
0.46 (.018)
3X
3X
1.40 (.055)
3X
1.15 (.045)
0.36 (.014)
M
B
A
M
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
N OTES:
1
2
D IM ENSIONING
&
TOLERANCING PER ANSI Y14.5M , 1982.
3
4
OUTLINE CONFORM S TO JEDEC OUTLINE TO-220AB.
HEATSINK LEAD M EASUREM ENTS DO NOT INCLU DE BURRS.
C ONTROLLING DIM ENSION : INCH
&
Part Marking Information
TO-220AB
EXAMPLE : THIS IS AN IR F1010
W ITH ASSEM BLY
A
INTERNATIONAL
RECTIFIER
LOGO
PART NU M BER
LOT C ODE 9B1M
IR F1010
9246
9B
1M
D ATE COD E
(YYW W )
ASSEMBLY
LOT
CO DE
YY
=
YEAR
= W EEK
W W
Data and specifications subject to change without notice.
This product has been designed and qualified for the industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 3/01
8
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