IRL3705ZSTRR [INFINEON]
Power Field-Effect Transistor, 75A I(D), 55V, 0.008ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-263AB, PLASTIC, D2PAK-3;
| 型号： | IRL3705ZSTRR |
| 厂家： | 
Infineon |
| 描述： | Power Field-Effect Transistor, 75A I(D), 55V, 0.008ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-263AB, PLASTIC, D2PAK-3 局域网 开关 脉冲 晶体管 |
| 文件： | 总12页 (文件大小：377K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 95579A
IRL3705ZPbF
IRL3705ZSPbF
Features
IRL3705ZLPbF
HEXFET® Power MOSFET
l
l
l
l
l
l
l
Logic Level
Advanced Process Technology
UltraLowOn-Resistance
175°COperatingTemperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free
D
VDSS = 55V
RDS(on) = 8.0mΩ
G
Description
ID = 75A
S
ThisHEXFET® PowerMOSFETutilizesthelatest
processing techniques to achieve extremely low
on-resistancepersiliconarea.Additionalfeatures
of this design are a 175°C junction operating
temperature, fast switching speed and improved
repetitive avalanche rating. These features
combinetomakethisdesignanextremelyefficient
and reliable device for use in a wide variety of
applications.
D2Pak
IRL3705ZSPbF IRL3705ZLPbF
TO-262
TO-220AB
IRL3705ZPbF
Absolute Maximum Ratings
Parameter
Max.
Units
(Silicon Limited)
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
I
I
I
I
@ T = 25°C
C
86
D
D
D
@ T = 100°C
C
61
A
(Package Limited)
@ T = 25°C
C
75
340
DM
P
@T = 25°C Power Dissipation
C
130
W
W/°C
V
D
Linear Derating Factor
0.88
V
Gate-to-Source Voltage
Single Pulse Avalanche Energy
± 16
GS
EAS (Thermally limited)
120
180
mJ
EAS (Tested )
Single Pulse Avalanche Energy Tested Value
Avalanche Current
IAR
See Fig.12a, 12b, 15, 16
A
EAR
Repetitive Avalanche Energy
Operating Junction and
mJ
T
J
-55 to + 175
T
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting Torque, 6-32 or M3 screw
°C
STG
300 (1.6mm from case )
10 lbf in (1.1N m)
Thermal Resistance
Parameter
Typ.
Max.
Units
RθJC
RθCS
RθJA
RθJA
Junction-to-Case
–––
0.50
–––
–––
1.14
–––
62
°C/W
Case-to-Sink, Flat Greased Surface
Junction-to-Ambient
Junction-to-Ambient (PCB Mount)
40
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1
10/01/10
IRL3705Z/S/LPbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Min. Typ. Max. Units
55 ––– –––
Conditions
VGS = 0V, ID = 250µA
V
V(BR)DSS
––– 0.055 ––– V/°C Reference to 25°C, ID = 1mA
∆V(BR)DSS/∆TJ
–––
–––
–––
1.0
6.5
–––
–––
–––
–––
–––
–––
–––
–––
40
8.0
11
VGS = 10V, ID = 52A
mΩ
VGS = 5.0V, ID = 43A
VGS = 4.5V, ID = 30A
VDS = VGS, ID = 250µA
VDS = 25V, ID = 52A
RDS(on)
Static Drain-to-Source On-Resistance
12
3.0
–––
20
V
V
VGS(th)
gfs
IDSS
Gate Threshold Voltage
150
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Forward Transconductance
Drain-to-Source Leakage Current
µA
VDS = 55V, VGS = 0V
250
200
-200
60
VDS = 55V, VGS = 0V, TJ = 125°C
nA VGS = 16V
GS = -16V
ID = 43A
DS = 44V
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
V
Qg
Qgs
Qgd
td(on)
tr
12
–––
–––
–––
–––
–––
–––
nC
V
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
21
VGS = 5.0V
VDD = 28V
17
240
26
ns
ID = 43A
Rise Time
RG = 4.3 Ω
td(off)
tf
Turn-Off Delay Time
83
VGS = 5.0V
Fall Time
D
S
LD
Internal Drain Inductance
–––
4.5
–––
Between lead,
nH 6mm (0.25in.)
from package
G
LS
Internal Source Inductance
–––
7.5
–––
and center of die contact
VGS = 0V
DS = 25V
––– 2880 –––
Ciss
Input Capacitance
–––
420
–––
V
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Output Capacitance
–––
220
–––
pF ƒ = 1.0MHz
––– 1500 –––
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
VGS = 0V, VDS = 44V, ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 44V
Coss
–––
–––
330
510
–––
–––
Coss
Output Capacitance
Coss eff.
Effective Output Capacitance
Source-Drain Ratings and Characteristics
Parameter
Min. Typ. Max. Units
Conditions
I
D
S
Continuous Source Current
–––
–––
75
MOSFET symbol
S
(Body Diode)
Pulsed Source Current
A
showing the
integral reverse
I
G
–––
–––
340
SM
(Body Diode)
p-n junction diode.
V
t
Diode Forward Voltage
–––
–––
–––
–––
16
1.3
24
11
V
T = 25°C, I = 52A, V = 0V
SD
J S GS
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
ns T = 25°C, I = 43A, VDD = 28V
J F
rr
di/dt = 100A/µs
Q
t
7.4
nC
rr
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
on
2
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IRL3705Z/S/LPbF
1000
100
10
1000
100
10
VGS
12V
10V
8.0V
5.0V
4.5V
3.5V
3.0V
2.8V
VGS
12V
10V
8.0V
5.0V
4.5V
3.5V
3.0V
2.8V
TOP
TOP
BOTTOM
BOTTOM
1
2.8V
2.8V
0.1
0.01
60µs PULSE WIDTH
Tj = 175°C
≤
60µs PULSE WIDTH
Tj = 25°C
≤
1
0.1
1
10
100
1000
0.1
1
10
100
1000
V
, Drain-to-Source Voltage (V)
DS
V
, Drain-to-Source Voltage (V)
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
120
100
80
60
40
20
0
1000
100
10
T
= 25°C
J
T
= 175°C
J
T
= 175°C
J
T
= 25°C
J
1
V
= 15V
DS
V
= 8.0V
100
DS
≤
60µs PULSE WIDTH
0.1
0
2
4
6
8 10 12 14 16
0
20
I
40
60
80
120
,Drain-to-Source Current (A)
D
V
, Gate-to-Source Voltage (V)
GS
Fig 3. Typical Transfer Characteristics
Fig 4. Typical Forward Transconductance
vs. Drain Current
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3
IRL3705Z/S/LPbF
100000
6.0
5.0
4.0
3.0
2.0
1.0
0.0
V
= 0V,
= C
f = 1 MHZ
GS
I
= 52A
D
V
= 44V
= 28V
= 11V
C
C
C
+ C , C
SHORTED
DS
iss
gs
gd
ds
= C
V
rss
oss
gd
= C + C
DS
V
ds
gd
DS
10000
1000
100
C
iss
C
C
oss
rss
1
10
100
0
10
20
30
40
V
, Drain-to-Source Voltage (V)
Q
Total Gate Charge (nC)
DS
G
Fig 6. Typical Gate Charge vs.
Fig 5. Typical Capacitance vs.
Gate-to-SourceVoltage
Drain-to-SourceVoltage
1000
100
10
1000.00
100.00
10.00
OPERATION IN THIS AREA
LIMITED BY R
(on)
DS
T = 175°C
J
100µsec
1msec
T
= 25°C
J
Tc = 25°C
Tj = 175°C
V
= 0V
GS
Single Pulse
10msec
100
1
1.00
1
10
1000
0.0
0.5
1.0
1.5
2.0
V
, Drain-to-Source Voltage (V)
V
, Source-to-Drain Voltage (V)
DS
SD
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
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IRL3705Z/S/LPbF
2.0
1.5
1.0
0.5
100
90
80
70
60
50
40
30
20
10
0
I
= 43A
D
Limited By Package
V
= 5.0V
GS
-60 -40 -20
T
0
20 40 60 80 100 120 140 160 180
25
50
75
100
125
150
175
T
, Case Temperature (°C)
, Junction Temperature (°C)
J
C
Fig 10. Normalized On-Resistance
Fig 9. Maximum Drain Current vs.
vs.Temperature
CaseTemperature
10
1
0.1
D = 0.50
0.20
0.10
0.05
R1
R2
R2
R1
Ri (°C/W) τi (sec)
τ
J τJ
τ
0.5413
0.000384
τ
Cτ
0.02
0.01
1 τ1
Ci= τi/Ri
τ
2τ2
0.5985
0.002778
0.01
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
, Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRL3705Z/S/LPbF
500
400
300
200
100
0
15V
I
D
TOP
5.7A
8.5A
BOTTOM 52A
DRIVER
L
V
DS
D.U.T
AS
R
+
-
G
V
DD
I
A
2
V0GVS
Ω
0.01
t
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
25
50
75
100
125
150
175
Starting T , Junction Temperature (°C)
J
I
AS
Fig 12c. Maximum Avalanche Energy
Fig 12b. Unclamped Inductive Waveforms
vs. Drain Current
Q
G
10 V
Q
Q
GD
GS
3.0
2.5
2.0
1.5
1.0
0.5
V
G
Charge
I
= 250µA
Fig 13a. Basic Gate Charge Waveform
D
L
VCC
DUT
0
1K
-75 -50 -25
0
25 50 75 100 125 150 175 200
T , Temperature ( °C )
J
Fig 13b. Gate Charge Test Circuit
Fig 14. Threshold Voltage vs. Temperature
6
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IRL3705Z/S/LPbF
100
10
1
Duty Cycle = Single Pulse
0.01
Allowed avalanche Current vs
avalanche pulsewidth, tav
0.05
0.10
∆
assuming
Tj = 25°C due to
avalanche losses
0.1
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current vs.Pulsewidth
150
125
100
75
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
TOP
BOTTOM 1% Duty Cycle
= 52A
Single Pulse
I
D
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
50
25
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
0
D = Duty cycle in avalanche = tav ·f
25
50
75
100
125
150
175
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
Starting T , Junction Temperature (°C)
J
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Fig 16. Maximum Avalanche Energy
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
vs.Temperature
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IRL3705Z/S/LPbF
Driver Gate Drive
P.W.
P.W.
Period
Period
D =
D.U.T
+
*
=10V
V
GS
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D.U.T. I Waveform
SD
+
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
-
+
-
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
Re-Applied
Voltage
• dv/dt controlled by RG
RG
+
-
Body Diode
Forward Drop
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
RD
VDS
VGS
D.U.T.
RG
+VDD
-
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 18a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
t
r
t
t
f
d(on)
d(off)
Fig 18b. Switching Time Waveforms
8
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IRL3705Z/S/LPbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
TO-220AB Part Marking Information
EXAMPLE: THIS IS AN IRF1010
PART NUMBER
LOT CODE 1789
ASSEMBLED ON WW 19, 2000
IN THE ASSEMBLY LINE "C"
INTERNATIONAL
RECTIFIER
LOGO
DAT E CODE
YEAR 0 = 2000
WEEK 19
Note: "P" in assembly lineposition
indicates "L ead - F ree"
ASSEMBLY
LOT CODE
LINE C
Notes:
1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
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9
IRL3705Z/S/LPbF
D2Pak (TO-263AB) Package Outline
Dimensions are shown in millimeters (inches)
D2Pak (TO-263AB) Part Marking Information
THIS IS AN IRF530S WITH
PART NUMBER
LOT CODE 8024
INTERNATIONAL
RECTIFIER
LOGO
ASSEMBLED ON WW 02, 2000
IN THE ASSEMBLY LINE "L"
F530S
DATE CODE
YEAR 0 = 2000
WEE K 02
AS S E MB LY
LOT CODE
LINE L
OR
PART NUMBER
INTERNATIONAL
RECTIFIER
LOGO
F530S
DATE CODE
P = DE S IGNAT ES L EAD - F R EE
PRODUCT (OPTIONAL)
YEAR 0 = 2000
ASSEMBLY
LOT CODE
WEE K 02
A = AS S E MB LY S IT E CODE
Notes:
1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
10
www.irf.com
IRL3705Z/S/LPbF
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
EXAMPLE: THIS IS AN IRL3103L
LOT CODE 1789
PART NUMBER
INTERNATIONAL
RECTIFIER
ASSEMBLED ON WW 19, 1997
IN THE ASSEMBLY LINE "C"
LOGO
DAT E CODE
YEAR 7 = 1997
WE E K 19
AS S EMBL Y
LOT CODE
LINE C
OR
PART NUMBER
INTERNATIONAL
RECTIFIER
LOGO
DATE CODE
P = DESIGNATES LEAD-FREE
PRODUCT (OPTIONAL)
YEAR 7 = 1997
AS S EMBL Y
LOT CODE
WEE K 19
A = AS S EMBL Y S IT E CODE
Notes:
1. For an Automotive Qualified version of this part please seehttp://www.irf.com/product-info/auto/
2. For the most current drawing please refer to IR website at http://www.irf.com/package/
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11
IRL3705Z/S/LPbF
D2Pak Tape & Reel Information
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063)
1.50 (.059)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
0.368 (.0145)
0.342 (.0135)
FEED DIRECTION
1.85 (.073)
11.60 (.457)
11.40 (.449)
1.65 (.065)
24.30 (.957)
23.90 (.941)
15.42 (.609)
15.22 (.601)
TRL
1.75 (.069)
1.25 (.049)
10.90 (.429)
10.70 (.421)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039)
24.40 (.961)
4
3
Notes:
ꢀ Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
avalanche performance.
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
Limited by TJmax, starting TJ = 25°C,
L = 0.09mH RG = 25Ω, IAS = 52A, VGS =10V.
This value determined from sample failure population. 100%
tested to this value in production.
Part not recommended for use above this
value.
Pulse width ≤ 1.0ms; duty cycle ≤ 2%.
Coss eff. is a fixed capacitance that gives
the same charging time as Coss while VDS
This is only applied to TO-220AB pakcage.
This is applied to D2Pak, when mounted on 1" square PCB
(FR- 4 or G-10 Material). For recommended footprint and
soldering techniques refer to application note #AN-994.
R is measured at TJ of approximately 90°C.
θ
is rising from 0 to 80% VDSS
.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 10/2010
12
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Power Field-Effect Transistor, 75A I(D), 55V, 0.008ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-263AB, LEAD FREE, PLASTIC, D2PAK-3
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