IRL40T209 [INFINEON]
The IRL40T209 is a 40 V Logic Level StrongIRFETTM power MOSFET featuring high current capability and typical RDS(on) of 0.59 mOhm in a 10 x 11 mm TO-Leadless package.;
| 型号： | IRL40T209 |
| 厂家： | 
Infineon |
| 描述： | The IRL40T209 is a 40 V Logic Level StrongIRFETTM power MOSFET featuring high current capability and typical RDS(on) of 0.59 mOhm in a 10 x 11 mm TO-Leadless package. |
| 文件： | 总11页 (文件大小：1067K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
IRL40T209
MOSFET
HSOF
IRꢀMOSFETꢀ-ꢀStrongIRFETª
Benefits
Tab
•ꢀImprovedꢀGateꢀandꢀAvalancheꢀRuggedness
•ꢀFullyꢀCharacterizedꢀCapacitanceꢀandꢀAvalancheꢀSOA
•ꢀImprovedꢀIDꢀrating
1
•ꢀPb-Freeꢀ;ꢀRoHSꢀCompliantꢀ;ꢀHalogen-Free
2
3
4
5
6
7
8
Potentialꢀapplications
•ꢀBrushedꢀMotorꢀdriveꢀapplications
•ꢀBLDCꢀMotorꢀdriveꢀapplications
•ꢀBatteryꢀpoweredꢀcircuits
•ꢀHalf-bridgeꢀandꢀfull-bridgeꢀtopologies
•ꢀSynchronousꢀrectifierꢀapplications
•ꢀResonantꢀmodeꢀpowerꢀsupplies
•ꢀOR-ingꢀandꢀredundantꢀpowerꢀswitches
•ꢀDC/DCꢀandꢀAC/DCꢀconverters
•ꢀDC/ACꢀInverters
Drain
Tab
Gate
Pin 1
Source
Pin 2-8
Tableꢀ1ꢀꢀꢀꢀꢀKeyꢀPerformanceꢀParameters
Parameter
Value
Unit
VDS
40
V
RDS(on),typ
0.59
0.72
586
300
mΩ
mΩ
A
RDS(on),max
IDꢀ(SiliconꢀLimited)
IDꢀ(PackageꢀLimited)
A
Typeꢀ/ꢀOrderingꢀCode
Package
Marking
RelatedꢀLinks
IRL40T209
PG-HSOF-8
RL40T209
-
Final Data Sheet
1
Rev.ꢀ2.0,ꢀꢀ2018-05-05
IRꢀMOSFETꢀ-ꢀStrongIRFETª
IRL40T209
TableꢀofꢀContents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Final Data Sheet
2
Rev.ꢀ2.0,ꢀꢀ2018-05-05
IRꢀMOSFETꢀ-ꢀStrongIRFETª
IRL40T209
1ꢀꢀꢀꢀꢀMaximumꢀratings
atꢀTC=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified
Tableꢀ2ꢀꢀꢀꢀꢀMaximumꢀratings
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
VGS=10ꢀV,ꢀTC=25ꢀ°C
VGS=10ꢀV,ꢀTC=25ꢀ°Cꢀ(siliconꢀlimited)
-
-
-
-
-
-
300
586
347
Continuous drain current
ID
A
VGS=10ꢀV,ꢀTC=100ꢀ°Cꢀ(silicon
limited)1)
Pulsed drain current1)
Avalanche energy, single pulse2)
Gate source voltage
ID,pulse
EAS
-
-
-
-
-
1200
875
20
A
TC=25ꢀ°C
-
mJ
V
ID=100ꢀA,ꢀRGS=50ꢀΩ
VGS
Ptot
-20
-
-
Power dissipation
500
W
TC=25ꢀ°C
IEC climatic category; DIN IEC 68-1:
55/175/56
Operating and storage temperature
Tj,ꢀTstg
-55
-
175
°C
2ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Tableꢀ3ꢀꢀꢀꢀꢀThermalꢀcharacteristics
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Thermal resistance, junction - case,
bottom3)
RthJC
RthJC
RthJA
RthJA
-
-
-
-
-
0.3
°C/W -
°C/W -
°C/W -
°C/W -
Thermal resistance, junction - case,
top
-
-
-
20
30
12
Device on PCB,
6 cm² cooling area1)
Device on PCB,
RTHJA(<10s)
1) See Diagram 3 for more detailed information
2) See Diagram 13 for more detailed information
3)
R
thJC
is measured at TJ approximately 90°C.
Final Data Sheet
3
Rev.ꢀ2.0,ꢀꢀ2018-05-05
IRꢀMOSFETꢀ-ꢀStrongIRFETª
IRL40T209
3ꢀꢀꢀꢀꢀElectricalꢀcharacteristics
atꢀTj=25ꢀ°C,ꢀunlessꢀotherwiseꢀspecified
Tableꢀ4ꢀꢀꢀꢀꢀStaticꢀcharacteristics
Values
Typ.
-
Parameter
Symbol
V(BR)DSS
Unit Noteꢀ/ꢀTestꢀCondition
VGS=0ꢀV,ꢀID=250ꢀµA
mV/°CID=5ꢀmA,ꢀreferencedꢀtoꢀ25ꢀ°C
Min.
Max.
Drain-source breakdown voltage
40
-
V
Breakdown voltage temperature
coefficient
dV(BR)DSSꢀ/dTj -
VGS(th)
IDSS
31
-
-
Gate threshold voltage
1
2.4
V
VDS=VGS,ꢀID=250ꢀµA
-
-
-
-
1
150
VDS=40ꢀV,ꢀVGS=0ꢀV,ꢀTj=25ꢀ°C
VDS=40ꢀV,ꢀVGS=0ꢀV,ꢀTj=125ꢀ°C
Zero gate voltage drain current
Gate-source leakage current
Drain-source on-state resistance
µA
nA
mΩ
IGSS
-
-
100
VGS=20ꢀV,ꢀVDS=0ꢀV
-
-
0.59
0.75
0.72
1.10
VGS=10ꢀV,ꢀID=100ꢀA
VGS=4.5ꢀV,ꢀID=50ꢀA
RDS(on)
Gate resistance1)
Transconductance
RG
gfs
-
-
2.0
-
-
Ω
-
380
S
|VDS|≥2|ID|RDS(on)max,ꢀID=100ꢀA
Tableꢀ5ꢀꢀꢀꢀꢀDynamicꢀcharacteristics
Values
Typ.
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Input capacitance1)
Output capacitance1)
Reverse transfer capacitance1)
Ciss
Coss
Crss
-
-
-
16000 -
pF
pF
pF
VGS=0ꢀV,ꢀVDS=20ꢀV,ꢀf=1ꢀMHz
VGS=0ꢀV,ꢀVDS=20ꢀV,ꢀf=1ꢀMHz
VGS=0ꢀV,ꢀVDS=20ꢀV,ꢀf=1ꢀMHz
2200
1600
-
-
VDD=20ꢀV,ꢀVGS=4.5ꢀV,ꢀID=30ꢀA,
RG,ext=2.7ꢀΩ
Turn-on delay time
Rise time
td(on)
tr
td(off)
tf
-
-
-
-
60
-
-
-
-
ns
ns
ns
ns
VDD=20ꢀV,ꢀVGS=4.5ꢀV,ꢀID=30ꢀA,
RG,ext=2.7ꢀΩ
230
190
160
VDD=20ꢀV,ꢀVGS=4.5ꢀV,ꢀID=30ꢀA,
RG,ext=2.7ꢀΩ
Turn-off delay time
Fall time
VDD=20ꢀV,ꢀVGS=4.5ꢀV,ꢀID=30ꢀA,
RG,ext=2.7ꢀΩ
1) Defined by design. Not subject to production test.
Final Data Sheet
4
Rev.ꢀ2.0,ꢀꢀ2018-05-05
IRꢀMOSFETꢀ-ꢀStrongIRFETª
IRL40T209
Tableꢀ6ꢀꢀꢀꢀꢀGateꢀchargeꢀcharacteristics1)ꢀ
Values
Typ.
43
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Max.
Gate to source charge
Gate charge at threshold
Gate to drain charge2)
Switching charge
Qgs
-
-
-
-
-
-
-
-
-
nC
nC
nC
nC
nC
V
VDD=20ꢀV,ꢀID=100ꢀA,ꢀVGS=0ꢀtoꢀ4.5ꢀV
VDD=20ꢀV,ꢀID=100ꢀA,ꢀVGS=0ꢀtoꢀ4.5ꢀV
VDD=20ꢀV,ꢀID=100ꢀA,ꢀVGS=0ꢀtoꢀ4.5ꢀV
VDD=20ꢀV,ꢀID=100ꢀA,ꢀVGS=0ꢀtoꢀ4.5ꢀV
VDD=20ꢀV,ꢀID=100ꢀA,ꢀVGS=0ꢀtoꢀ4.5ꢀV
VDD=20ꢀV,ꢀID=100ꢀA,ꢀVGS=0ꢀtoꢀ4.5ꢀV
VDS=0.1ꢀV,ꢀVGS=0ꢀtoꢀ4.5ꢀV
Qg(th)
Qgd
26
-
83
-
Qsw
100
179
2.6
-
Gate charge total2)
Qg
269
Gate plateau voltage
Gate charge total, sync. FET
Output charge1)
Vplateau
Qg(sync)
Qoss
-
-
-
96
nC
nC
84
VDD=20ꢀV,ꢀVGS=0ꢀV
Tableꢀ7ꢀꢀꢀꢀꢀReverseꢀdiode
Values
Parameter
Symbol
Unit Noteꢀ/ꢀTestꢀCondition
Min.
Typ.
Max.
300
Diode continuous forward current3)
Diode pulse current
IS
-
-
-
-
-
-
A
A
V
TC=25ꢀ°C
IS,pulse
VSD
1200
1.2
TC=25ꢀ°C
Diode forward voltage
VGS=0ꢀV,ꢀIF=100ꢀA,ꢀTj=25ꢀ°C
VR=34ꢀV,ꢀIF=100ꢀA,ꢀdiF/dt=100ꢀA/µs,
Tj=25 °C
Reverse recovery time2)
trr
-
-
52
79
-
-
ns
VR=34ꢀV,ꢀIF=100ꢀA,ꢀdiF/dt=100ꢀA/µs,
Tj=25 °C
Reverse recovery charge2)
Qrr
nC
1) See ″Gate charge waveforms″ for parameter definition
2) Defined by design. Not subject to production test.
3) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
Final Data Sheet
5
Rev.ꢀ2.0,ꢀꢀ2018-05-05
IRꢀMOSFETꢀ-ꢀStrongIRFETª
IRL40T209
4ꢀꢀꢀꢀꢀElectricalꢀcharacteristicsꢀdiagrams
Diagramꢀ1:ꢀPowerꢀdissipation
Diagramꢀ2:ꢀDrainꢀcurrent
560
640
package limit
silicon limit
560
480
400
320
240
160
80
480
400
320
240
160
80
0
0
0
25
50
75
100
125
150
175
0
25
50
75
100
125
150
175
TCꢀ[°C]
TCꢀ[°C]
Ptot=f(TC)
ID=f(TC);ꢀVGS≥10ꢀV
Diagramꢀ3:ꢀSafeꢀoperatingꢀarea
Diagramꢀ4:ꢀMax.ꢀtransientꢀthermalꢀimpedance
104
101
single pulse
0.01
0.02
0.05
0.1
0.2
0.5
103
102
101
100
10-1
100
1 µs
10 µs
100 µs
10-1
10-2
10-3
10-4
1 ms
10 ms
DC
10-1
100
101
102
10-6
10-5
10-4
10-3
10-2
10-1
100
VDSꢀ[V]
tpꢀ[s]
ID=f(VDS);ꢀTC=25ꢀ°C;ꢀD=0;ꢀparameter:ꢀtp
ZthJC=f(tp);ꢀparameter:ꢀD=tp/T
Final Data Sheet
6
Rev.ꢀ2.0,ꢀꢀ2018-05-05
IRꢀMOSFETꢀ-ꢀStrongIRFETª
IRL40T209
Diagramꢀ5:ꢀTyp.ꢀoutputꢀcharacteristics
Diagramꢀ6:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance
1200
3.0
2.8 V
3 V
3.5 V
4 V
2.6
1000
800
600
400
200
0
4.5 V
5 V
6 V
8 V
10 V
2.2
3.5 V
4 V
1.8
1.4
1.0
0.6
0.2
4.5 V
5 V
8 V
10 V
0
1
2
3
4
5
0
200
400
600
800
1000
1200
1400
VDSꢀ[V]
IDꢀ[A]
ID=f(VDS),ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS
RDS(on)=f(ID),ꢀTj=25ꢀ°C;ꢀparameter:ꢀVGS
Diagramꢀ7:ꢀTyp.ꢀtransferꢀcharacteristics
Diagramꢀ8:ꢀTyp.ꢀdrain-sourceꢀonꢀresistance
1200
3.0
1000
800
600
400
200
2.5
2.0
1.5
125 °C
1.0
0.5
25 °C
25 °C
175 °C
0
0.0
0
1
2
3
4
5
2
4
6
8
10
12
14
16
18
20
VGSꢀ[V]
VGSꢀ[V]
ID=f(VGS),ꢀ|VDS|>2|ID|RDS(on)max;ꢀparameter:ꢀTj
RDS(on)=f(VGS),ꢀID=100ꢀA;ꢀparameter:ꢀTj
Final Data Sheet
7
Rev.ꢀ2.0,ꢀꢀ2018-05-05
IRꢀMOSFETꢀ-ꢀStrongIRFETª
IRL40T209
Diagramꢀ9:ꢀNormalizedꢀdrain-sourceꢀonꢀresistance
Diagramꢀ10:ꢀTyp.ꢀgateꢀthresholdꢀvoltage
2.4
2.4
2.0
1.6
1.2
0.8
0.4
0.0
2.0
1.6
1.2
0.8
0.4
2500 µA
250 µA
-75
-25
25
75
125
175
-75
-25
25
75
125
175
Tjꢀ[°C]
Tjꢀ[°C]
RDS(on)=f(Tj),ꢀID=100ꢀA,ꢀVGS=10ꢀV
VGS(th=f(Tj),ꢀVGS=VDS;ꢀparameter:ꢀID
Diagramꢀ11:ꢀTyp.ꢀcapacitances
Diagramꢀ12:ꢀForwardꢀcharacteristicsꢀofꢀreverseꢀdiode
105
104
25 °C
175 °C
103
102
101
100
10-1
Ciss
104
103
102
Coss
Crss
0
5
10
15
20
25
30
35
40
0.2
0.4
0.6
0.8
1.0
1.2
1.4
VDSꢀ[V]
VSDꢀ[V]
C=f(VDS);ꢀVGS=0ꢀV;ꢀf=1ꢀMHz
IF=f(VSD);ꢀparameter:ꢀTj
Final Data Sheet
8
Rev.ꢀ2.0,ꢀꢀ2018-05-05
IRꢀMOSFETꢀ-ꢀStrongIRFETª
IRL40T209
Diagramꢀ13:ꢀAvalancheꢀcharacteristics
Diagramꢀ14:ꢀTyp.ꢀgateꢀcharge
103
14
8 V
20 V
32 V
12
102
10
8
25 °C
101
100 °C
6
150 °C
4
100
2
10-1
0
100
101
102
103
104
0
50
100 150 200 250 300 350 400 450
tAVꢀ[µs]
Qgateꢀ[nC]
IAS=f(tAV);ꢀRGS=25ꢀΩ;ꢀparameter:ꢀTj,start
VGS=f(Qgate),ꢀID=100ꢀAꢀpulsed,ꢀTj=25ꢀ°C;ꢀparameter:ꢀVDD
Diagramꢀ15:ꢀDrain-sourceꢀbreakdownꢀvoltage
Diagram Gate charge waveforms
50
48
46
44
42
40
-75
-25
25
75
125
175
Tjꢀ[°C]
VBR(DSS)=f(Tj);ꢀID=5ꢀmA
Final Data Sheet
9
Rev.ꢀ2.0,ꢀꢀ2018-05-05
IRꢀMOSFETꢀ-ꢀStrongIRFETª
IRL40T209
5ꢀꢀꢀꢀꢀPackageꢀOutlines
1) partially covered with Mold Flash
MILLIMETERS
INCHES
DIM
MIN
MAX
2.40
0.90
9.90
0.50
0.60
10.58
MIN
MAX
0.094
0.035
0.390
0.020
0.024
0.416
A
b
2.20
0.70
9.70
0.42
0.40
10.28
0.087
0.028
0.382
0.017
0.016
0.405
DOCUMENT NO.
Z8B00176939
b1
b2
c
0
SCALE
D
D2
E
3.30
0.130
2
9.70
10.10
0.382
0.398
E1
E4
E5
e
7.50
8.50
0.295
0.335
0
2
4mm
9.46
1.20 (BSC)
0.372
0.047 (BSC)
H
11.48
6.55
11.88
6.75
0.452
0.258
0.468
0.266
EUROPEAN PROJECTION
H1
H2
H3
H4
N
7.15
3.59
3.26
8
0.281
0.141
0.128
8
K1
L
4.18
0.165
ISSUE DATE
28-04-2015
1.40
0.50
0.50
1.00
2.62
1.80
0.90
0.70
1.30
2.81
0.055
0.020
0.020
0.039
0.103
0.071
0.035
0.028
0.051
0.111
L1
L2
L4
L5
REVISION
01
Figureꢀ1ꢀꢀꢀꢀꢀOutlineꢀPG-HSOF-8,ꢀdimensionsꢀinꢀmm/inches
Final Data Sheet
10
Rev.ꢀ2.0,ꢀꢀ2018-05-05
IRꢀMOSFETꢀ-ꢀStrongIRFETª
IRL40T209
RevisionꢀHistory
IRL40T209
Revision:ꢀ2018-05-05,ꢀRev.ꢀ2.0
Previous Revision
Revision Date
Subjects (major changes since last revision)
1.0
2.0
Release of preliminary version
Release of final version
2018-04-24
2018-05-05
TrademarksꢀofꢀInfineonꢀTechnologiesꢀAG
AURIX™,ꢀC166™,ꢀCanPAK™,ꢀCIPOS™,ꢀCoolGaN™,ꢀCoolMOS™,ꢀCoolSET™,ꢀCoolSiC™,ꢀCORECONTROL™,ꢀCROSSAVE™,ꢀDAVE™,ꢀDI-POL™,ꢀDrBlade™,
EasyPIM™,ꢀEconoBRIDGE™,ꢀEconoDUAL™,ꢀEconoPACK™,ꢀEconoPIM™,ꢀEiceDRIVER™,ꢀeupec™,ꢀFCOS™,ꢀHITFET™,ꢀHybridPACK™,ꢀInfineon™,
ISOFACE™,ꢀIsoPACK™,ꢀi-Wafer™,ꢀMIPAQ™,ꢀModSTACK™,ꢀmy-d™,ꢀNovalithIC™,ꢀOmniTune™,ꢀOPTIGA™,ꢀOptiMOS™,ꢀORIGA™,ꢀPOWERCODE™,
PRIMARION™,ꢀPrimePACK™,ꢀPrimeSTACK™,ꢀPROFET™,ꢀPRO-SIL™,ꢀRASIC™,ꢀREAL3™,ꢀReverSave™,ꢀSatRIC™,ꢀSIEGET™,ꢀSIPMOS™,ꢀSmartLEWIS™,
SOLIDꢀFLASH™,ꢀSPOC™,ꢀTEMPFET™,ꢀthinQꢁ™,ꢀTRENCHSTOP™,ꢀTriCore™.
TrademarksꢀupdatedꢀAugustꢀ2015
OtherꢀTrademarks
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©ꢀ2018ꢀInfineonꢀTechnologiesꢀAG
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LegalꢀDisclaimer
Theꢀinformationꢀgivenꢀinꢀthisꢀdocumentꢀshallꢀinꢀnoꢀeventꢀbeꢀregardedꢀasꢀaꢀguaranteeꢀofꢀconditionsꢀorꢀcharacteristicsꢀ
(“Beschaffenheitsgarantie”)ꢀ.
Withꢀrespectꢀtoꢀanyꢀexamples,ꢀhintsꢀorꢀanyꢀtypicalꢀvaluesꢀstatedꢀhereinꢀand/orꢀanyꢀinformationꢀregardingꢀtheꢀapplicationꢀofꢀthe
product,ꢀInfineonꢀTechnologiesꢀherebyꢀdisclaimsꢀanyꢀandꢀallꢀwarrantiesꢀandꢀliabilitiesꢀofꢀanyꢀkind,ꢀincludingꢀwithoutꢀlimitation
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Theꢀdataꢀcontainedꢀinꢀthisꢀdocumentꢀisꢀexclusivelyꢀintendedꢀforꢀtechnicallyꢀtrainedꢀstaff.ꢀItꢀisꢀtheꢀresponsibilityꢀofꢀcustomer’s
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Warnings
Dueꢀtoꢀtechnicalꢀrequirements,ꢀcomponentsꢀmayꢀcontainꢀdangerousꢀsubstances.ꢀForꢀinformationꢀonꢀtheꢀtypesꢀinꢀquestion,
pleaseꢀcontactꢀtheꢀnearestꢀInfineonꢀTechnologiesꢀOffice.
TheꢀInfineonꢀTechnologiesꢀcomponentꢀdescribedꢀinꢀthisꢀDataꢀSheetꢀmayꢀbeꢀusedꢀinꢀlife-supportꢀdevicesꢀorꢀsystemsꢀand/or
automotive,ꢀaviationꢀandꢀaerospaceꢀapplicationsꢀorꢀsystemsꢀonlyꢀwithꢀtheꢀexpressꢀwrittenꢀapprovalꢀofꢀInfineonꢀTechnologies,ꢀifꢀa
failureꢀofꢀsuchꢀcomponentsꢀcanꢀreasonablyꢀbeꢀexpectedꢀtoꢀcauseꢀtheꢀfailureꢀofꢀthatꢀlife-support,ꢀautomotive,ꢀaviationꢀand
aerospaceꢀdeviceꢀorꢀsystemꢀorꢀtoꢀaffectꢀtheꢀsafetyꢀorꢀeffectivenessꢀofꢀthatꢀdeviceꢀorꢀsystem.ꢀLifeꢀsupportꢀdevicesꢀorꢀsystemsꢀare
intendedꢀtoꢀbeꢀimplantedꢀinꢀtheꢀhumanꢀbodyꢀorꢀtoꢀsupportꢀand/orꢀmaintainꢀandꢀsustainꢀand/orꢀprotectꢀhumanꢀlife.ꢀIfꢀtheyꢀfail,ꢀitꢀis
reasonableꢀtoꢀassumeꢀthatꢀtheꢀhealthꢀofꢀtheꢀuserꢀorꢀotherꢀpersonsꢀmayꢀbeꢀendangered.
Final Data Sheet
11
Rev.ꢀ2.0,ꢀꢀ2018-05-05
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