IRL530SPBF [INFINEON]

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IRL530SPBF
型号: IRL530SPBF
厂家: Infineon    Infineon
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PD - 91348C  
IRL530N  
HEXFET® Power MOSFET  
l Logic-Level Gate Drive  
l Advanced Process Technology  
l Dynamic dv/dt Rating  
l 175°C Operating Temperature  
l Fast Switching  
D
VDSS = 100V  
RDS(on) = 0.10Ω  
G
l Fully Avalanche Rated  
ID = 17A  
S
Description  
FifthGenerationHEXFETsfromInternationalRectifier  
utilize advanced processing techniques to achieve  
extremely low on-resistance per silicon area. This  
benefit, combined with the fast switching speed and  
ruggedized device design that HEXFET Power  
MOSFETs are well known for, provides the designer  
with an extremely efficient and reliable device for use  
in a wide variety of applications.  
The TO-220 package is universally preferred for all  
commercial-industrialapplicationsatpowerdissipation  
levels to approximately 50 watts. The low thermal  
resistance and low package cost of the TO-220  
contribute to its wide acceptance throughout the  
industry.  
TO-220AB  
Absolute Maximum Ratings  
Parameter  
Max.  
17  
Units  
ID @ TC = 25°C  
ID @ TC = 100°C  
IDM  
Continuous Drain Current, VGS @ 10V  
Continuous Drain Current, VGS @ 10V  
Pulsed Drain Current   
12  
A
60  
PD @TC = 25°C  
Power Dissipation  
79  
W
W/°C  
V
Linear Derating Factor  
0.53  
± 16  
150  
9.0  
7.9  
5.0  
VGS  
EAS  
IAR  
Gate-to-Source Voltage  
Single Pulse Avalanche Energy‚  
Avalanche Current  
mJ  
A
EAR  
dv/dt  
TJ  
Repetitive Avalanche Energy  
Peak Diode Recovery dv/dt ƒ  
Operating Junction and  
mJ  
V/ns  
-55 to + 175  
TSTG  
Storage Temperature Range  
Soldering Temperature, for 10 seconds  
Mounting torque, 6-32 or M3 srew  
°C  
300 (1.6mm from case )  
10 lbf•in (1.1N•m)  
Thermal Resistance  
Parameter  
Junction-to-Case  
Typ.  
–––  
Max.  
Units  
RθJC  
RθCS  
RθJA  
1.9  
–––  
62  
Case-to-Sink, Flat, Greased Surface  
Junction-to-Ambient  
0.50  
–––  
°C/W  
1/09/04  
IRL530N  
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)  
Parameter  
Min. Typ. Max. Units  
100 ––– –––  
Conditions  
VGS = 0V, ID = 250µA  
V(BR)DSS  
Drain-to-Source Breakdown Voltage  
V
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient ––– 0.122 ––– V/°C Reference to 25°C, ID = 1mA  
––– ––– 0.100  
––– ––– 0.120  
––– ––– 0.150  
VGS = 10V, ID = 9.0A „  
VGS = 5.0V, ID = 9.0A „  
VGS = 4.0V, ID = 8.0A „  
VDS = VGS, ID = 250µA  
VDS = 25V, ID = 9.0A  
RDS(on)  
Static Drain-to-Source On-Resistance  
VGS(th)  
gfs  
Gate Threshold Voltage  
1.0  
7.7  
––– 2.0  
––– –––  
V
S
Forward Transconductance  
––– ––– 25  
––– ––– 250  
––– ––– 100  
––– ––– -100  
––– ––– 34  
––– ––– 4.8  
––– ––– 20  
VDS = 100V, VGS = 0V  
VDS = 80V, VGS = 0V, TJ = 150°C  
IDSS  
IGSS  
Drain-to-Source Leakage Current  
µA  
nA  
Gate-to-Source Forward Leakage  
Gate-to-Source Reverse Leakage  
Total Gate Charge  
VGS = 16V  
VGS = -16V  
ID = 9.0A  
Qg  
Qgs  
Qgd  
td(on)  
tr  
Gate-to-Source Charge  
Gate-to-Drain ("Miller") Charge  
Turn-On Delay Time  
Rise Time  
nC VDS = 80V  
VGS = 5.0V, See Fig. 6 and 13 „  
–––  
–––  
–––  
–––  
7.2 –––  
53 –––  
30 –––  
26 –––  
VDD = 50V  
ID = 9.0A  
ns  
td(off)  
tf  
Turn-Off Delay Time  
Fall Time  
RG = 6.0Ω, VGS = 5.0V  
RD = 5.5Ω, See Fig. 10 „  
Between lead,  
D
LD  
LS  
Internal Drain Inductance  
Internal Source Inductance  
–––  
4.5  
–––  
nH  
6mm (0.25in.)  
G
from package  
––– 7.5 –––  
and center of die contact  
VGS = 0V  
S
Ciss  
Coss  
Crss  
Input Capacitance  
––– 800 –––  
––– 160 –––  
Output Capacitance  
pF  
VDS = 25V  
Reverse Transfer Capacitance  
–––  
90 –––  
ƒ = 1.0MHz, See Fig. 5  
Source-Drain Ratings and Characteristics  
Parameter  
Continuous Source Current  
(Body Diode)  
Min. Typ. Max. Units  
Conditions  
MOSFET symbol  
showing the  
D
IS  
17  
––– –––  
A
G
ISM  
Pulsed Source Current  
(Body Diode) †  
integral reverse  
––– ––– 60  
p-n junction diode.  
S
VSD  
trr  
Diode Forward Voltage  
Reverse Recovery Time  
Reverse RecoveryCharge  
Forward Turn-On Time  
––– ––– 1.3  
––– 140 210  
V
TJ = 25°C, IS = 9.0A, VGS = 0V „  
TJ = 25°C, IF = 9.0A  
ns  
Qrr  
ton  
––– 740 1100 nC  
di/dt = 100A/µs „  
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)  
Notes:  
 Repetitive rating; pulse width limited by  
max. junction temperature. ( See fig. 11 )  
‚ Starting TJ = 25°C, L = 3.7mH  
ƒ
„
ISD 9.0A, di/dt 540A/µs, VDD V(BR)DSS,  
TJ 175°C  
Pulse width 300µs; duty cycle 2%  
RG = 25, IAS = 9.0A. (See Figure 12)  
.
IRL530N  
100  
10  
1
100  
10  
1
VGS  
15V  
VGS  
15V  
TOP  
TOP  
12V  
12V  
10V  
10V  
8.0V  
6.0V  
4.0V  
3.0V  
8.0V  
6.0V  
4.0V  
3.0V  
BOTTOM 2.5V  
BOTTOM 2.5V  
2.5V  
2.5V  
20µs PULSE W IDTH  
20µs PULSE W IDTH  
T
= 25°C  
T
= 175°C  
J
J
0.1  
0.1  
A
A
100  
0.1  
1
10  
100  
0.1  
1
10  
V
, Drain-to-Source Voltage (V)  
V
, Drain-to-Source Voltage (V)  
DS  
DS  
Fig 2. Typical Output Characteristics  
Fig 1. Typical Output Characteristics  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
100  
10  
1
I
= 15A  
D
TJ = 25°C  
TJ = 175°C  
V
DS = 50V  
V
= 10V  
20µs PULSE W IDTH  
G S  
0.1  
A
10 A  
-60 -40 -20  
0
20  
40  
60  
80 100 120 140 160 180  
2
3
4
5
6
7
8
9
T
J
, Junction Tem perature (°C)  
VG S , Gate-to-Source Voltage (V)  
Fig 3. Typical Transfer Characteristics  
Fig 4. Normalized On-Resistance  
Vs. Temperature  
IRL530N  
1400  
15  
12  
9
V
C
C
C
= 0V ,  
f = 1M Hz  
I
= 9.0A  
D
G S  
iss  
= C  
+ C  
+ C  
,
C
SHORTE D  
V
V
V
= 80V  
= 50V  
= 20V  
gs  
gd  
ds  
DS  
DS  
DS  
= C  
gd  
1200  
1000  
800  
600  
400  
200  
0
rss  
oss  
= C  
ds  
gd  
C
iss  
6
C
C
oss  
rss  
3
FOR TE ST CIRCUIT  
S EE FIGURE 13  
0
A
A
1
10  
100  
0
10  
20  
30  
40  
50  
V
, Drain-to-Source Voltage (V)  
Q
, Total Gate Charge (nC)  
DS  
G
Fig 5. Typical Capacitance Vs.  
Fig 6. Typical Gate Charge Vs.  
Drain-to-Source Voltage  
Gate-to-Source Voltage  
100  
10  
1
1000  
O PERATION IN THIS ARE A LIM ITED  
BY R  
D S(on)  
T
= 175°C  
J
100  
10  
1
10µs  
T
= 25°C  
J
10 0µs  
1m s  
T
T
= 25°C  
= 175°C  
C
J
S ingle Pulse  
10m s  
V
= 0V  
G S  
A
A
1
10  
100  
1000  
0.4  
0.6  
0.8  
1.0  
1.2  
1.4  
V
, Drain-to-Source Voltage (V)  
V
, Source-to-Drain Voltage (V)  
DS  
SD  
Fig 7. Typical Source-Drain Diode  
Fig 8. Maximum Safe Operating Area  
Forward Voltage  
IRL530N  
20  
15  
10  
5
RD  
VDS  
VGS  
D.U.T.  
RG  
+VDD  
-
5.0V  
Pulse Width ≤ 1 µs  
Duty Factor ≤ 0.1 %  
Fig 10a. Switching Time Test Circuit  
V
DS  
90%  
0
25  
50  
75  
100  
125  
150  
175  
°
, Case Temperature ( C)  
T
C
10%  
V
GS  
Fig 9. Maximum Drain Current Vs.  
t
t
r
t
t
f
d(on)  
d(off)  
Case Temperature  
Fig 10b. Switching Time Waveforms  
10  
D = 0.50  
0.20  
1
0.10  
0.05  
P
DM  
0.1  
0.02  
0.01  
SINGLE PULSE  
(THERMAL RESPONSE)  
t
1
t
2
Notes:  
1. Duty factor D =  
t / t  
1 2  
2. Peak T = P  
x Z  
+ T  
C
J
DM  
thJC  
0.01  
0.00001  
0.0001  
0.001  
0.01  
0.1  
1
t , Rectangular Pulse Duration (sec)  
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case  
IRL530N  
350  
300  
250  
200  
150  
100  
50  
L
I
D
V
DS  
TO P  
3.7A  
6.4A  
9.0A  
D.U.T.  
BOTTOM  
R
+
-
G
V
DD  
I
5.0 V  
AS  
t
p
0.01Ω  
Fig 12a. Unclamped Inductive Test Circuit  
V
= 25V  
50  
DD  
0
A
V
(BR)DSS  
25  
75  
100  
125  
150  
175  
Starting T , Junction Tem perature (°C)  
t
J
p
V
DD  
Fig 12c. Maximum Avalanche Energy  
Vs. Drain Current  
V
DS  
I
AS  
Fig 12b. Unclamped Inductive Waveforms  
Current Regulator  
Same Type as D.U.T.  
50KΩ  
.2µF  
12V  
.3µF  
Q
G
+
5.0 V  
V
DS  
D.U.T.  
-
Q
Q
GD  
GS  
V
GS  
V
G
3mA  
I
I
D
G
Charge  
Current Sampling Resistors  
Fig 13b. Gate Charge Test Circuit  
Fig 13a. Basic Gate Charge Waveform  
IRL530N  
Peak Diode Recovery dv/dt Test Circuit  
+
Circuit Layout Considerations  
Low Stray Inductance  
Ground Plane  
Low Leakage Inductance  
Current Transformer  
D.U.T  
ƒ
-
+
‚
-
„
-
+

RG  
dv/dt controlled by RG  
+
-
Driver same type as D.U.T.  
ISD controlled by Duty Factor "D"  
D.U.T. - Device Under Test  
VDD  
Driver Gate Drive  
P.W.  
Period  
Period  
D =  
P.W.  
V
=10V  
*
GS  
D.U.T. I Waveform  
SD  
Reverse  
Recovery  
Current  
Body Diode Forward  
Current  
di/dt  
D.U.T. V Waveform  
DS  
Diode Recovery  
dv/dt  
V
DD  
Re-Applied  
Voltage  
Body Diode  
Forward Drop  
Inductor Curent  
I
SD  
Ripple 5%  
* VGS = 5V for Logic Level Devices  
Fig 14. For N-Channel HEXFETS  
IRL530N  
TO-220AB Package Outline  
Dimensions are shown in millimeters (inches)  
10.54 (.415)  
10.29 (.405)  
- B -  
3.78 (.149)  
3.54 (.139)  
2.87 (.113)  
2.62 (.103)  
4.69 (.185)  
4.20 (.165)  
1.32 (.052)  
1.22 (.048)  
- A -  
6.47 (.255)  
6.10 (.240)  
4
15.24 (.600)  
14.84 (.584)  
LEAD ASSIGNMENTS  
1.15 (.045)  
MIN  
HEXFET  
IGBTs, CoPACK  
1
2
3
1- GATE  
1- GATE  
2- DRAIN  
2- COLLECTOR  
3- EMITTER  
4- COLLECTOR  
3- SOURCE  
4- DRAIN  
14.09 (.555)  
13.47 (.530)  
4.06 (.160)  
3.55 (.140)  
0.93 (.037)  
0.69 (.027)  
0.55 (.022)  
0.46 (.018)  
3X  
3X  
1.40 (.055)  
3X  
1.15 (.045)  
0.36 (.014)  
M
B A M  
2.92 (.115)  
2.64 (.104)  
2.54 (.100)  
2X  
NOTES:  
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.  
2 CONTROLLING DIMENSION : INCH  
3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.  
HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.  
4
TO-220AB Part Marking Information  
Note: "P" in assembly line  
position indicates "Lead-Free"  
For GB Production  
EXAMPLE: THIS IS ANIRF1010  
LOT CODE 1789  
ASSEMBLEDONWW19, 1997  
IN THE ASSEMBLYLINE "C"  
PART NUMBER  
INTERNATIONAL  
RECTIFIER  
LOGO  
DATECODE  
YEAR7 = 1997  
WEEK19  
ASSEMBLY  
LOT CODE  
LINE C  
TO-220AB package is not recommended for Surface Mount Application.  
Data and specifications subject to change without notice.  
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105  
TAC Fax: (310) 252-7903  
Visit us at www.irf.com for sales contact information. 01/04  

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