IRLI3803-003PBF [INFINEON]
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| 型号： | IRLI3803-003PBF |
| 厂家： | 
Infineon |
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PD - 9.1320B
IRLI3803
HEXFET® Power MOSFET
l Logic-Level Gate Drive
D
l Advanced Process Technology
l Ultra Low On-Resistance
l Isolated Package
VDSS = 30V
RDS(on) = 0.006Ω
l High Voltage Isolation = 2.5KVRMS ꢀ
l Sink to Lead Creepage Dist. = 4.8mm
l Fully Avalanche Rated
G
ID = 76A
S
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedizeddevicedesignthatHEXFETPowerMOSFETs
arewellknownfor,providesthedesignerwithanextremely
efficient and reliable device for use in a wide variety of
applications.
The TO-220 Fullpak eliminates the need for additional
insulatinghardwareincommercial-industrialapplications.
The moulding compound used provides a high isolation
capability and a low thermal resistance between the tab
andexternalheatsink. Thisisolationisequivalenttousing
a 100 micron mica barrier with standard TO-220 product.
The Fullpak is mounted to a heatsink using a single clip or
by a single screw fixing.
TO-220 FULLPAK
Absolute Maximum Ratings
Parameter
Max.
Units
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Continuous Drain Current, VGS @ 5.0V
Continuous Drain Current, VGS @ 5.0V
Pulsed Drain Current
76
54
470
A
PD @TC = 25°C
Power Dissipation
63
W
W/°C
V
Linear Derating Factor
0.42
±16
VGS
EAS
IAR
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
610
mJ
A
71
EAR
dv/dt
TJ
Repetitive Avalanche Current
Peak Diode Recovery dv/dt
Operating Junction and
6.3
mJ
V/ns
5.0
-55 to + 175
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 screw.
°C
300 (1.6mm from case)
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
Junction-to-Case
Junction-to-Ambient
Min.
––––
––––
Typ.
––––
––––
Max.
2.4
65
Units
RθJC
RθJA
°C/W
8/25/97
IRLI3803
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
30 ––– –––
Conditions
VGS = 0V, ID = 250µA
V(BR)DSS
Drain-to-Source Breakdown Voltage
V
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.052 ––– V/°C Reference to 25°C, ID = 1mA
––– ––– 0.006
––– ––– 0.009
VGS = 10V, ID = 40A
VGS = 4.5V, ID = 34A
VDS = VGS, ID = 250µA
VDS = 25V, ID = 71A
VDS = 30V, VGS = 0V
VDS = 24V, VGS = 0V, TJ = 150°C
VGS = 16V
Ω
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
gfs
IDSS
Gate Threshold Voltage
1.0
55
––– –––
––– –––
V
S
Forward Transconductance
––– ––– 25
––– ––– 250
––– ––– 100
––– ––– -100
––– ––– 140
––– ––– 41
––– ––– 78
Drain-to-Source Leakage Current
µA
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
IGSS
nA
VGS = -16V
Qg
ID = 71A
Qgs
Qgd
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
nC
ns
VDS = 24V
VGS = 4.5V, See Fig. 6 and 13
VDD = 15V
–––
14 –––
––– 230 –––
ID = 71A
td(off)
tf
Turn-Off Delay Time
Fall Time
–––
–––
29 –––
35 –––
RG = 1.3Ω, VGS = 4.5V
RD = 0.20Ω, See Fig. 10
Between lead,
D
LD
LS
Internal Drain Inductance
Internal Source Inductance
––– 4.5 –––
––– 7.5 –––
6mm (0.25in.)
nH
pF
G
from package
S
and center of die contact
VGS = 0V
Ciss
Coss
Crss
C
Input Capacitance
––– 5000 –––
––– 1800 –––
––– 880 –––
Output Capacitance
VDS = 25V
Reverse Transfer Capacitance
Drain to Sink Capacitance
ƒ = 1.0MHz, See Fig. 5
ƒ = 1.0MHz
–––
12 –––
Source-Drain Ratings and Characteristics
Parameter
Continuous Source Current
(Body Diode)
Min. Typ. Max. Units
Conditions
MOSFET symbol
showing the
D
IS
––– ––– 76
A
G
ISM
Pulsed Source Current
(Body Diode)
integral reverse
––– ––– 470
S
p-n junction diode.
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
––– ––– 1.3
––– 120 180
––– 450 680
V
TJ = 25°C, IS = 40A, VGS = 0V
TJ = 25°C, IF = 71A
ns
Qrr
nC di/dt = 100A/µs
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
VDD = 15V, starting TJ = 25°C, L = 180µH
RG = 25Ω, IAS = 71A. (See Figure 12)
ꢀ t=60s, ƒ=60Hz
,
ISD ≤ 71A, di/dt ≤ 130A/µs, VDD ≤ V(BR)DSS
TJ ≤ 175°C
Pulse width ≤ 300µs; duty cycle ≤ 2%.
Uses IRL3803 data and test conditions
IRLI3803
10000
1000
100
10
10000
1000
100
10
VGS
15V
VGS
15V
TO P
TOP
12V
12V
10V
10V
8.0V
6.0V
4.0V
3.0V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.0V
BOTT OM 2.0V
1
2.0V
1
0.1
0.1
2.0V
20µs PULSE W IDTH
20µs PULSE W IDTH
T
= 175°C
T
= 25°C
J
J
0.01
0.01
A
A
0.1
1
10
100
0.1
1
10
100
VD S , Drain-to-Source Voltage (V)
VD S , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
2. 0
1. 5
1. 0
0. 5
0. 0
1 0 0 0
1 0 0
1 0
I
= 120A
D
T
= 25°C
J
T
= 175°C
J
1
0. 1
0 . 0 1
V
= 25V
DS
V
= 10V
2 0µ s PU LSE W ID TH
GS
A
9. 0A
2. 0
3. 0
4. 0
5. 0
6. 0
7. 0
8. 0
- 6 0 - 4 0 - 2 0
0
2 0
4 0
6 0
8 0 1 0 0 1 2 0 1 4 0 1 6 0 1 8 0
TJ , Junction Temperature (°C)
VG S , Gate-to -Source Volta ge (V)
Fig 4. Normalized On-Resistance
Vs. Temperature
IRLI3803
15
12
9
10000
I
= 71A
V
= 0V ,
f = 1MHz
D
GS
C
C
C
= C
= C
= C
+ C
+ C
,
C
SHORTED
iss
gs
g d
ds
gd
ds
V
V
= 24V
= 15V
DS
DS
rss
oss
C
C
is s
gd
8000
6000
4000
2000
0
o s s
6
C
rs s
3
FOR TEST CIRCUIT
SEE FIGURE 13
0
A
A
0
40
80
120
160
200
1
10
100
VD S , Drain-to-Source Voltage (V)
Q G , Total Gate Charge (nC)
Fig 6. Typical Gate Charge Vs.
Fig 5. Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
1 0 0 0
1000
100
10
OPE RATION IN THIS A RE A LIMITE D
BY R
D S(o n)
1 0µs
T
= 175°C
J
1 00µs
1 0 0
T
= 25°C
J
1 ms
T
T
= 25°C
= 175°C
C
J
S ingle Pulse
V
= 0V
10 ms
G S
1 0
A
A
0. 4
0. 8
1. 2
1. 6
2. 0
2. 4
2. 8
3. 2
1
10
100
V
, Drain-to-Source Voltage (V)
VSD , Source-to-Drain Voltage (V)
DS
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
IRLI3803
RD
80
60
40
20
0
VDS
VGS
D.U.T.
RG
+VDD
-
4.5V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
25
50
75
100
125
150
175
°
T , Case Temperature ( C)
C
10%
V
GS
t
t
r
t
t
f
d(on)
d(off)
Fig 9. Maximum Drain Current Vs.
Case Temperature
10
D = 0.50
1
0.20
0.10
P
DM
0.05
0.1
t
1
0.02
t
2
0.01
Notes:
1. Duty factor D =
2. Peak T =P
J
SINGLE PULSE
(THERMAL RESPONSE)
t / t
1
2
x Z
+ T
thJC C
DM
0.01
0.00001
0.0001
0.001
0.01
0.1
1
10
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
IRLI3803
L
V
1500
1200
900
600
300
0
DS
I
D
TOP
29A
D.U.T.
50A
R
G
BOTTOM 71A
+
-
V
DD
I
4.5 V
AS
t
p
0.01Ω
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
V
DD
V
= 15V
50
D D
A
175
25
75
100
125
150
Starting TJ , Junction Temperature (°C)
V
DS
Fig 12c. Maximum Avalanche Energy
I
AS
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
.3µF
Q
G
+
4.5 V
V
DS
D.U.T.
-
Q
Q
GD
GS
V
GS
V
G
3mA
I
I
D
G
Current Sampling Resistors
Charge
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
IRLI3803
Peak Diode Recovery dv/dt Test Circuit
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T
-
+
-
-
+
RG
• dv/dt controlled by RG
+
-
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VDD
Driver Gate Drive
P.W.
Period
Period
D =
P.W.
V
=10V
*
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
IRLI3803
Package Outline
TO-220 FullPak Outline
Dimensions are shown in millimeters (inches)
10.60 (.41 7)
10.40 (.40 9)
3.40 (.133 )
3.10 (.123 )
4.8 0 (.189)
4.6 0 (.181)
ø
2 .80 (.110)
2 .60 (.102)
- A
-
3.70 (.145)
3.20 (.126)
LE AD A S SIGN M E N T S
1
2
3
-
-
-
GA TE
7 .10 (.280)
6 .70 (.263)
D R AIN
SO U R C E
16 .0 0 (.630)
15 .8 0 (.622)
1.15 (.04 5)
M IN .
N O T ES :
1
D IM EN SION IN G & T O LER A N C IN G
PE R AN S I Y14.5 M , 1982
1
2
3
2
C O N TR OLLIN G D IM EN S ION : IN C H .
3.30 (.130 )
3.10 (.122 )
-
B
-
13 .7 0 (.540)
13 .5 0 (.530)
C
D
A
B
0.48 (.019)
0.44 (.017)
0.9 0 (.035)
3X
0.7 0 (.028)
3X
1.40 (.05 5)
1.05 (.04 2)
3X
2.85 (.112 )
2.65 (.104 )
0.25 (.010 )
A
M
B
M
M IN IM U M C R E EP AG E
D IST A NC E B ET W E EN
2 .54 (.100)
2X
A-B -C -D
= 4.80 (.189 )
Part Marking Information
TO-220 FullPak
EXAM PLE : THIS IS AN IRFI840G
W ITH ASSEMBLY
A
LOT CODE E401
PART NUMBER
INTERNATIONAL
RECTIFIER
LOGO
IRFI840G
E401 9 24 5
ASSEMBLY
DATE CODE
(YYW W )
LOT CODE
YY
=
YEAR
= W EEK
W W
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR FAR EAST: K&H Bldg., 2F, 3-30-4 Nishi-Ikeburo 3-Chome, Toshima-Ki, Tokyo Japan 171 Tel: 81 3 3983 0086
IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371
http://www.irf.com/
Data and specifications subject to change without notice.
8/97
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/
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