IRLI530NPBF [INFINEON]

HEXFET Power MOSFET; HEXFET功率MOSFET
IRLI530NPBF
型号: IRLI530NPBF
厂家: Infineon    Infineon
描述:

HEXFET Power MOSFET
HEXFET功率MOSFET

晶体 晶体管 功率场效应晶体管 开关 脉冲 局域网
文件: 总8页 (文件大小:225K)
中文:  中文翻译
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PD - 95635  
IRLI530NPbF  
HEXFET® Power MOSFET  
l Logic-Level Gate Drive  
l Advanced Process Technology  
l Isolated Package  
l High Voltage Isolation = 2.5KVRMS  
l Sink to Lead Creepage Dist. = 4.8mm  
l Fully Avalanche Rated  
D
VDSS = 100V  
RDS(on) = 0.10Ω  
G
l Lead-Free  
Description  
ID = 12A  
S
FifthGenerationHEXFETsfromInternationalRectifier  
utilize advanced processing techniques to achieve  
extremely low on-resistance per silicon area. This  
benefit, combined with the fast switching speed and  
ruggedized device design that HEXFET Power  
MOSFETs are well known for, provides the designer  
with an extremely efficient and reliable device for use  
in a wide variety of applications.  
The TO-220 Fullpak eliminates the need for additional  
insulating hardware in commercial-industrial  
applications. The moulding compound used provides  
a high isolation capability and a low thermal resistance  
between the tab and external heatsink. This isolation  
is equivalent to using a 100 micron mica barrier with  
standard TO-220 product. The Fullpak is mounted to  
a heatsink using a single clip or by a single screw  
fixing.  
TO-220 FULLPAK  
Absolute Maximum Ratings  
Parameter  
Max.  
Units  
ID @ TC = 25°C  
ID @ TC = 100°C  
IDM  
Continuous Drain Current, VGS @ 10V  
Continuous Drain Current, VGS @ 10V  
Pulsed Drain Current †  
12  
8.6  
A
60  
PD @TC = 25°C  
Power Dissipation  
41  
W
W/°C  
V
Linear Derating Factor  
0.27  
± 16  
150  
VGS  
EAS  
IAR  
Gate-to-Source Voltage  
Single Pulse Avalanche Energy‚†  
Avalanche Current†  
mJ  
A
9.0  
EAR  
dv/dt  
TJ  
Repetitive Avalanche Energy  
Peak Diode Recovery dv/dt ƒ†  
Operating Junction and  
4.1  
mJ  
V/ns  
5.0  
-55 to + 175  
TSTG  
Storage Temperature Range  
Soldering Temperature, for 10 seconds  
Mounting torque, 6-32 or M3 screw  
°C  
300 (1.6mm from case )  
10 lbf•in (1.1N•m)  
Thermal Resistance  
Parameter  
Junction-to-Case  
Typ.  
–––  
Max.  
3.7  
Units  
°C/W  
1
RθJC  
RθJA  
Junction-to-Ambient  
–––  
65  
www.irf.com  
07/23/04  
IRLI530NPbF  
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)  
Parameter  
Min. Typ. Max. Units  
100 ––– –––  
Conditions  
VGS = 0V, ID = 250µA  
V(BR)DSS  
Drain-to-Source Breakdown Voltage  
V
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient ––– 0.122 ––– V/°C Reference to 25°C, ID = 1mA†  
––– ––– 0.100  
––– ––– 0.120  
––– ––– 0.150  
VGS = 10V, ID = 9.0A „  
GS = 5.0V, ID = 9.0A „  
RDS(on)  
Static Drain-to-Source On-Resistance  
V
VGS = 4.0V, ID = 8.0A „  
VDS = VGS, ID = 250µA  
VDS = 50V, ID = 9.0A†  
VDS = 100V, VGS = 0V  
VDS = 80V, VGS = 0V, TJ = 150°C  
VGS = 16V  
VGS(th)  
gfs  
Gate Threshold Voltage  
1.0  
7.7  
––– 2.0  
––– –––  
V
S
Forward Transconductance  
––– ––– 25  
––– ––– 250  
––– ––– 100  
––– ––– -100  
––– ––– 34  
––– ––– 4.8  
––– ––– 20  
µA  
nA  
IDSS  
IGSS  
Drain-to-Source Leakage Current  
Gate-to-Source Forward Leakage  
Gate-to-Source Reverse Leakage  
Total Gate Charge  
VGS = -16V  
Qg  
ID = 9.0A  
Qgs  
Qgd  
td(on)  
tr  
Gate-to-Source Charge  
Gate-to-Drain ("Miller") Charge  
Turn-On Delay Time  
Rise Time  
nC VDS = 80V  
VGS = 5.0V, See Fig. 6 and 13 „†  
–––  
–––  
–––  
–––  
7.2 –––  
53 –––  
30 –––  
26 –––  
VDD = 50V  
ID = 9.0A  
ns  
td(off)  
tf  
Turn-Off Delay Time  
Fall Time  
RG = 6.0Ω, VGS = 5.0V  
RD = 5.5Ω, See Fig. 10 „†  
Between lead,  
D
LD  
LS  
Internal Drain Inductance  
Internal Source Inductance  
––– 4.5 –––  
––– 7.5 –––  
6mm (0.25in.)  
nH  
pF  
G
from package  
and center of die contact  
VGS = 0V  
S
Ciss  
Coss  
Crss  
C
Input Capacitance  
––– 800 –––  
––– 160 –––  
Output Capacitance  
VDS = 25V  
Reverse Transfer Capacitance  
Drain to Sink Capacitance  
–––  
–––  
90 –––  
12 –––  
ƒ = 1.0MHz, See Fig. 5†  
ƒ = 1.0MHz  
Source-Drain Ratings and Characteristics  
Parameter  
Continuous Source Current  
(Body Diode)  
Min. Typ. Max. Units  
Conditions  
MOSFET symbol  
showing the  
D
IS  
12  
60  
––– –––  
––– –––  
A
G
ISM  
Pulsed Source Current  
(Body Diode) †  
integral reverse  
p-n junction diode.  
S
VSD  
trr  
Diode Forward Voltage  
Reverse Recovery Time  
Reverse RecoveryCharge  
Forward Turn-On Time  
––– ––– 1.3  
––– 140 210  
V
TJ = 25°C, IS = 6.6A, VGS = 0V „  
TJ = 25°C, IF = 9.0A  
ns  
Qrr  
ton  
––– 740 1100 nC  
di/dt = 100A/µs „†  
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)  
Notes:  
„ Pulse width 300µs; duty cycle 2%.  
 Repetitive rating; pulse width limited by  
max. junction temperature. ( See fig. 11 )  
‚ Starting TJ = 25°C, L = 3.1mH  
t=60s, ƒ=60Hz  
RG = 25, IAS = 9.0A. (See Figure 12)  
ƒ ISD 9.0A, di/dt 540A/µs, VDD V(BR)DSS  
TJ 175°C  
† Uses IRL530N data and test conditions  
,
2
www.irf.com  
IRLI530NPbF  
100  
10  
1
VGS  
15V  
100  
10  
1
VGS  
15V  
TOP  
TOP  
12V  
10V  
8.0V  
6.0V  
4.0V  
3.0V  
12V  
10V  
8.0V  
6.0V  
4.0V  
3.0V  
BOTTOM 2.5V  
BOTTOM 2.5V  
2.5V  
2.5V  
20µs PULSE WIDTH  
20µs PULSE WIDTH  
T
= 175°C  
J
T
= 25°C  
0.1  
0.1  
J
A
0.1  
0.1  
A
1
10  
100  
1
10  
100  
V
, Drain-to-Source Voltage (V)  
DS  
V
, Drain-to-Source Voltage (V)  
DS  
Fig 2. Typical Output Characteristics,  
Fig 1. Typical Output Characteristics,  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
100  
I
= 15A  
D
TJ = 25°C  
TJ = 175°C  
10  
1
V DS= 50V  
20µs PULSE WIDTH  
V
= 10V  
GS  
0.1  
A
10A  
-60 -40 -20  
0
20 40 60 80 100 120 140 160 180  
2
3
4
5
6
7
8
9
T , Junction Temperature (°C)  
VGS , Gate-to-Source Voltage (V)  
J
Fig 3. Typical Transfer Characteristics  
Fig 4. Normalized On-Resistance  
Vs. Temperature  
www.irf.com  
3
IRLI530NPbF  
1400  
15  
12  
9
V
C
C
C
= 0V,  
f = 1MHz  
I
= 9.0A  
GS  
iss  
rss  
oss  
D
= C + C  
,
C
SHORTED  
gs  
gd  
ds  
V
V
V
= 80V  
= 50V  
= 20V  
DS  
DS  
DS  
= C  
gd  
1200  
1000  
800  
600  
400  
200  
0
= C + C  
ds  
gd  
C
iss  
6
C
oss  
C
rss  
3
FOR TEST CIRCUIT  
SEE FIGURE 13  
A
0
A
1
10  
100  
0
10  
20  
30  
40  
50  
V
, Drain-to-Source Voltage (V)  
Q
, Total Gate Charge (nC)  
DS  
G
Fig 5. Typical Capacitance Vs.  
Fig 6. Typical Gate Charge Vs.  
Drain-to-Source Voltage  
Gate-to-Source Voltage  
100  
10  
1
1000  
100  
10  
OPERATION IN THIS AREA LIMITED  
BY R  
DS(on)  
T = 175°C  
J
10µs  
T = 25°C  
J
100µs  
1ms  
T
T
= 25°C  
C
J
= 175°C  
V
= 0V  
GS  
Single Pulse  
A
10ms  
100  
1
A
1000  
0.4  
0.6  
0.8  
1.0  
1.2  
1.4  
1
10  
V
, Source-to-Drain Voltage (V)  
SD  
V
, Drain-to-Source Voltage (V)  
DS  
Fig 8. Maximum Safe Operating Area  
Fig 7. Typical Source-Drain Diode  
Forward Voltage  
4
www.irf.com  
IRLI530NPbF  
12  
9
RD  
VDS  
VGS  
D.U.T.  
RG  
+VDD  
-
5.0V  
6
Pulse Width ≤ 1 µs  
Duty Factor ≤ 0.1 %  
Fig 10a. Switching Time Test Circuit  
3
V
DS  
90%  
0
25  
50  
75  
100  
125  
150  
175  
°
T , Case Temperature ( C)  
C
10%  
V
GS  
Fig 9. Maximum Drain Current Vs.  
t
t
r
t
t
f
d(on)  
d(off)  
Case Temperature  
Fig 10b. Switching Time Waveforms  
10  
D = 0.50  
1
0.20  
0.10  
0.05  
P
2
DM  
0.02  
0.01  
0.1  
SINGLE PULSE  
(THERMAL RESPONSE)  
t
1
t
2
Notes:  
1. Duty factor D =  
t / t  
1
2. Peak T = P  
x Z  
+ T  
C
J
DM  
thJC  
0.01  
0.00001  
0.0001  
0.001  
0.01  
0.1  
1
t , Rectangular Pulse Duration (sec)  
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case  
www.irf.com  
5
IRLI530NPbF  
350  
300  
250  
200  
150  
100  
50  
I
D
TOP  
3.7A  
6.4A  
BOTTOM 9.0A  
15V  
DRIVER  
+
L
V
DS  
D.U.T  
R
G
V
DD  
-
I
A
AS  
10V  
0.01  
t
p
Fig 12a. Unclamped Inductive Test Circuit  
V
= 25V  
50  
DD  
0
A
175  
25  
75  
100  
125  
150  
Starting T , Junction Temperature (°C)  
J
V
(BR)DSS  
t
p
Fig 12c. Maximum Avalanche Energy  
Vs. Drain Current  
I
AS  
Current Regulator  
Fig 12b. Unclamped Inductive Waveforms  
Same Type as D.U.T.  
50KΩ  
.2µF  
12V  
.3µF  
Q
G
+
5.0 V  
V
DS  
D.U.T.  
-
Q
Q
GD  
GS  
V
GS  
V
G
3mA  
I
I
D
G
Current Sampling Resistors  
Charge  
Fig 13b. Gate Charge Test Circuit  
Fig 13a. Basic Gate Charge Waveform  
6
www.irf.com  
IRLI530NPbF  
Peak Diode Recovery dv/dt Test Circuit  
+
Circuit Layout Considerations  
Low Stray Inductance  
Ground Plane  
Low Leakage Inductance  
Current Transformer  
D.U.T  
ƒ
-
+
‚
-
„
-
+

RG  
dv/dt controlled by RG  
+
-
Driver same type as D.U.T.  
ISD controlled by Duty Factor "D"  
D.U.T. - Device Under Test  
VDD  
Driver Gate Drive  
P.W.  
P.W.  
Period  
Period  
D =  
V
=10V  
*
GS  
D.U.T. I Waveform  
SD  
Reverse  
Recovery  
Current  
Body Diode Forward  
Current  
di/dt  
D.U.T. V Waveform  
DS  
Diode Recovery  
dv/dt  
V
DD  
Re-Applied  
Voltage  
Body Diode  
Forward Drop  
Inductor Curent  
I
SD  
Ripple 5%  
* VGS = 5V for Logic Level Devices  
Fig 14. For N-Channel HEXFETS  
www.irf.com  
7
IRLI530NPbF  
TO-220 Full-Pak Package Outline  
Dimensions are shown in millimeters (inches)  
TO-220 Full-Pak Part Marking Information  
EXAMP LE: THIS IS AN IRFI840 G  
WITH AS S EMBLY  
P ART NUMBER  
LO T CO DE 3 43 2  
INT E RNAT IO NAL  
RE CT IF IE R  
LO G O  
IRFI840G  
924K  
AS S EMBLED O N WW 24 199 9  
IN THE AS S EMBLY LINE "K"  
34  
32  
DATE CO DE  
YEAR 9 = 199 9  
WEEK 24  
Note: "P" in assembly line  
position indicates "Lead-Free"  
AS S EMBLY  
LO T CO DE  
LINE K  
Data and specifications subject to change without notice.  
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105  
TAC Fax: (310) 252-7903  
Visit us at www.irf.com for sales contact information. 07/04  
8
www.irf.com  

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