IRLIZ34N [INFINEON]
Power MOSFET; 功率MOSFET型号: | IRLIZ34N |
厂家: | Infineon |
描述: | Power MOSFET |
文件: | 总8页 (文件大小:107K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PD - 9.1329B
IRLIZ34N
HEXFET® Power MOSFET
l Logic-Level Gate Drive
l Advanced Process Technology
l Isolated Package
D
VDSS = 55V
l High Voltage Isolation = 2.5KVRMS ꢀ
l Sink to Lead Creepage Dist. = 4.8mm
l Fully Avalanche Rated
RDS(on) = 0.035Ω
G
ID = 22A
S
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve the
lowestpossibleon-resistancepersiliconarea. Thisbenefit,
combined with the fast switching speed and ruggedized
device design that HEXFET Power MOSFETs are well
knownfor, providesthedesignerwithanextremelyefficient
device for use in a wide variety of applications.
The TO-220 Fullpak eliminates the need for additional
insulating hardware in commercial-industrial applications.
The moulding compound used provides a high isolation
capability and a low thermal resistance between the tab
and external heatsink. This isolation is equivalent to using
a 100 micron mica barrier with standard TO-220 product.
The Fullpak is mounted to a heatsink using a single clip or
by a single screw fixing.
TO-220 FULLPAK
Absolute Maximum Ratings
Parameter
Max.
Units
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
22
15
A
110
PD @TC = 25°C
Power Dissipation
37
W
W/°C
V
Linear Derating Factor
0.24
±16
VGS
EAS
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
110
mJ
IAR
16
A
EAR
dv/dt
TJ
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
3.7
mJ
5.0
V/ns
-55 to + 175
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 screw.
°C
300 (1.6mm from case)
10 lbf•in (1.1N•m)
Thermal Resistance
Parameter
Junction-to-Case
Junction-to-Ambient
Min.
––––
––––
Typ.
––––
––––
Max.
4.1
65
Units
RθJC
RθJA
°C/W
8/25/97
IRLIZ34N
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
Conditions
V(BR)DSS
Drain-to-Source Breakdown Voltage
55 ––– –––
V
VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.065 ––– V/°C Reference to 25°C, ID = 1mA
––– ––– 0.035
VGS = 10V, ID = 12A
VGS = 5.0V, ID = 12A
VGS = 4.0V, ID = 10A
VDS = VGS, ID = 250µA
VDS = 25V, ID = 16A
VDS = 55V, VGS = 0V
VDS = 44V, VGS = 0V, TJ = 150°C
VGS = 16V
RDS(on)
Static Drain-to-Source On-Resistance
–––
–––
1.0
11
––– 0.046
––– 0.060
––– 2.0
––– –––
Ω
VGS(th)
gfs
Gate Threshold Voltage
V
S
Forward Transconductance
––– ––– 25
––– ––– 250
––– ––– 100
––– ––– -100
––– ––– 25
––– ––– 5.2
––– ––– 14
µA
nA
IDSS
IGSS
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
VGS = -16V
Qg
ID = 16A
Qgs
Qgd
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
nC VDS = 44V
VGS = 5.0V, See Fig. 6 and 13
–––
8.9 –––
VDD = 28V
––– 100 –––
ID = 16A
ns
td(off)
tf
Turn-Off Delay Time
Fall Time
–––
–––
29 –––
21 –––
RG = 6.5Ω, VGS = 5.0V
RD = 1.8Ω, See Fig. 10
Between lead,
D
LD
Internal Drain Inductance
––– 4.5 –––
6mm (0.25in.)
nH
pF
G
from package
LS
Internal Source Inductance
––– 7.5 –––
and center of die contact
VGS = 0V
S
Ciss
Coss
Crss
C
Input Capacitance
––– 880 –––
––– 220 –––
Output Capacitance
VDS = 25V
Reverse Transfer Capacitance
Drain to Sink Capacitance
–––
–––
94 –––
12 –––
ƒ = 1.0MHz, See Fig. 5
ƒ = 1.0MHz
Source-Drain Ratings and Characteristics
Parameter
Continuous Source Current
(Body Diode)
Min. Typ. Max. Units
Conditions
MOSFET symbol
D
IS
––– ––– 22
A
showing the
G
ISM
Pulsed Source Current
(Body Diode)
integral reverse
––– ––– 110
S
p-n junction diode.
TJ = 25°C, IS = 12A, VGS = 0V
TJ = 25°C, IF = 16A
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
––– ––– 1.3
––– 76 110
––– 190 290
V
ns
Qrr
nC di/dt = 100A/µs
Notes:
Pulse width ≤ 300µs; duty cycle ≤ 2%.
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
VDD = 25V, starting TJ = 25°C, L = 610µH
RG = 25Ω, IAS = 16A. (See Figure 12)
ꢀ t=60s, ƒ=60Hz
Uses IRLZ34N data and test conditions
ISD ≤ 16A, di/dt ≤ 270A/µs, VDD ≤ V(BR)DSS
TJ ≤ 175°C
,
IRLIZ34N
10000
1000
100
10
10000
1000
100
10
VGS
VGS
15V
TOP
7.50V
5.00V
4.00V
3.50V
3.00V
2.75V
2.50V
TOP
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.25V
BOTT OM 2.0V
1
1
2.0V
0.1
0.1
2.0V
0.01
0.001
0.01
0.001
20µs PULSE W IDTH
20µs PULS E W IDTH
T
= 175°C
T
= 25°C
J
J
A
A
0.1
1
10
100
0.1
1
10
100
VD S , Drain-to-Source Voltage (V)
VD S , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1 0 0 0
3. 0
I
= 27A
D
T
= 25°C
J
2. 5
2. 0
1. 5
1. 0
0. 5
0. 0
1 0 0
1 0
T
= 175°C
J
1
0. 1
0 . 0 1
V
= 25V
2 0µ s PU LSE W ID TH
DS
V
= 10V
GS
A
1 0 A
2
3
4
5
6
7
8
9
- 6 0 - 4 0 - 2 0
0
2 0
4 0
6 0
8 0 1 0 0 1 2 0 1 4 0 1 6 0 1 8 0
TJ , Junction Temperature (°C)
VG S , Gate-to -Source Volta ge (V)
Fig 4. Normalized On-Resistance
Fig 3. Typical Transfer Characteristics
Vs. Temperature
IRLIZ34N
15
12
9
1400
I
= 16A
D
V
C
C
C
= 0V,
f = 1MHz
GS
iss
= C
= C
= C
+ C
+ C
,
C
d s
SHORTED
gs
gd
ds
gd
V
V
= 44V
= 28V
D S
D S
1200
1000
800
600
400
200
0
rss
oss
gd
C
iss
C
C
o s s
rs s
6
3
FOR TE ST CIRCUIT
SE E FIGURE 13
A
0
A
1
10
100
0
4
8
12
16
20
24
28
32
VD S , Drain-to-Source Voltage (V)
Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs.
Fig 6. Typical Gate Charge Vs.
Drain-to-Source Voltage
Gate-to-Source Voltage
1 0 0 0
1 0 0
1 0
1000
100
10
OPE RATION IN THIS A RE A LIMITE D
BY R
D S(o n)
10µs
T
= 175°C
J
1 00µs
T
= 25°C
J
1m s
T
T
= 25°C
= 175°C
C
J
10m s
S ingle Pulse
V
= 0V
GS
1
A
1
A
0. 4
0. 6
0. 8
1. 0
1. 2
1. 4
1. 6
1. 8
2. 0
1
10
100
V
, Drain-to-Source Voltage (V)
VSD , Source-to-Drain Voltage (V)
DS
Fig 7. Typical Source-Drain Diode
Fig 8. Maximum Safe Operating Area
Forward Voltage
IRLIZ34N
25
20
15
10
5
RD
VDS
VGS
D.U.T.
RG
+VDD
-
5.0V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
0
25
50
75
100
125
150
175
°
T , Case Temperature ( C)
C
10%
V
GS
Fig 9. Maximum Drain Current Vs.
t
t
r
t
t
f
d(on)
d(off)
Case Temperature
Fig 10b. Switching Time Waveforms
10
D = 0.50
0.20
1
0.10
0.05
0.02
0.01
P
DM
SINGLE PULSE
(THERMAL RESPONSE)
0.1
t
1
t
2
Notes:
1. Duty factor D =
t / t
1
2
2. Peak T =P
x Z
+ T
C
J
DM
thJC
0.01
0.00001
0.0001
0.001
0.01
0.1
1
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
IRLIZ34N
250
200
150
100
50
I
L
D
V
DS
TOP
6.6A
11A
BOTTOM 16A
D.U.T.
R
G
+
-
V
DD
I
5.0 V
AS
t
p
0.01Ω
Fig 12a. Unclamped Inductive Test Circuit
V
= 25V
50
D D
0
A
175
V
(BR)DSS
25
75
100
125
150
t
Starting TJ , Junction Temperature (°C)
p
V
DD
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
V
DS
I
AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
.3µF
Q
G
+
5.0 V
V
DS
D.U.T.
-
Q
Q
GD
GS
V
GS
V
G
3mA
I
I
D
G
Charge
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
IRLIZ34N
Peak Diode Recovery dv/dt Test Circuit
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T
-
+
-
-
+
RG
• dv/dt controlled by RG
+
-
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VDD
Driver Gate Drive
P.W.
Period
Period
D =
P.W.
V
=10V
*
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
IRLIZ34N
Package Outline
TO-220 FullPak Outline
Dimensions are shown in millimeters (inches)
1 0.60 (.417)
1 0.40 (.409)
3.40 (.133)
3.10 (.123)
4.80 (.189)
4.60 (.181)
ø
2.80 (.110)
2.60 (.102)
- A
-
3.70 (.145)
3.20 (.126)
LE AD AS SIGN M EN T S
1
2
3
-
-
-
GA TE
D R AIN
SO U RC E
7.10 (.2 80)
6.70 (.2 63)
16.00 (.630)
15.80 (.622)
1.15 (.045)
M IN .
N OT ES :
1
D IME N SION IN G & T OLE R AN C IN G
PER A NS I Y 14.5M , 1982
1
2
3
2
C ON T R OLLIN G D IM EN SION : IN CH .
3.30 (.130)
3.10 (.122)
- B
-
13.70 (.540)
13.50 (.530)
C
D
A
B
0.48 (.019)
3X
0.44 (.017)
0.90 (.0 35 )
3X
0.70 (.0 28 )
1.40 (.055)
3X
1.05 (.042)
2 .85 (.112)
2 .65 (.104)
0.25 (.010)
A
M
B
M
M IN IM U M C RE EPA GE
D IS TA NC E BET W EE N
A-B-C -D = 4.80 (.189)
2.54 (.100)
2X
Part Marking Information
TO-220 FullPak
EXAM PLE : THIS IS AN IRFI840G
W ITH ASSEMBLY
A
LOT CODE E401
PART NUMBER
INTERNATIONAL
RECTIFIER
LOGO
IRFI840G
E401 9 24 5
ASSEMBLY
DATE CODE
(YYW W )
LOT CODE
YY
=
YEAR
= W EEK
W W
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086
IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371
http://www.irf.com/
Data and specifications subject to change without notice.
8/97
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