IRLR3714Z [INFINEON]
HEXFET Power MOSFET; HEXFET功率MOSFET
| 型号： | IRLR3714Z |
| 厂家： | 
Infineon |
| 描述： | HEXFET Power MOSFET |
| 文件： | 总11页 (文件大小：260K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 95775A
IRLR3714ZPbF
IRLU3714ZPbF
HEXFET® Power MOSFET
Applications
VDSS RDS(on) max
Qg
l High Frequency Synchronous Buck
Converters for Computer Processor Power
l High Frequency Isolated DC-DC
Converters with Synchronous Rectification
for Telecom and Industrial Use
l Lead-Free
15m
20V
4.7nC
Benefits
l Very Low RDS(on) at 4.5V VGS
l Ultra-Low Gate Impedance
l Fully Characterized Avalanche Voltage
and Current
D-Pak
IRLR3714Z
I-Pak
IRLU3714Z
Absolute Maximum Ratings
Parameter
Drain-to-Source Voltage
Max.
20
Units
V
VDS
V
Gate-to-Source Voltage
± 20
37
GS
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
I
I
I
@ TC = 25°C
@ TC = 100°C
D
D
26
144
35
A
DM
Maximum Power Dissipation
Maximum Power Dissipation
P
P
@TC = 25°C
@TC = 100°C
W
D
D
18
Linear Derating Factor
Operating Junction and
0.23
W/°C
°C
T
-55 to + 175
J
T
Storage Temperature Range
STG
Soldering Temperature, for 10 seconds
300 (1.6mm from case)
Thermal Resistance
Parameter
Typ.
–––
–––
–––
Max.
4.28
50
Units
Rθ
Rθ
Rθ
Junction-to-Case
JC
JA
JA
Junction-to-Ambient (PCB Mount)
Junction-to-Ambient
°C/W
110
Notes through ꢀ are on page 11
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1
12/7/04
IRLR/U3714ZPbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
Conditions
BVDSS
Drain-to-Source Breakdown Voltage
20
–––
–––
V
VGS = 0V, ID = 250µA
∆ΒVDSS/∆TJ
RDS(on)
Breakdown Voltage Temp. Coefficient –––
14
––– mV/°C Reference to 25°C, ID = 1mA
Ω
m
Static Drain-to-Source On-Resistance
–––
–––
1.65
–––
–––
–––
–––
–––
21
12
15
25
V
GS = 10V, ID = 15A
20
VGS = 4.5V, ID = 12A
VGS(th)
Gate Threshold Voltage
2.1
-5.2
–––
–––
–––
–––
–––
4.7
1.7
0.7
1.7
0.6
2.4
2.6
5.4
7.6
9.2
4.3
560
180
95
2.55
V
V
DS = VGS, ID = 250µA
DS = 16V, VGS = 0V
∆VGS(th)/∆TJ
IDSS
Gate Threshold Voltage Coefficient
Drain-to-Source Leakage Current
––– mV/°C
1.0
150
100
-100
–––
7.1
µA
V
VDS = 16V, VGS = 0V, TJ = 125°C
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Forward Transconductance
Total Gate Charge
nA VGS = 20V
VGS = -20V
gfs
S
VDS = 10V, ID = 12A
Qg
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Qgs1
Qgs2
Qgd
Qgodr
Qsw
Qoss
td(on)
tr
Pre-Vth Gate-to-Source Charge
Post-Vth Gate-to-Source Charge
Gate-to-Drain Charge
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
V
DS = 10V
GS = 4.5V
nC
V
ID = 12A
Gate Charge Overdrive
See Fig. 16
Switch Charge (Qgs2 + Qgd)
Output Charge
nC VDS = 10V, VGS = 0V
DD = 15V, VGS = 4.5V
Turn-On Delay Time
Rise Time
V
ID = 12A
td(off)
tf
Turn-Off Delay Time
Fall Time
ns Clamped Inductive Load
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
VGS = 0V
pF VDS = 10V
ƒ = 1.0MHz
Avalanche Characteristics
Parameter
Single Pulse Avalanche Energy
Typ.
–––
–––
–––
Max.
Units
mJ
A
EAS
IAR
31
12
Avalanche Current
Repetitive Avalanche Energy
EAR
3.5
mJ
Diode Characteristics
Parameter
Min. Typ. Max. Units
Conditions
37
IS
Continuous Source Current
–––
–––
MOSFET symbol
(Body Diode)
A
showing the
ISM
Pulsed Source Current
–––
–––
144
integral reverse
(Body Diode)
p-n junction diode.
VSD
trr
Diode Forward Voltage
–––
–––
–––
–––
21
1.0
32
13
V
T = 25°C, I = 12A, V = 0V
J S GS
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
ns T = 25°C, I = 12A, VDD = 10V
J F
Qrr
ton
di/dt = 100A/µs
8.5
nC
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
2
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IRLR/U3714ZPbF
1000
100
10
1000
100
10
VGS
10V
VGS
10V
TOP
TOP
9.0V
7.0V
5.0V
4.5V
4.0V
3.5V
9.0V
7.0V
5.0V
4.5V
4.0V
3.5V
BOTTOM 3.0V
BOTTOM 3.0V
1
3.0V
3.0V
60µs PULSE WIDTH
Tj = 25°C
60µs PULSE WIDTH
Tj = 175°C
0.1
1
0.1
1
1
10
1
100
10
0.1
1
1
10
1
100
1
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
2.0
1.5
1.0
0.5
1000
I
= 30A
D
V
= 10V
GS
T
= 25°C
T
J
100
10
1
= 175°C
J
V
= 10V
DS
60µs PULSE WIDTH
2.0
4.0
6.0
8.0
10.0
-60 -40 -20
T
0
20 40 60 80 100 120 140 160
V
, Gate-to-Source Voltage (V)
GS
, Junction Temperature (°C)
J
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
vs. Temperature
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3
IRLR/U3714ZPbF
10000
12
10
8
V
= 0V,
= C
f = 1 MHZ
GS
I = 12A
D
C
C
C
+ C , C
SHORTED
V
= 20V
iss
gs
gd
ds
DS
VDS= 10V
= C
rss
oss
gd
= C + C
ds
gd
1000
100
10
Ciss
6
Coss
Crss
4
2
0
0
2
4
6
8
10
12
1
10
, Drain-to-Source Voltage (V)
100
Q
Total Gate Charge (nC)
G
V
DS
Fig 6. Typical Gate Charge vs.
Fig 5. Typical Capacitance vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
1000
100
10
1000.0
OPERATION IN THIS AREA
LIMITED BY R
(on)
DS
100.0
10.0
1.0
T
= 175°C
J
100µsec
1msec
1
10msec
T
= 25°C
J
Tc = 25°C
Tj = 175°C
Single Pulse
V
= 0V
GS
0.1
0.1
0
1
10
100
0.0
0.5
1.0
1.5
2.0
V
, Drain-toSource Voltage (V)
V
, Source-toDrain Voltage (V)
DS
SD
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
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IRLR/U3714ZPbF
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
40
30
20
10
0
LIMITED BY PACKAGE
I
= 250µA
D
25
50
75
100
125
150
175
-75 -50 -25
0
25
50
75 100 125 150
T
, Case Temperature (°C)
C
T
, Temperature ( °C )
J
Fig 9. Maximum Drain Current vs.
Fig 10. Threshold Voltage vs. Temperature
Case Temperature
10
D = 0.50
1
0.1
0.20
0.10
0.05
R1
R1
R2
R2
R3
R3
Ri (°C/W) τi (sec)
0.02
0.01
τ
J τJ
τ
τ
Cτ
1.2525
0.00015
0.00098
0.00984
τ
1τ1
τ
2 τ2
3τ3
2.423
0.6041
Ci= τi/Ri
0.01
0.001
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
1E-006
1E-005
0.0001
, Rectangular Pulse Duration (sec)
0.001
0.01
t
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRLR/U3714ZPbF
15V
140
120
100
80
I
D
TOP
3.4A
5.4A
12A
DRIVER
L
V
DS
BOTTOM
D.U.T
AS
R
+
-
G
V
DD
I
A
2VGS
Ω
0.01
t
p
60
Fig 12a. Unclamped Inductive Test Circuit
40
20
V
(BR)DSS
t
p
0
25
50
75
100
125
150
175
Starting T , Junction Temperature (°C)
J
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I
AS
LD
VDS
Fig 12b. Unclamped Inductive Waveforms
+
-
VDD
D.U.T
Current Regulator
Same Type as D.U.T.
VGS
Pulse Width < 1µs
Duty Factor < 0.1%
50KΩ
.2µF
12V
.3µF
Fig 14a. Switching Time Test Circuit
VDS
+
V
DS
D.U.T.
-
90%
V
GS
3mA
10%
VGS
I
I
D
G
Current Sampling Resistors
td(on)
td(off)
tr
tf
Fig 13. Gate Charge Test Circuit
Fig 14b. Switching Time Waveforms
6
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IRLR/U3714ZPbF
Driver Gate Drive
P.W.
Period
D.U.T
Period
D =
P.W.
+
*
=10V
V
GS
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D.U.T. I Waveform
SD
+
-
Reverse
Recovery
Current
Body Diode Forward
Current
-
+
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
Re-Applied
Voltage
• dv/dt controlled by RG
RG
+
-
Body Diode
Forward Drop
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Inductor Curent
I
SD
Ripple
≤ 5%
* VGS = 5V for Logic Level Devices
Fig 15. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
Id
Vds
Vgs
Vgs(th)
Qgs1
Qgs2
Qgd
Qgodr
Fig 16. Gate Charge Waveform
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IRLR/U3714ZPbF
Power MOSFET Selection for Non-Isolated DC/DC Converters
Synchronous FET
Control FET
The power loss equation for Q2 is approximated
by;
Special attention has been given to the power losses
in the switching elements of the circuit - Q1 and Q2.
Power losses in the high side switch Q1, also called
the Control FET, are impacted by the Rds(on) of the
MOSFET, but these conduction losses are only about
one half of the total losses.
P = P
+ P + P*
loss
conduction
drive
output
P = Irms 2 × Rds(on)
loss ( )
Power losses in the control switch Q1 are given
by;
+ Q × V × f
(
)
g
g
⎛
⎜
Qoss
⎞
⎠
Ploss = Pconduction+ Pswitching+ Pdrive+ Poutput
+
×V × f + Q × V × f
(
)
in
rr
in
⎝ 2
This can be expanded and approximated by;
*dissipated primarily in Q1.
P
= I 2 × Rds(on )
(
)
loss
rms
For the synchronous MOSFET Q2, Rds(on) is an im-
portant characteristic; however, once again the im-
portance of gate charge must not be overlooked since
it impacts three critical areas. Under light load the
MOSFET must still be turned on and off by the con-
trol IC so the gate drive losses become much more
significant. Secondly, the output charge Qoss and re-
verse recovery charge Qrr both generate losses that
are transfered to Q1 and increase the dissipation in
that device. Thirdly, gate charge will impact the
MOSFETs’ susceptibility to Cdv/dt turn on.
⎛
⎛
Qgd
ig
⎞
Qgs2
ig
⎞
⎟
⎜
⎟
⎜
+ I ×
× V × f + I ×
× V × f
in
in
⎝
⎠
⎝
⎠
+ Q × V × f
(
)
g
g
⎛ Qoss
⎞
⎠
+
×V × f
in
⎝
2
This simplified loss equation includes the terms Qgs2
The drain of Q2 is connected to the switching node
of the converter and therefore sees transitions be-
tween ground and Vin. As Q1 turns on and off there is
a rate of change of drain voltage dV/dt which is ca-
pacitively coupled to the gate of Q2 and can induce
a voltage spike on the gate that is sufficient to turn
the MOSFET on, resulting in shoot-through current .
The ratio of Qgd/Qgs1 must be minimized to reduce the
potential for Cdv/dt turn on.
and Qoss which are new to Power MOSFETdata sheets.
Qgs2 is a sub element of traditional gate-source
charge that is included in all MOSFET data sheets.
The importance of splitting this gate-source charge
into two sub elements, Qgs1 and Qgs2, can be seen from
Fig 16.
Qgs2 indicates the charge that must be supplied by
the gate driver between the time that the threshold
voltage has been reached and the time the drain cur-
rent rises to Idmax at which time the drain voltage be-
gins to change. Minimizing Qgs2 is a critical factor in
reducing switching losses in Q1.
Qoss is the charge that must be supplied to the out-
put capacitance of the MOSFET during every switch-
ing cycle. Figure A shows how Qoss is formed by the
parallel combination of the voltage dependant (non-
linear) capacitances Cds and Cdg when multiplied by
the power supply input buss voltage.
Figure A: Qoss Characteristic
8
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IRLR/U3714ZPbF
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
D-Pak (TO-252AA) Part Marking Information
EXAMPLE: THIS IS AN IRFR120
PART NUMBER
WIT H AS S EMBLY
LOT CODE 1234
INTERNATIONAL
RECTIFIER
LOGO
DAT E CODE
YEAR 9 = 1999
WE EK 16
IRFU120
916A
AS S E MB LED ON WW 16, 1999
IN THE ASSEMBLY LINE "A"
12
34
LINE A
Note: "P" in assembly line position
AS S E MB L Y
LOT CODE
indicates "Lead-F ree"
OR
PART NUMBER
DATE CODE
P = DESIGNATES LEAD-FREE
PRODUCT (OPTIONAL)
INTERNATIONAL
RECTIFIER
LOGO
IRFU120
12 34
YEAR 9 = 1999
AS S E MB L Y
LOT CODE
WEE K 16
A = AS S E MB L Y S IT E CODE
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9
IRLR/U3714ZPbF
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
PART NUMBER
EXAMPLE: THIS IS AN IRFU120
WITH ASSEMBLY
INTERNATIONAL
RECTIFIER
LOGO
DAT E CODE
YEAR 9 = 1999
WEEK 19
IRFU120
919A
78
LOT CODE 5678
AS S EMBLED ON WW 19, 1999
56
IN THE ASSEMBLY LINE "A"
LINE A
ASSEMBLY
LOT CODE
Note: "P" in assembly line
position indicates "Lead-Free"
OR
PART NUMBER
DATE CODE
INTERNATIONAL
RECTIFIER
LOGO
IRFU120
P = DESIGNATES LEAD-FREE
PRODUCT (OPTIONAL)
56
78
YEAR 9 = 1999
AS S E MB L Y
LOT CODE
WE E K 19
A = AS S E MB L Y S I T E CODE
10
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IRLR/U3714ZPbF
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRL
TRR
16.3 ( .641 )
15.7 ( .619 )
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Notes:
Calculated continuous current based on maximum allowable
Repetitive rating; pulse width limited by
max. junction temperature.
junction temperature. Package limitation current is 30A.
Starting TJ = 25°C, L = 0.43mH, RG = 25Ω,
IAS = 12A.
Pulse width ≤ 400µs; duty cycle ≤ 2%.
ꢀ When mounted on 1" square PCB (FR-4 or G-10 Material).
For recommended footprint and soldering techniques refer to
application note #AN-994.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.12/04
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