IRLR9343TRPBF [INFINEON]
key parameters optimlzed for class-d audio amplifier applications; optimlzed的D类音频放大器应用中的关键参数![IRLR9343TRPBF](http://pdffile.icpdf.com/pdf1/p00197/img/icpdf/IRLR93_1111654_icpdf.jpg)
型号: | IRLR9343TRPBF |
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描述: | key parameters optimlzed for class-d audio amplifier applications |
文件: | 总11页 (文件大小:308K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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PD - 95386A
DIGITAL AUDIO MOSFET
IRLR9343PbF
IRLU9343PbF
IRLU9343-701PbF
Features
l Advanced Process Technology
Key Parameters
l Key Parameters Optimized for Class-D Audio
Amplifier Applications
l Low RDSON for Improved Efficiency
l Low Qg and Qsw for Better THD and Improved
Efficiency
l Low Qrr for Better THD and Lower EMI
l 175°C Operating Junction Temperature for
Ruggedness
VDS
-55
V
m
RDS(ON) typ. @ VGS = -10V
RDS(ON) typ. @ VGS = -4.5V
Qg typ.
93
m
150
31
nC
°C
TJ max
175
l Repetitive Avalanche Capability for Robustness and
Reliability
D
l Multiple Package Options
l Lead-Free
D-Pak
IRLR9343
I-Pak
IRLU9343
G
I-Pak Leadform 701
IRLU9343-701
S
Refer to page 10 for package outline
Description
This Digital Audio HEXFET® is specifically designed for Class-D audio amplifier applications. This MosFET utilizes the latest
processing techniques to achieve low on-resistance per silicon area. Furthermore, Gate charge, body-diode reverse recovery
and internal Gate resistance are optimized to improve key Class-D audio amplifier performance factors such as efficiency, THD
and EMI. Additional features of this MosFET are 175°C operating junction temperature and repetitive avalanche capability.
These features combine to make this MosFET a highly efficient, robust and reliable device for Class-D audio amplifier
applications.
Absolute Maximum Ratings
Parameter
Drain-to-Source Voltage
Max.
-55
±20
-20
-14
-60
79
Units
V
VDS
VGS
Gate-to-Source Voltage
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Continuous Drain Current, VGS @ -10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
A
PD @TC = 25°C
PD @TC = 100°C
Power Dissipation
Power Dissipation
W
39
Linear Derating Factor
Operating Junction and
Storage Temperature Range
Clamping Pressure
0.53
W/°C
°C
TJ
-40 to + 175
TSTG
–––
N
Thermal Resistance
Parameter
Typ.
–––
–––
–––
Max.
1.9
50
Units
Junction-to-Case
RθJC
Junction-to-Ambient (PCB Mounted)
Junction-to-Ambient (free air)
Rθ
°C/W
JA
RθJA
110
Notes through are on page 10
www.irf.com
1
12/07/04
IRLR/U9343PbF & IRLU9343-701PbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
Conditions
BVDSS
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
-55
–––
–––
–––
-1.0
–––
–––
–––
–––
–––
5.3
–––
-52
93
–––
V
VGS = 0V, ID = -250µA
∆ΒVDSS/∆TJ
RDS(on)
––– mV/°C Reference to 25°C, ID = -1mA
mΩ
105
170
–––
VGS = -10V, ID = -3.4A
VGS = -4.5V, ID = -2.7A
VDS = VGS, ID = -250µA
150
–––
-3.7
–––
–––
–––
–––
–––
31
VGS(th)
Gate Threshold Voltage
V
∆VGS(th)/∆TJ
IDSS
Gate Threshold Voltage Coefficient
Drain-to-Source Leakage Current
––– mV/°C
-2.0
-25
µA VDS = -55V, VGS = 0V
V
V
V
V
V
DS = -55V, VGS = 0V, TJ = 125°C
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Forward Transconductance
Total Gate Charge
-100
100
–––
47
nA
S
GS = -20V
GS = 20V
gfs
DS = -25V, ID = -14A
DS = -44V
Qg
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Qgs
Qgd
Qgodr
td(on)
tr
VGS = -10V
Gate-to-Source Charge
Gate-to-Drain Charge
Gate Charge Overdrive
Turn-On Delay Time
7.1
8.5
15
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
ID = -14A
See Fig. 6 and 19
VDD = -28V, VGS = -10V
ID = -14A
9.5
24
Rise Time
td(off)
tf
Turn-Off Delay Time
21
ns R = 2.5
Ω
G
Fall Time
9.5
660
160
72
Ciss
Coss
Crss
Coss
LD
Input Capacitance
VGS = 0V
Output Capacitance
pF VDS = -50V
ƒ = 1.0MHz,
Reverse Transfer Capacitance
Effective Output Capacitance
Internal Drain Inductance
See Fig.5
280
4.5
VGS = 0V, VDS = 0V to -44V
Between lead,
nH 6mm (0.25in.)
from package
LS
Internal Source Inductance
–––
7.5
–––
and center of die contact
Avalanche Characteristics
Parameter
Typ.
Max.
Units
mJ
A
Single Pulse Avalanche Energy
Avalanche Current
EAS
IAR
–––
120
See Fig. 14, 15, 17a, 17b
Repetitive Avalanche Energy
EAR
mJ
Diode Characteristics
Parameter
Continuous Source Current
Min. Typ. Max. Units
Conditions
MOSFET symbol
D
IS @ TC = 25°C
–––
–––
-20
(Body Diode)
A
showing the
G
ISM
Pulsed Source Current
(Body Diode)
–––
–––
-60
integral reverse
S
p-n junction diode.
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
–––
–––
–––
–––
57
-1.2
86
V
TJ = 25°C, IS = -14A, VGS = 0V
ns TJ = 25°C, IF = -14A
di/dt = 100A/µs
nC
Qrr
120
180
2
www.irf.com
IRLR/U9343PbF & IRLU9343-701PbF
100
100
10
1
VGS
-15V
-12V
-10V
-8.0V
-5.5V
-4.5V
-3.0V
-2.5V
VGS
-15V
-12V
-10V
-8.0V
-5.5V
-4.5V
-3.0V
-2.5V
TOP
TOP
10
BOTTOM
BOTTOM
1
-2.5V
-2.5V
≤
≤
60µs PULSE WIDTH
Tj = 175°C
60µs PULSE WIDTH
Tj = 25°C
0.1
0.1
0.1
1
10
100
0.1
1
10
100
-V , Drain-to-Source Voltage (V)
DS
-V , Drain-to-Source Voltage (V)
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
100.0
10.0
1.0
2.0
1.5
1.0
0.5
I
= -14A
D
T
= 25°C
J
V
= -10V
GS
T = 175°C
J
V
= -25V
DS
≤ 60µs PULSE WIDTH
0.1
0.0
5.0
10.0
15.0
-60 -40 -20
T
0
20 40 60 80 100 120 140 160 180
-V , Gate-to-Source Voltage (V)
GS
, Junction Temperature (°C)
J
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance vs. Temperature
10000
1000
100
20
V
= 0V,
= C
f = 1 MHZ
GS
I = -14A
D
C
C
C
+ C , C
SHORTED
iss
gs
gd
ds
V
= -44V
DS
= C
rss
oss
gd
= C + C
16
12
8
VDS= -28V
VDS= -11V
ds
gd
Ciss
Coss
Crss
4
FOR TEST CIRCUIT
SEE FIGURE 19
0
10
0
10
Q
20
30
40
50
1
10
100
Total Gate Charge (nC)
G
-V , Drain-to-Source Voltage (V)
DS
Fig 5. Typical Capacitance vs.Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs.Gate-to-Source Voltage
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3
IRLR/U9343PbF & IRLU9343-701PbF
100.0
10.0
1.0
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R (on)
DS
T
= 175°C
J
100µsec
T
= 25°C
J
Tc = 25°C
Tj = 175°C
Single Pulse
1msec
V
= 0V
GS
10msec
1
0.1
1
10
100
1000
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
-V
, Drain-toSource Voltage (V)
-V , Source-to-Drain Voltage (V)
SD
DS
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
20
2.5
2.0
1.5
1.0
16
12
8
I
= -250µA
D
4
0
25
50
75
100
125
150
175
-75 -50 -25
0
25 50 75 100 125 150 175
T , Temperature ( °C )
J
T
, Junction Temperature (°C)
J
Fig 10. Threshold Voltage vs. Temperature
Fig 9. Maximum Drain Current vs. Case Temperature
10
1
0.1
D = 0.50
0.20
0.10
R1
R1
R2
R2
Ri (°C/W) τi (sec)
0.05
τ
J τJ
τ
1.162
0.000512
τ
Cτ
0.02
0.01
1 τ1
Ci= τi/Ri
τ
2τ2
0.7370
0.002157
0.01
0.001
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
, Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
4
www.irf.com
IRLR/U9343PbF & IRLU9343-701PbF
500
600
500
400
300
200
100
0
I
D
I
= -14A
D
TOP
-4.0A
-5.5A
400
300
200
100
0
BOTTOM -14A
T
= 125°C
J
T
= 25°C
J
4.0
6.0
8.0
10.0
25
50
75
100
125
150
175
-V , Gate-to-Source Voltage (V)
GS
Starting T , Junction Temperature (°C)
J
Fig 12. On-Resistance Vs. Gate Voltage
Fig 13. Maximum Avalanche Energy Vs. Drain Current
1000
Allowed avalanche Current vs
avalanche pulsewidth, tav
assuming ∆Tj = 25°C due to
avalanche losses. Note: In no
case should Tj be allowed to
exceed Tjmax
Duty Cycle = Single Pulse
100
0.01
10
0.05
0.10
1
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
tav (sec)
Fig 14. Typical Avalanche Current Vs.Pulsewidth
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 17a, 17b.
140
120
100
80
TOP
BOTTOM 1% Duty Cycle
= -14A
Single Pulse
I
D
4. PD (ave) = Average power dissipation per single
avalanche pulse.
60
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
40
6. Iav = Allowable avalanche current.
20
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
0
25
50
75
100
125
150
175
Starting T , Junction Temperature (°C)
J
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
Fig 15. Maximum Avalanche Energy Vs. Temperature
EAS (AR) = PD (ave)·tav
www.irf.com
5
IRLR/U9343PbF & IRLU9343-701PbF
Driver Gate Drive
P.W.
Period
D.U.T
Period
D =
P.W.
+
-
*
=10V
V
GS
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T. I Waveform
SD
+
-
Reverse
Recovery
Current
Body Diode Forward
Current
-
+
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
Re-Applied
Voltage
• dv/dt controlled by RG
RG
+
-
Body Diode
Forward Drop
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Inductor
Current
I
SD
Ripple ≤ 5%
* Reverse Polarity of D.U.T for P-Channel
* VGS = 5V for Logic Level Devices
Fig 16. Peak Diode Recovery dv/dt Test Circuit for P-Channel
HEXFET® Power MOSFETs
L
V
DS
RD
VDS
D.U.T
R
G
V
DD
VGS
I
A
D.U.T.
AS
DRIVER
-V
-
GS
RG
-
+
0.01
Ω
t
p
VDD
-10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
15V
Fig 18a. Switching Time Test Circuit
Fig 17a. Unclamped Inductive Test Circuit
I
AS
t
t
r
t
t
f
d(on)
d(off)
V
GS
10%
90%
t
p
V
DS
V
(BR)DSS
Fig 18b. Switching Time Waveforms
Fig 17b. Unclamped Inductive Waveforms
Id
Vds
Vgs
L
VCC
DUT
0
Vgs(th)
1K
Qgs1
Qgs2
Qgd
Qgodr
Fig 19a. Gate Charge Test Circuit
Fig 19b Gate Charge Waveform
6
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IRLR/U9343PbF & IRLU9343-701PbF
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
D-Pak (TO-252AA) Part Marking Information
EXAMPLE: THIS IS AN IRFR120
PART NUMBER
WIT H AS S E MB LY
INTERNATIONAL
LOT CODE 1234
DAT E CODE
YEAR 9 = 1999
WEEK 16
RECTIFIER
IRFU120
916A
ASSEMBLED ON WW 16, 1999
LOGO
IN THE ASSEMBLY LINE "A"
12
34
LINE A
Note: "P" in assembly line position
i ndi cates "L ead-F ree"
AS S E MB L Y
LOT CODE
OR
PART NUMBER
DAT E CODE
P = DE S IGNAT E S LE AD-F RE E
PRODUCT (OPTIONAL)
INTERNATIONAL
RECTIFIER
LOGO
IRFU120
12
34
YEAR 9 = 1999
ASSEMBLY
LOT CODE
WE E K 16
A = AS S E MB L Y S IT E CODE
www.irf.com
7
IRLR/U9343PbF & IRLU9343-701PbF
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
PART NUMBER
EXAMPLE: THIS IS AN IRFU120
INTERNATIONAL
WIT H AS S E MB LY
DAT E CODE
YEAR 9 = 1999
WEE K 19
RECTIFIER
LOGO
IRFU120
919A
78
LOT CODE 5678
ASSEMBLED ON WW 19, 1999
IN THE ASSEMBLY LINE "A"
56
LINE A
AS S E MB L Y
LOT CODE
Note: "P" in assembly line
pos ition indicates "Lead-F ree"
OR
PART NUMBER
DAT E CODE
P = DE S IGNAT E S L E AD-F R E E
PRODUCT (OPTIONAL)
INTERNATIONAL
RECTIFIER
LOGO
IRFU120
56 78
YEAR 9 = 1999
ASSEMBLY
LOT CODE
WE E K 19
A = ASSEMBLYSITE CODE
8
www.irf.com
IRLR/U9343PbF & IRLU9343-701PbF
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRL
TRR
16.3 ( .641 )
15.7 ( .619 )
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
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9
IRLR/U9343PbF & IRLU9343-701PbF
I-Pak Leadform Option 701 Package Outline
Dimensions are shown in millimeters (inches)
Notes:
Contact factory for mounting information
Limited by Tjmax. See Figs. 14, 15, 17a, 17b for repetitive avalanche information
Repetitive rating; pulse width limited by
max. junction temperature.
Starting TJ = 25°C, L = 1.24mH,
RG = 25Ω, IAS = -14A.
Pulse width ≤ 400µs; duty cycle ≤ 2%.
This only applies for I-Pak, LS of D-Pak is
measured between lead and center of die contact
When D-Pak mounted on 1" square PCB (FR-4 or G-10 Material) .
For recommended footprint and soldering techniques refer to
application note #AN-994
Refer to D-Pak package for Part Marking, Tape and Reel information.
ꢀ R is measured at TJ of approximately 90°C.
θ
Data and specifications subject to change without notice.
This product has been designed for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.12/04
10
www.irf.com
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/
相关型号:
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IRLR9343TRR
Power Field-Effect Transistor, 20A I(D), 55V, 0.105ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252AA, DPAK-3
INFINEON
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IRLR9343TRRPBF
Power Field-Effect Transistor, 20A I(D), 55V, 0.105ohm, 1-Element, P-Channel, Silicon, Metal-oxide Semiconductor FET, TO-252AA, LEAD FREE, DPAK-3
VISHAY
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