IRLS3036 [INFINEON]
60V 单个 N 通道 HEXFET Power MOSFET, 采用 D2-Pak 封装;
| 型号： | IRLS3036 |
| 厂家： | 
Infineon |
| 描述： | 60V 单个 N 通道 HEXFET Power MOSFET, 采用 D2-Pak 封装 |
| 文件： | 总11页 (文件大小：363K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD -97358
IRLS3036PbF
IRLSL3036PbF
HEXFET® Power MOSFET
Applications
D
S
l DC Motor Drive
VDSS
RDS(on) typ.
max.
ID (Silicon Limited)
ID (Package Limited)
60V
l High Efficiency Synchronous Rectification in SMPS
l Uninterruptible Power Supply
l High Speed Power Switching
l Hard Switched and High Frequency Circuits
1.9mΩ
2.4m
270A
Ω
G
195A
Benefits
l Optimized for Logic Level Drive
l Very Low RDS(ON) at 4.5V VGS
l Superior R*Q at 4.5V VGS
l Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
l Fully Characterized Capacitance and Avalanche
SOA
l Enhanced body diode dV/dt and dI/dt Capability
l Lead-Free
S
D
S
D
G
D2Pak
G
TO-262
IRLSL3036PbF
IRLS3036PbF
G
D
S
Gate
Drain
Source
Absolute Maximum Ratings
Symbol
Parameter
Max.
270
190
195
1100
380
2.5
Units
ID @ TC = 25°C
Continuous Drain Current, VGS @ 10V (Silicon Limited)
ID @ TC = 100°C
ID @ TC = 25°C
IDM
Continuous Drain Current, VGS @ 10V (Silicon Limited)
A
Continuous Drain Current, VGS @ 10V (Package Limited)
Pulsed Drain Current
PD @TC = 25°C
W
Maximum Power Dissipation
Linear Derating Factor
W/°C
V
VGS
±16
8.0
Gate-to-Source Voltage
Peak Diode Recovery
dv/dt
TJ
V/ns
Operating Junction and
-55 to + 175
300
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
°C
Avalanche Characteristics
Single Pulse Avalanche Energy
EAS (Thermally limited)
290
mJ
A
Avalanche Current
IAR
See Fig. 14, 15, 22a, 22b
Repetitive Avalanche Energy
EAR
mJ
Thermal Resistance
Symbol
Parameter
Typ.
–––
Max.
0.40
40
Units
°C/W
11
Rθ
JC
Junction-to-Case
Rθ
JA
–––
Junction-to-Ambient (PCB Mount, steady state)
www.irf.com
1
12/08/08
IRLS/SL3036PbF
Static @ TJ = 25°C (unless otherwise specified)
Symbol
V(BR)DSS
Parameter
Drain-to-Source Breakdown Voltage
Min. Typ. Max. Units
60 ––– –––
––– 0.061 ––– V/°C Reference to 25°C, ID = 5mA
Conditions
VGS = 0V, ID = 250µA
V
∆V(BR)DSS/∆TJ
Breakdown Voltage Temp. Coefficient
–––
–––
1.0
1.9
2.2
2.4
2.8
2.5
20
VGS = 10V, ID = 165A
VGS = 4.5V, ID = 140A
VDS = VGS, ID = 250µA
VDS = 60V, VGS = 0V
VDS = 60V, VGS = 0V, TJ = 125°C
VGS = 16V
RDS(on)
Static Drain-to-Source On-Resistance
m
Ω
VGS(th)
IDSS
Gate Threshold Voltage
–––
V
Drain-to-Source Leakage Current
––– –––
µA
––– ––– 250
––– ––– 100
––– ––– -100
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Internal Gate Resistance
nA
VGS = -16V
RG(int)
–––
2.0
–––
Ω
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Qg
Parameter
Forward Transconductance
Min. Typ. Max. Units
Conditions
VDS = 10V, ID = 165A
ID = 165A
340 ––– –––
S
Total Gate Charge
–––
–––
–––
–––
–––
91
31
51
40
66
140
–––
–––
–––
–––
Qgs
Qgd
Qsync
td(on)
tr
Gate-to-Source Charge
VDS = 30V
nC
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Qg - Qgd)
VGS = 4.5V
ID = 165A, VDS =0V, VGS = 4.5V
VDD = 39V
Turn-On Delay Time
Rise Time
––– 220 –––
––– 110 –––
––– 110 –––
––– 11210 –––
––– 1020 –––
––– 500 –––
––– 1430 –––
––– 1880 –––
ID = 165A
ns
td(off)
tf
Turn-Off Delay Time
Fall Time
RG = 2.1Ω
VGS = 4.5V
Ciss
Coss
Crss
Input Capacitance
VGS = 0V
Output Capacitance
VDS = 50V
Reverse Transfer Capacitance
Effective Output Capacitance (Energy Related)
Effective Output Capacitance (Time Related)
ƒ = 1.0MHz
pF
C
oss eff. (ER)
oss eff. (TR)
VGS = 0V, VDS = 0V to 48V
C
VGS = 0V, VDS = 0V to 48V
Diode Characteristics
Symbol
Parameter
Min. Typ. Max. Units
Conditions
IS
D
S
Continuous Source Current
––– –––
MOSFET symbol
270
(Body Diode)
Pulsed Source Current
(Body Diode)
showing the
integral reverse
A
––– –––
G
ISM
1100
p-n junction diode.
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
––– –––
1.3
–––
–––
V
TJ = 25°C, IS = 165A, VGS = 0V
TJ = 25°C
TJ = 125°C
TJ = 25°C
TJ = 125°C
TJ = 25°C
VR = 51V,
–––
–––
62
66
ns
IF = 165A
di/dt = 100A/µs
Qrr
Reverse Recovery Charge
––– 310 –––
––– 360 –––
nC
A
IRRM
ton
Reverse Recovery Current
Forward Turn-On Time
–––
4.4
–––
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Calcuted continuous current based on maximum allowable junction
temperature Bond wire current limit is 195A. Note that current
limitation arising from heating of the device leds may occur with
some lead mounting arrangements.
Repetitive rating; pulse width limited by max. junction
temperature.
Coss eff. (TR) is a fixed capacitance that gives the same charging time as
Coss while VDS is rising from 0 to 80% VDSS
Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS
.
.
When mounted on 1" square PCB (FR-4 or G-10 Material). For
recommended footprint and soldering techniquea refer to applocation
note # AN- 994 echniques refer to application note #AN-994.
Rθ is measured at TJ approximately 90°C.
Limited by TJmax, starting TJ = 25°C, L = 0.021mH
RG = 25Ω, IAS = 165A, VGS =10V. Part not recommended for use
above this value .
ISD ≤ 165A, di/dt ≤ 430A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
ꢀ Pulse width ≤ 400µs; duty cycle ≤ 2%.
Limited by TJmax, see Fig. 14, 15, 22a, 22b for typical repetitive
avalanche performance.
RθJC value shown is at time zero.
11
2
www.irf.com
IRLS/SL3036PbF
1000
100
10
1000
100
10
VGS
15V
10V
4.5V
4.0V
3.5V
3.3V
3.0V
2.7V
VGS
15V
10V
4.5V
4.0V
3.5V
3.3V
3.0V
2.7V
TOP
TOP
BOTTOM
BOTTOM
2.7V
1
2.7V
60µs PULSE WIDTH
≤
60µs PULSE WIDTH
≤
Tj = 175°C
Tj = 25°C
0.1
0.1
1
10
100
1000
0.1
1
10
100
1000
V
, Drain-to-Source Voltage (V)
DS
V
, Drain-to-Source Voltage (V)
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
100
10
2.5
2.0
1.5
1.0
0.5
I
= 165A
= 10V
D
V
GS
T
= 175°C
J
T
= 25°C
J
1
V
= 25V
DS
≤
60µs PULSE WIDTH
0.1
1
2
3
4
5
6
-60 -40 -20 0 20 40 60 80 100120140160180
, Junction Temperature (°C)
T
J
V
, Gate-to-Source Voltage (V)
GS
Fig 4. Normalized On-Resistance vs. Temperature
Fig 3. Typical Transfer Characteristics
5.0
100000
10000
1000
V
= 0V,
= C
f = 1 MHZ
GS
I = 165A
D
V
V
= 48V
= 30V
DS
DS
C
C
C
+ C , C
SHORTED
ds
iss
gs
gd
= C
rss
oss
gd
4.0
3.0
2.0
1.0
0.0
= C + C
ds
gd
C
iss
C
oss
C
rss
100
0
20
Q
40
60
80
100
120
1
10
, Drain-to-Source Voltage (V)
100
, Total Gate Charge (nC)
V
G
DS
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
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3
IRLS/SL3036PbF
10000
1000
100
10
1000
OPERATION IN THIS AREA
LIMITED BY R
(on)
DS
T
= 175°C
J
100
10
1
100µsec
1msec
T
= 25°C
J
Limited by
package
10msec
DC
Tc = 25°C
Tj = 175°C
V
= 0V
GS
Single Pulse
1
0.1
0
1
10
100
0.0
0.5
1.0
1.5
2.0
2.5
V
, Drain-to-Source Voltage (V)
V
, Source-to-Drain Voltage (V)
DS
SD
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
75
70
65
60
55
300
Id = 5mA
Limited By Package
250
200
150
100
50
0
-60 -40 -20 0 20 40 60 80 100120140160180
25
50
75
100
125
150
175
T , Temperature ( °C )
J
Fig 10. Drain-to-Source Breakdown Voltage
T
, Case Temperature (°C)
C
Fig 9. Maximum Drain Current vs.
Case Temperature
3.0
1200
I
D
TOP
27A
50A
2.5
2.0
1.5
1.0
0.5
0.0
1000
800
600
400
200
0
BOTTOM 165A
-10
0
10 20 30
40 50 60 70
25
50
75
100
125
150
175
Starting T , Junction Temperature (°C)
J
V
Drain-to-Source Voltage (V)
DS,
Fig 11. Typical COSS Stored Energy
Fig 12. Maximum Avalanche Energy vs. DrainCurrent
4
www.irf.com
IRLS/SL3036PbF
1
D = 0.50
0.20
0.1
R1
R1
R2
R2
R3
R3
R4
R4
Ri (°C/W) τi (sec)
0.10
0.05
0.01115 0.000009
τ
τ
J τJ
τ
Cτ
0.08360 0.000080
0.18950 0.001295
0.11519 0.006726
1τ1
Ci= τi/Ri
τ
τ
τ
2 τ2
3τ3
4τ4
0.02
0.01
0.01
0.001
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
, Rectangular Pulse Duration (sec)
1
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
100
10
Duty Cycle = Single Pulse
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ∆Tj = 150°C and
Tstart =25°C (Single Pulse)
0.01
0.05
0.10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ∆Τ j = 25°C and
Tstart = 150°C.
1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current vs.Pulsewidth
300
250
200
150
100
50
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
TOP
BOTTOM 1.0% Duty Cycle
= 165A
Single Pulse
I
D
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
0
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
25
50
75
100
125
150
175
Iav = 2DT/ [1.3·BV·Zth]
Starting T , Junction Temperature (°C)
EAS (AR) = PD (ave)·tav
J
Fig 15. Maximum Avalanche Energy vs. Temperature
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5
IRLS/SL3036PbF
3.0
14
12
10
8
I = 110A
F
V
= 51V
R
2.5
2.0
T = 25°C
J
T = 125°C
J
I
I
I
= 250µA
= 1.0mA
= 1.0A
D
D
D
1.5
1.0
0.5
6
4
2
-75 -50 -25
0
25 50 75 100 125 150175 200
, Temperature ( °C )
0
100
200
300
400
500
T
di /dt (A/µs)
J
F
Fig. 17 - Typical Recovery Current vs. dif/dt
Fig 16. Threshold Voltage vs. Temperature
12
900
I = 110A
I = 165A
F
F
800
700
600
500
400
300
200
100
V
= 51V
V
= 51V
R
R
10
8
T = 25°C
T = 25°C
J
J
T = 125°C
J
T = 125°C
J
6
4
2
0
100
200
300
400
500
0
100
200
300
400
500
di /dt (A/µs)
di /dt (A/µs)
F
F
Fig. 18 - Typical Recovery Current vs. dif/dt
Fig. 19 - Typical Stored Charge vs. dif/dt
600
I = 165A
F
V
= 51V
R
T = 25°C
J
500
400
300
200
T = 125°C
J
0
100
200
300
400
500
di /dt (A/µs)
F
Fig. 20 - Typical Stored Charge vs. dif/dt
6
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IRLS/SL3036PbF
Driver Gate Drive
P.W.
P.W.
Period
D.U.T
Period
D =
+
*
=10V
V
GS
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D.U.T. I Waveform
SD
+
-
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
-
+
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
Re-Applied
Voltage
• dv/dt controlled by RG
RG
+
-
Body Diode
Forward Drop
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Inductor Current
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V
(BR)DSS
15V
t
p
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
V
2
GS
Ω
0.01
t
p
I
AS
Fig 22b. Unclamped Inductive Waveforms
Fig 22a. Unclamped Inductive Test Circuit
RD
VDS
V
DS
90%
VGS
D.U.T.
RG
+
VDD
-
VGS
10%
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
V
GS
t
t
r
t
t
f
d(on)
d(off)
Fig 23a. Switching Time Test Circuit
Fig 23b. Switching Time Waveforms
Id
Current Regulator
Same Type as D.U.T.
Vds
Vgs
50KΩ
.2µF
12V
.3µF
+
V
DS
D.U.T.
-
Vgs(th)
V
GS
3mA
I
I
D
G
Qgs1
Qgs2
Qgd
Qgodr
Current Sampling Resistors
Fig 24a. Gate Charge Test Circuit
Fig 24b. Gate Charge Waveform
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7
IRLS/SL3036PbF
D2Pak (TO-263AB) Package Outline
Dimensions are shown in millimeters (inches)
D2Pak (TO-263AB) Part Marking Information
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
8
www.irf.com
IRLS/SL3036PbF
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
www.irf.com
9
IRLS/SL3036PbF
D2Pak (TO-263AB) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063)
1.50 (.059)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
0.368 (.0145)
0.342 (.0135)
FEED DIRECTION
1.85 (.073)
11.60 (.457)
11.40 (.449)
1.65 (.065)
24.30 (.957)
23.90 (.941)
15.42 (.609)
15.22 (.601)
TRL
1.75 (.069)
1.25 (.049)
10.90 (.429)
10.70 (.421)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039)
24.40 (.961)
4
3
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 12/2008
10
www.irf.com
IMPORTANT NOTICE
The information given in this document shall in no For further information on the product, technology,
event be regarded as a guarantee of conditions or delivery terms and conditions and prices please
characteristics (“Beschaffenheitsgarantie”) .
contact your nearest Infineon Technologies office
(www.infineon.com).
With respect to any examples, hints or any typical
values stated herein and/or any information
regarding the application of the product, Infineon
Technologies hereby disclaims any and all
warranties and liabilities of any kind, including
without limitation warranties of non-infringement
of intellectual property rights of any third party.
WARNINGS
Due to technical requirements products may
contain dangerous substances. For information on
the types in question please contact your nearest
Infineon Technologies office.
In addition, any information given in this document
is subject to customer’s compliance with its
obligations stated in this document and any
applicable legal requirements, norms and
standards concerning customer’s products and any
use of the product of Infineon Technologies in
customer’s applications.
Except as otherwise explicitly approved by Infineon
Technologies in a written document signed by
authorized
representatives
of
Infineon
Technologies, Infineon Technologies’ products may
not be used in any applications where a failure of
the product or any consequences of the use thereof
can reasonably be expected to result in personal
injury.
The data contained in this document is exclusively
intended for technically trained staff. It is the
responsibility of customer’s technical departments
to evaluate the suitability of the product for the
intended application and the completeness of the
product information given in this document with
respect to such application.
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