IRLU3110ZPBF [INFINEON]
AUTOMOTIVE MOSFET; 汽车MOSFET
| 型号： | IRLU3110ZPBF |
| 厂家： | 
Infineon |
| 描述： | AUTOMOTIVE MOSFET |
| 文件： | 总11页 (文件大小：736K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 97175A
AUTOMOTIVE MOSFET
IRLR3110ZPbF
IRLU3110ZPbF
Features
HEXFET® Power MOSFET
l
l
l
l
l
Advanced Process Technology
UltraLowOn-Resistance
175°COperatingTemperature
Fast Switching
D
VDSS = 100V
Repetitive Avalanche Allowed up to Tjmax
G
RDS(on) = 14mΩ
Description
SpecificallydesignedforAutomotiveapplications,
this HEXFET® Power MOSFET utilizes the latest
processing techniques to achieve extremely low
on-resistancepersiliconarea. Additionalfeatures
of this design are a 175°C junction operating
temperature, fast switching speed and improved
repetitive avalanche rating . These features com-
binetomakethisdesignanextremelyefficientand
reliable device for use in Automotive applications
and a wide variety of other applications.
S
D-Pak
I-Pak
IRLU3110ZPbF
IRLR3110ZPbF
Absolute Maximum Ratings
Parameter
Max.
63
Units
I
I
I
I
@ T = 25°C
C
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Package Limited)
Pulsed Drain Current
D
D
D
@ T = 100°C
C
45
A
@ T = 25°C
C
42
250
140
DM
P
@T = 25°C
Power Dissipation
C
W
D
Linear Derating Factor
0.95
±16
W/°C
V
V
Gate-to-Source Voltage
GS
EAS (Thermally limited)
110
140
mJ
Single Pulse Avalanche Energy
Single Pulse Avalanche Energy Tested Value
Avalanche Current
EAS (Tested )
IAR
See Fig.12a, 12b, 15, 16
A
EAR
mJ
Repetitive Avalanche Energy
T
J
-55 to + 175
Operating Junction and
T
°C
Storage Temperature Range
STG
Reflow Soldering Temperature, for 10 seconds
Mounting Torque, 6-32 or M3 screw
300
10 lbf in (1.1N m)
Thermal Resistance
Parameter
Typ.
–––
–––
–––
Max.
1.05
40
Units
Rθ
JC
Junction-to-Case
Rθ
JA
Rθ
JA
°C/W
Junction-to-Ambient (PCB mount)
Junction-to-Ambient
110
HEXFET® isaregisteredtrademarkofInternationalRectifier.
www.irf.com
1
03/09/06
IRLR/U3110ZPbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
Min. Typ. Max. Units
100 ––– –––
Conditions
VGS = 0V, ID = 250µA
V(BR)DSS
V
∆V(BR)DSS/∆TJ
RDS(on)
Breakdown Voltage Temp. Coefficient ––– 0.077 ––– V/°C Reference to 25°C, ID = 1mA
mΩ
Static Drain-to-Source On-Resistance
–––
–––
1.0
11
14
16
VGS = 10V, ID = 38A
12
VGS = 4.5V, ID = 32A
VDS = VGS, ID = 100µA
VDS = 25V, ID = 38A
VGS(th)
Gate Threshold Voltage
–––
–––
–––
–––
–––
2.5
–––
20
V
S
gfs
IDSS
Forward Transconductance
Drain-to-Source Leakage Current
52
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
µA
V
V
DS = 100V, VGS = 0V
250
200
DS = 100V, VGS = 0V, TJ = 125°C
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
nA VGS = 16V
GS = -16V
ID = 38A
––– -200
V
Qg
Qgs
Qgd
td(on)
tr
34
10
48
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
–––
–––
–––
–––
–––
–––
–––
nC
V
V
DS = 50V
GS = 4.5V
15
24
VDD = 50V
ID = 38A
Rise Time
110
33
td(off)
tf
Turn-Off Delay Time
ns
RG = 3.7Ω
VGS = 4.5V
Fall Time
48
D
S
LD
Internal Drain Inductance
4.5
Between lead,
nH 6mm (0.25in.)
from package
G
LS
Internal Source Inductance
–––
7.5
–––
and center of die contact
VGS = 0V
DS = 25V
pF ƒ = 1.0MHz
Ciss
Input Capacitance
––– 3980 –––
Coss
Output Capacitance
–––
–––
310
130
–––
–––
V
Crss
Reverse Transfer Capacitance
Output Capacitance
Coss
––– 1820 –––
V
V
V
GS = 0V, VDS = 1.0V, ƒ = 1.0MHz
GS = 0V, VDS = 80V, ƒ = 1.0MHz
GS = 0V, VDS = 0V to 80V
Coss
Output Capacitance
–––
–––
170
320
–––
–––
Coss eff.
Effective Output Capacitance
Source-Drain Ratings and Characteristics
Parameter
Min. Typ. Max. Units
Conditions
MOSFET symbol
D
I
Continuous Source Current
–––
–––
63
S
(Body Diode)
Pulsed Source Current
A
showing the
integral reverse
G
I
–––
–––
250
SM
S
(Body Diode)
p-n junction diode.
V
t
Diode Forward Voltage
–––
–––
–––
–––
34
1.3
51
63
V
T = 25°C, I = 38A, V = 0V
SD
J S GS
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
ns T = 25°C, I = 38A, VDD = 50V
J F
rr
di/dt = 100A/µs
Q
t
42
nC
rr
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
on
2
www.irf.com
IRLR/U3110ZPbF
1000
100
10
1000
100
10
VGS
15V
10V
8.0V
4.5V
3.5V
3.0V
2.7V
2.5V
VGS
15V
10V
8.0V
4.5V
3.5V
3.0V
2.7V
2.5V
TOP
TOP
BOTTOM
BOTTOM
1
2.5V
0.1
0.01
2.5V
1
60µs PULSE WIDTH
Tj = 175°C
≤
60µs PULSE WIDTH
Tj = 25°C
≤
1
0.1
10
100
1000
0.1
1
10
100
1000
V
, Drain-to-Source Voltage (V)
DS
V
, Drain-to-Source Voltage (V)
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
100
10
150
125
100
75
T
= 25°C
J
T
= 175°C
J
T
= 175°C
J
50
T
= 25°C
J
1
V
= 10V
25
DS
V
= 25V
DS
300µs PULSE WIDTH
≤
60µs PULSE WIDTH
0.1
0
0
2
4
6
8 10 12 14 16
0
25
50 75
I
,Drain-to-Source Current (A)
D
V
, Gate-to-Source Voltage (V)
GS
Fig 3. Typical Transfer Characteristics
Fig 4. Typical Forward Transconductance
vs. Drain Current
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3
IRLR/U3110ZPbF
100000
5.0
4.0
3.0
2.0
1.0
0.0
V
= 0V,
= C
f = 1 MHZ
GS
I = 38A
D
C
C
C
+ C , C
SHORTED
iss
gs
gd
ds
= C
rss
oss
gd
= C + C
V
V
= 80V
= 50V
ds
gd
10000
1000
100
DS
DS
C
iss
C
oss
C
rss
10
1
10
, Drain-to-Source Voltage (V)
100
0
10
20
30
40
V
Q
G
Total Gate Charge (nC)
DS
Fig 6. Typical Gate Charge vs.
Fig 5. Typical Capacitance vs.
Gate-to-SourceVoltage
Drain-to-SourceVoltage
1000
100
10
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R (on)
DS
T
= 175°C
T
J
100µsec
1msec
= 25°C
J
10msec
DC
1
Tc = 25°C
Tj = 175°C
Single Pulse
V
= 0V
GS
0.1
1
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
, Source-to-Drain Voltage (V)
0
1
10
100
1000
V
V
, Drain-to-Source Voltage (V)
SD
DS
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
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IRLR/U3110ZPbF
70
60
50
40
30
20
10
0
3.0
2.5
2.0
1.5
1.0
0.5
I
= 63A
D
V
= 10V
Limited By Package
GS
25
50
75
100
125
150
175
-60 -40 -20
0
20 40 60 80 100120140160180
, Junction Temperature (°C)
J
T
, Case Temperature (°C)
T
C
Fig 10. Normalized On-Resistance
Fig 9. Maximum Drain Current vs.
vs.Temperature
CaseTemperature
10
1
0.1
D = 0.50
0.20
0.10
0.05
R1
R1
R2
R2
Ri (°C/W) τi (sec)
τ
J τJ
τ
0.383
0.000267
τ
Cτ
1τ1
Ci= τi/Ri
τ
2τ2
0.02
0.01
0.667
0.003916
0.01
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
, Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRLR/U3110ZPbF
300
250
200
150
100
50
15V
I
D
TOP
4.4A
6.5A
BOTTOM 38A
DRIVER
L
V
DS
D.U.T
AS
R
G
+
-
V
DD
I
A
V
20V
GS
0.01
Ω
t
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
0
25
50
75
100
125
150
175
Starting T , Junction Temperature (°C)
J
I
AS
Fig 12c. Maximum Avalanche Energy
Fig 12b. Unclamped Inductive Waveforms
vs. Drain Current
Q
G
10 V
Q
Q
GD
GS
3.0
2.5
2.0
1.5
1.0
0.5
0.0
V
G
Charge
Fig 13a. Basic Gate Charge Waveform
I
I
I
I
= 100µA
= 250µA
= 1.0mA
= 1.0A
D
D
D
D
L
VCC
DUT
0
1K
-75 -50 -25
0
T
25 50 75 100 125 150 175 200
, Temperature ( °C )
J
Fig 14. Threshold Voltage vs. Temperature
Fig 13b. Gate Charge Test Circuit
6
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IRLR/U3110ZPbF
100
10
1
Allowed avalanche Current vs avalanche
Duty Cycle = Single Pulse
0.01
∆
pulsewidth, tav, assuming Tj = 150°C and
Tstart =25°C (Single Pulse)
0.05
0.10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
Tstart = 150°C.
∆Τ
j = 25°C and
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current vs.Pulsewidth
150
125
100
75
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long as
neither Tjmax nor Iav (max) is exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
TOP
BOTTOM 1% Duty Cycle
= 38A
Single Pulse
I
D
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
50
6. Iav = Allowable avalanche current.
25
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
0
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
25
50
75
100
125
150
175
Starting T , Junction Temperature (°C)
J
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
Fig 16. Maximum Avalanche Energy
EAS (AR) = PD (ave)·tav
vs.Temperature
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7
IRLR/U3110ZPbF
Driver Gate Drive
P.W.
P.W.
Period
D.U.T
Period
D =
+
*
=10V
V
GS
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D.U.T. I Waveform
SD
+
-
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
-
+
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
Re-Applied
Voltage
• dv/dt controlled by RG
RG
+
-
Body Diode
Forward Drop
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Inductor Curent
I
SD
Ripple
≤ 5%
* VGS = 5V for Logic Level Devices
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
RD
VDS
VGS
D.U.T.
RG
+VDD
-
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 18a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
t
r
t
t
f
d(on)
d(off)
Fig 18b. Switching Time Waveforms
8
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IRLR/U3110ZPbF
D-Pak (TO-252AA) Package Outline
D-Pak (TO-252AA) Part Marking Information
25
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9
IRLR/U3110ZPbF
I-Pak(TO-251AA)PackageOutline
I-Pak (TO-251AA) Part Marking Information
10
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IRLR/U3110ZPbF
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRL
TRR
16.3 ( .641 )
15.7 ( .619 )
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Notes:
ꢀ
Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
Limited by TJmax, starting TJ = 25°C, L = 0.16mH
RG = 25Ω, IAS = 38A, VGS =10V. Part not
recommended for use above this value.
Pulse width ≤ 1.0ms; duty cycle ≤ 2%.
.
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
avalanche performance.
This value determined from sample failure population. 100%
tested to this value in production.
When mounted on 1" square PCB (FR-4 or G-10 Material).
Rθ is measured at TJ approximately 90°C.
Data and specifications subject to change without notice.
This product has been designed for the Automotive [Q101] market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.03/06
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11
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INFINEON
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