IRLZ44ZPBF [INFINEON]
AUTOMOTIVE MOSFET (VDSS = 55V , RDS(on) =13.5mヘ , ID = 51A); 汽车MOSFET （ VDSS = 55V ， RDS （ ON） = 13.5米ヘ， ID = 51A ）
| 型号： | IRLZ44ZPBF |
| 厂家： | 
Infineon |
| 描述： | AUTOMOTIVE MOSFET (VDSS = 55V , RDS(on) =13.5mヘ , ID = 51A) |
| 文件： | 总13页 (文件大小：358K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 95539
IRLZ44ZPbF
IRLZ44ZSPbF
IRLZ44ZLPbF
AUTOMOTIVE MOSFET
Features
l
l
l
l
l
l
l
Logic Level
Advanced Process Technology
Ultra Low On-Resistance
175°C Operating Temperature
Fast Switching
HEXFET® Power MOSFET
D
VDSS = 55V
RDS(on) = 13.5mΩ
Repetitive Avalanche Allowed up to Tjmax
Lead-Free
G
Description
ID = 51A
S
Specifically designed for Automotive applications,
this HEXFET® Power MOSFET utilizes the latest
processingtechniquestoachieveextremelylowon-
resistance per silicon area. Additional features of
thisdesign area175°Cjunctionoperatingtempera-
ture, fast switching speed and improved repetitive
avalanche rating . These features combine to make
thisdesignanextremelyefficientandreliabledevice
foruseinAutomotiveapplicationsandawidevariety
of other applications.
D2Pak
TO-262
IRLZ44ZL
TO-220AB
IRLZ44Z
IRLZ44ZS
Absolute Maximum Ratings
Parameter
Max.
51
Units
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
I
I
I
@ T = 25°C
C
D
D
@ T = 100°C
C
36
A
204
80
DM
P
@T = 25°C
Power Dissipation
C
W
D
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
0.53
± 16
W/°C
V
V
GS
EAS (Thermally limited)
78
110
mJ
Single Pulse Avalanche Energy Tested Value
Avalanche Current
EAS (Tested )
IAR
See Fig.12a, 12b, 15, 16
A
Repetitive Avalanche Energy
EAR
mJ
T
J
Operating Junction and
-55 to + 175
T
Storage Temperature Range
°C
STG
Soldering Temperature, for 10 seconds
Mounting Torque, 6-32 or M3 screw
300 (1.6mm from case )
10 lbf in (1.1N m)
Thermal Resistance
Parameter
Typ.
–––
Max.
1.87
–––
62
Units
°C/W
RθJC
Junction-to-Case
RθCS
RθJA
RθJA
0.50
–––
Case-to-Sink, Flat Greased Surface
Junction-to-Ambient
–––
40
Junction-to-Ambient (PCB Mount)
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1
7/21/04
IRLZ44Z/S/LPbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Drain-to-Source Breakdown Voltage
Min. Typ. Max. Units
Conditions
VGS = 0V, ID = 250µA
V(BR)DSS
55
–––
0.05
11
–––
V
∆V(BR)DSS/∆TJ
RDS(on)
Breakdown Voltage Temp. Coefficient –––
––– V/°C Reference to 25°C, ID = 1mA
mΩ
mΩ
mΩ
Static Drain-to-Source On-Resistance
–––
–––
–––
1.0
13.5
20
VGS = 10V, ID = 31A
VGS = 5.0V, ID = 30A
VGS = 4.5V, ID = 15A
VDS = VGS, ID = 250µA
VDS = 25V, ID = 31A
–––
–––
–––
–––
–––
–––
–––
22.5
3.0
VGS(th)
Gate Threshold Voltage
V
V
gfs
IDSS
Forward Transconductance
Drain-to-Source Leakage Current
27
–––
20
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
µA VDS = 55V, VGS = 0V
250
200
VDS = 55V, VGS = 0V, TJ = 125°C
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
nA
VGS = 16V
––– -200
VGS = -16V
ID = 31A
Qg
Qgs
Qgd
td(on)
tr
24
7.5
12
36
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
–––
–––
–––
–––
–––
–––
–––
nC VDS = 44V
VGS = 5.0V
14
VDD = 50V
Rise Time
160
25
ID = 31A
td(off)
tf
Turn-Off Delay Time
ns RG = 7.5 Ω
VGS = 5.0V
Fall Time
42
LD
D
S
Internal Drain Inductance
4.5
Between lead,
nH 6mm (0.25in.)
from package
G
LS
Internal Source Inductance
–––
7.5
–––
and center of die contact
Ciss
Input Capacitance
––– 1620 –––
VGS = 0V
Coss
Output Capacitance
–––
–––
–––
–––
–––
230
130
860
180
280
–––
–––
–––
–––
–––
VDS = 25V
Crss
Reverse Transfer Capacitance
Output Capacitance
pF ƒ = 1.0MHz
Coss
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
VGS = 0V, VDS = 44V, ƒ = 1.0MHz
Coss
Output Capacitance
Coss eff.
Effective Output Capacitance
V
GS = 0V, VDS = 0V to 44V
Source-Drain Ratings and Characteristics
Parameter
Min. Typ. Max. Units
Conditions
I
Continuous Source Current
–––
–––
51
MOSFET symbol
S
(Body Diode)
A
showing the
I
Pulsed Source Current
–––
–––
204
integral reverse
SM
(Body Diode)
p-n junction diode.
V
t
Diode Forward Voltage
–––
–––
–––
–––
21
1.3
32
24
V
T = 25°C, I = 31A, V = 0V
SD
J
S
GS
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
ns T = 25°C, I = 31A, VDD = 28V
J F
rr
di/dt = 100A/µs
Q
t
16
nC
rr
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
on
2
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IRLZ44Z/S/LPbF
1000
100
10
1000
100
10
VGS
15V
10V
8.0V
5.0V
4.5V
4.0V
3.5V
3.0V
VGS
15V
10V
8.0V
5.0V
4.5V
4.0V
3.5V
3.0V
TOP
TOP
BOTTOM
BOTTOM
3.0V
3.0V
1
≤
≤
60µs PULSE WIDTH
Tj = 175°C
60µs PULSE WIDTH
Tj = 25°C
0.1
1
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000.0
100.0
10.0
60
T
= 175°C
= 25°C
J
T
= 25°C
J
40
20
0
T
= 175°C
J
T
J
V
= 20V
DS
V
= 10V
DS
380µs PULSE WIDTH
≤
60µs PULSE WIDTH
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0 10.0
0
10
D,
20
30
40
50
V
, Gate-to-Source Voltage (V)
GS
I
Drain-to-Source Current (A)
Fig 3. Typical Transfer Characteristics
Fig 4. Typical Forward Transconductance
Vs. Drain Current
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3
IRLZ44Z/S/LPbF
2500
12
10
8
V
= 0V,
= C
f = 1 MHZ
I = 31A
GS
D
C
C
C
+ C , C
SHORTED
iss
gs
gd
ds
V
= 44V
DS
= C
rss
oss
gd
2000
1500
1000
500
0
VDS= 28V
VDS= 11V
= C + C
ds
gd
Ciss
6
4
2
Coss
Crss
0
0
10
20
30
40
50
1
10
, Drain-to-Source Voltage (V)
100
Q
Total Gate Charge (nC)
G
V
DS
Fig 6. Typical Gate Charge Vs.
Fig 5. Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
1000
100
10
1000.0
OPERATION IN THIS AREA
LIMITED BY R (on)
DS
100.0
10.0
1.0
T
= 175°C
J
100µsec
1msec
T
= 25°C
J
1
Tc = 25°C
10msec
Tj = 175°C
Single Pulse
V
= 0V
GS
0.1
0.1
1
10
100
1000
0.2
0.6
1.0
1.4
1.8
V
, Drain-toSource Voltage (V)
DS
V
, Source-to-Drain Voltage (V)
SD
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
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IRLZ44Z/S/LPbF
60
50
40
30
20
10
0
2.5
2.0
1.5
1.0
0.5
I
= 30A
D
V
= 5.0V
GS
25
50
75
100
125
150
175
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
T
, Junction Temperature (°C)
T , Junction Temperature (°C)
J
J
Fig 10. Normalized On-Resistance
Fig 9. Maximum Drain Current Vs.
Vs. Temperature
Case Temperature
10
1
0.1
D = 0.50
0.20
0.10
R1
R2
R2
R3
R3
Ri (°C/W) τi (sec)
R1
τ
JτJ
τ
τ
0.05
Cτ
0.736
0.687
0.449
0.000345
τ
1τ1
τ
2 τ2
3τ3
0.02
0.01
0.00147
0.007058
Ci= τi/Ri
0.01
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
, Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRLZ44Z/S/LPbF
320
240
160
80
15V
I
D
TOP
3.7A
5.7A
31A
DRIVER
+
L
BOTTOM
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
V
20V
GS
0.01
Ω
t
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
0
25
50
75
100
125
150
175
Starting T , Junction Temperature (°C)
J
I
AS
Fig 12c. Maximum Avalanche Energy
Fig 12b. Unclamped Inductive Waveforms
Vs. Drain Current
Q
G
10 V
Q
Q
3.0
GS
GD
V
G
2.5
2.0
1.5
1.0
0.5
I
= 250µA
D
Charge
Fig 13a. Basic Gate Charge Waveform
L
VCC
DUT
0
1K
-75 -50 -25
0
25 50 75 100 125 150 175
, Temperature ( °C )
T
J
Fig 14. Threshold Voltage Vs. Temperature
Fig 13b. Gate Charge Test Circuit
6
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IRLZ44Z/S/LPbF
1000
100
10
Duty Cycle = Single Pulse
Allowed avalanche Current vs
avalanche pulsewidth, tav
∆
assuming
Tj = 25°C due to
0.01
avalanche losses. Note: In no
case should Tj be allowed to
exceed Tjmax
0.05
0.10
1
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current Vs.Pulsewidth
100
Notes on Repetitive Avalanche Curves , Figures 15, 16:
TOP
BOTTOM 1% Duty Cycle
= 31A
Single Pulse
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
I
80
60
40
20
0
D
25
50
75
100
125
150
175
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
Starting T , Junction Temperature (°C)
J
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
Fig 16. Maximum Avalanche Energy
EAS (AR) = PD (ave)·tav
Vs. Temperature
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7
IRLZ44Z/S/LPbF
Driver Gate Drive
P.W.
P.W.
Period
Period
D =
D.U.T
+
*
=10V
V
GS
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D.U.T. I Waveform
SD
+
-
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
-
+
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
Re-Applied
Voltage
• di/dt controlled by RG
RG
+
-
Body Diode
Inductor Current
Forward Drop
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
I
SD
Ripple
≤ 5%
* VGS = 5V for Logic Level Devices
Fig 17. Diode Reverse Recovery Test Circuit for N-Channel
HEXFET® Power MOSFETs
RD
VDS
VGS
D.U.T.
RG
+VDD
-
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 18a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
t
r
t
t
f
d(on)
d(off)
Fig 18b. Switching Time Waveforms
8
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IRLZ44Z/S/LPbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
10.54 (.415)
3.78 (.149)
- B -
10.29 (.405)
2.87 (.113)
2.62 (.103)
4.69 (.185)
4.20 (.165)
3.54 (.139)
1.32 (.052)
1.22 (.048)
- A -
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
LEAD ASSIGNMENTS
1.15 (.045)
MIN
HEXFET
IGBTs, CoPACK
1
2
3
1- GATE
1- GATE
2- DRAIN
3- SOURCE
2- COLLECTOR
3- EMITTER
4- COLLECTOR
4- DRAIN
14.09 (.555)
13.47 (.530)
4.06 (.160)
3.55 (.140)
0.93 (.037)
0.69 (.027)
0.55 (.022)
0.46 (.018)
3X
3X
1.40 (.055)
3X
1.15 (.045)
0.36 (.014)
M
B A M
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NOTES:
1
2
DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
CONTROLLING DIMENSION : INCH
3
4
OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
TO-220AB Part Marking Information
EXAMPLE: T HIS IS AN IRF1010
LOT CODE 1789
PART NUMBER
AS S EMBLED ON WW 19, 1997
IN THE AS S EMBLY LINE "C"
INTERNATIONAL
RECTIFIER
LOGO
Note: "P" in assembly line
position indicates "Lead-Free"
DATE CODE
YEAR 7 = 1997
WEEK 19
AS S E MB LY
LOT CODE
LINE C
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9
IRLZ44Z/S/LPbF
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
D2Pak Part Marking Information (Lead-Free)
T H IS IS AN IR F 530S WIT H
P AR T N U MB E R
D AT E COD E
L OT COD E 8024
AS S E MB L E D ON WW 02, 2000
IN T H E AS S E MB L Y L IN E "L "
IN T E R N AT IONAL
R E CT IF IE R
L OGO
F 530S
N ote: "P " in as s embly line
pos ition indicates "L ead-F ree"
YE AR
WE E K 02
L IN E
0 = 2000
AS S E MB L Y
L OT COD E
L
OR
P AR T N U MB E R
IN T E R N AT ION AL
R E CT IF IE R
L OGO
F 530S
D AT E CODE
P
=
DE S IGN AT E S L E AD -F R E E
P R OD U CT (OP T ION AL )
AS S E MB L Y
L OT CODE
YE AR
W E E K 02
A = AS S E M B L Y S IT E CODE
0 = 2000
10
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IRLZ44Z/S/LPbF
TO-262 Package Outline
TO-262 Part Marking Information
E XAMPL E : T H IS IS AN IR L 3103L
L OT CODE 1789
PAR T NU MB E R
INT E R NAT IONAL
R E CT IF IE R
L OGO
AS S E MB L E D ON WW 19, 1997
IN T H E AS S E MB L Y L INE "C"
DAT E CODE
YE AR 7 = 1997
WE E K 19
Note: "P" in as s embly line
pos ition indicates "L ead-F ree"
AS S E MB L Y
L OT CODE
L INE
C
O R
PAR T NU MB E R
DAT E CODE
INT E R NAT IONAL
R E CT IF IE R
L OGO
P
=
DE S IGNAT E S L E AD-F R E E
PR ODU CT (OPT IONAL )
AS S E MB L Y
L OT CODE
YE AR 7 = 1997
WE E K 19
A = AS S E MB L Y S IT E CODE
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11
IRLZ44Z/S/LPbF
D2Pak Tape & Reel Infomation
TRR
1.60 (.063)
1.50 (.059)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
0.368 (.0145)
0.342 (.0135)
FEED DIRECTION
TRL
11.60 (.457)
11.40 (.449)
1.85 (.073)
1.65 (.065)
24.30 (.957)
23.90 (.941)
15.42 (.609)
15.22 (.601)
1.75 (.069)
1.25 (.049)
10.90 (.429)
10.70 (.421)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039)
24.40 (.961)
4
3
Notes:
ꢀ
Limited by TJmax , see Fig.12a, 12b, 15, 16 for typical repetitive
avalanche performance.
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11).
Limited by TJmax, starting TJ = 25°C, L = 0.166mH
This value determined from sample failure population. 100%
tested to this value in production.
RG = 25Ω, IAS = 31A, VGS =10V. Part not
recommended for use above this value.
This is only applied to TO-220AB pakcage.
Pulse width ≤ 1.0ms; duty cycle ≤ 2%.
Coss eff. is a fixed capacitance that gives the
same charging time as Coss while VDS is rising
This is applied to D2Pak, when mounted on 1" square PCB (FR-
4 or G-10 Material). For recommended footprint and soldering
techniques refer to application note #AN-994.
from 0 to 80% VDSS
.
Rθ is measured at TJ approximately 90°C
TO-220AB package is not recommended for Surface Mount Application.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Automotive [Q101]market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 7/04
12
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Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/
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