IRMCF341 [INFINEON]
High Performance Appliance Motor Control IC; 高性能家电电机控制IC
| 型号： | IRMCF341 |
| 厂家： | 
Infineon |
| 描述： | High Performance Appliance Motor Control IC |
| 文件： | 总8页 (文件大小：274K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Outline Sheet No. 5-26-06
IRMdvanCcedFIn3orm4ati1on
High Performance Appliance Motor Control IC
Features
Product Summary
ꢀ
MCETM(Motion Control Engine) - Hardware based
computation engine for high efficiency sinusoidal
sensorless control for Permanent Magnet AC motors
Built-in hardware peripheral for single shunt current
feedback reconstruction
Maximum clock input (fcrystal
)
60 MHz
128 MHz
11 µsec typ
16 bit signed
48K bytes
8K bytes
Maximum internal clock (SYSCLK)
Sensorless control computation time
MCETM computation data range
Program RAM loaded from external EEPROM
Data RAM
ꢀ
ꢀ
ꢀ
Supports both interior and surface permanent magnet
motor sensorless control
No external current or voltage sensing OP amp circuit
required
GateKill latency (digital filtered)
2 µsec
PWM carrier frequency
A/D input channels
14 bits/ SYSCLK
8
ꢀ
ꢀ
ꢀ
Loss minimization Space Vector PWM
Three-channel analog output (PWM)
Embedded 8-bit high speed microcontroller (8051) for
flexible I/O and man-machine control
JTAG programming port for emulation/debugger
Serial communication interface (UART)
I2C/SPI serial interface
Three general purpose timers/counters
Three special timers: watchdog timer, periodic timer,
capture timer
A/D converter resolution
A/D converter conversion speed
8051 instruction execution speed
Analog output (PWM) resolution
UART baud rate (typ)
Number of I/O (max)
12 bits
2 µsec
2 SYSCLK
8 bits
57.6K bps
24
ꢀ
ꢀ
ꢀ
ꢀ
ꢀ
Package
QFP64
ꢀ
ꢀ
Three general purpose timers/counters
External EEPROM and internal RAM facilitates
debugging and code development
ꢀ
Pin compatible with OTP ROM version
Description
IRMCF341 is a high performance RAM based motion control IC designed primarily for appliance applications. IRMCF341 is designed
to achieve low cost and high performance control solutions for advanced inverterized appliance motor control. IRMCF341 contains
two computation engines. One is the Motion Control Engine (MCETM) for sensorless control of permanent magnet motors; the other is
an 8-bit high-speed microcontroller (8051). Both computation engines are integrated into one monolithic chip. The MCETM contains a
collection of control elements implemented in hardware such as Proportional plus Integral, Vector rotator, Angle estimator,
Multiply/Divide, Low loss SVPWM and Single Shunt IFB. The user can program a motion control algorithm by connecting these
control elements using a graphic compiler. Key components of the complex sensorless control algorithms, such as the Angle Estimator,
are provided as complete pre-defined control blocks. A unique analog/digital circuit and algorithm to fully support single shunt current
reconstruction is also provided. The 8051 microcontroller performs 2-cycle instruction execution (60MIPS at 120MHz). The MCE and
8051 microcontroller are connected via dual port RAM for signal monitoring and command input. An advanced graphic compiler for
the MCETM is seamlessly integrated into the MATLAB/Simulink environment, while third party JTAG-based emulator tools are
supported for 8051 software developments. IRMCF341 comes in a small QFP64 pin package.
This document is the property of International Rectifier and may not be copied or distributed without expressed consent.
IRMCF341
1 Overview
IRMCF341 is a new International Rectifier integrated circuit device primarily designed as a one-
chip solution for complete inverter controlled appliance motor control applications. Unlike a
traditional microcontroller or DSP, the IRMCF341 provides a built-in closed loop sensorless
control algorithm using the unique Motion Control Engine (MCETM) for permanent magnet
motors. The MCETM consists of a collection of control elements, motion peripherals, a dedicated
motion control sequencer and dual port RAM to map internal signal nodes. IRMCF341 also
employs a unique single shunt current reconstruction circuit to eliminate additional analog/digital
circuitry and enables a direct shunt resistor interface to the IC. Motion control programming is
achieved using a dedicated graphical compiler integrated into the MATLAB/SimulinkTM
development environment. Sequencing, user interface, host communication, and upper layer
control tasks can be implemented in the 8051 high-speed 8-bit microcontroller. The 8051
microcontroller is equipped with a JTAG port to facilitate emulation and debugging tools. Figure 1
shows a typical application schematic using the IRMCF341.
IRMCF341 contains 48K bytes of program RAM, which can be loaded from external EEPROM
for 8051 program execution. The IRMCF341 is intended for development purposes. For high
volume production, the program RAM is replaced with 64K bytes of OTP ROM. Both the
development and ROM versions come in a 64-pin QFP package with identical pin configuration to
facilitate PC board layout and transition to mass production.
Appliance Inverter
Passive
EMI
HVIC
Gate Drive
&
PMSM
Filter
Protection
Circuit
1.8
V
IRMCF341
Multiple
Output
Power
Supply
3.3
V
7 Analog Input
Up to 24 Digital
Input/Output
I2C Interface
to EEPROM
UART interface
to Front Panel
Figure 1. Typical Application Block Diagram Using IRMCF341
This document is the property of International Rectifier and may not be copied or distributed without expressed consent.
2
IRMCF341
2 IRMCF341 Block Diagram and Main Functions
IRMCF341 block diagram is shown in Figure 2.
8051 Microcontroller
MCE (Motion Control Engine)
3
D/A
Monitoring
(PWM)
Timer/
Counter
0,1,2
6
To IGBT
Low Loss
Space Vector
PWM
Gate Drive
Capture
Timer
GateKill
8 bit
CPU
Core
Watchdog
Timer
Single Shunt
Current
Dual Port
RAM
Motion
Control
Modules
Periodic
Timer
Reconstruction
2KB*
3
2/4
Program
RAM
Single Shunt
EEPROM
Interface
I 2C / SPI
AIN0
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
48KB
2
MCE Code
RAM
Host
UART
Interface
A/D
MUX
S/H
4KB*
(8)
(8)
(5)
Local
RAM
2KB*
PORT 1
PORT 2
PORT 3
* Sizes are
Digital
I/Os
configurable
Interrupt
Control
4
2
Motion
Control
Emulator
Debugger
PORT 5
JTAG
Sequencer
120MHz
Crystal
(4MHz)
PLL
Figure 2. IRMCF341 Internal Block Diagram
IRMCF341 contains the following functions for sensorless AC motor control applications:
• Motion Control Engine (MCETM)
o Proportional plus Integral block
o Low pass filter
o Differentiator and lag (high pass filter)
o Ramp
o Limit
This document is the property of International Rectifier and may not be copied or distributed without expressed consent.
3
IRMCF341
o Angle estimate (sensorless control)
o Inverse Clark transformation
o Vector rotator
o Bit latch
o Peak detect
o Transition
o Multiply-divide (signed and unsigned)
o Divide (signed and unsigned)
o Adder
o Subtractor
o Comparator
o Counter
o Accumulator
o Switch
o Shift
o ATAN (arc tangent)
o Function block (any curve fitting, nonlinear function)
o 16 bit wide Logic operations (AND, OR, XOR, NOT, NEGATE)
o MCETM program memory and dual port RAM (6K byte)
o MCETM control sequencer
• 8051 microcontroller
o Three 16 bit timer/counters
o One 16 bit periodic timer
o One 16 bit watchdog timer
o One 16 bit capture timer
o Up to twenty discrete I/Os
o Eight-channel 12 bit A/D
ꢁ Buffered (current sensing) one channel (0 – 1.2V input)
ꢁ Unbuffered seven channels (0 – 1.2V input)
o JTAG port (4 pins)
o Up to three channels of analog output (8 bit PWM)
o UART
o I2C/SPI port
o 48K byte program RAM loaded from external EEPROM
o 2K byte data RAM
This document is the property of International Rectifier and may not be copied or distributed without expressed consent.
4
IRMCF341
3 Pinout
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
XTAL0
1
2
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
P3.0/INT2/CS1
PWMUH
XTAL1
P1.0/T2
3
PWMUL
PWMVH
P1.1/RXD
4
P1.2/TXD
5
PWMVL
PWMWH
PWMWL
GATEKILL
VDD1
P1.3/SYNC/SCK
6
7
P1.4/CAP
8
P1.5
P1.6
9
IRMCF341
P1.7
VDD2
VSS
10
11
12
13
14
15
16
VSS
(Top View)
VDD2
AIN6
AIN5
AIN4
AIN3
AIN2
VDD1
P2.0/NMI
P2.1
P2.2
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
Figure 3. IRMCF341 Pin Configuration
This document is the property of International Rectifier and may not be copied or distributed without expressed consent.
5
IRMCF341
4 Application Connections
Typical application connection is shown in Figure 4. All components necessary to implement a
complete sensorless drive control algorithm are shown connected to IRMCF341.
XTAL0
XTAL1
4MHz
System
PLL
Crystal
Clock
System
clock
PWMUH
PWMUL
PWMVH
PWMVL
PWMWH
PWMWL
PLLVDD
PLLVSS
Logic
UART
I2C/SPI
1.8V
Host
Washer
IGBT Gate
Drive
P1.2/TXD
P1.1/RXD
Microcontroller
(UART)
Motion
Control
Modules
Low Loss
Space
Vector
PWM
(i.e.IRS2631D)
SDA/CS0
SCL/SO-SI
Dual
Port
Other Communication
(I2C or SPI)
GATEKILL
3.3V
Memory
(2KB)
&
P1.0/T2
P1.3/SYNC/SCK
P1.4/CAP
P1.5
PORT1
MCE
P1.6
Motion
Control
Sequencer
P1.7
Code
Memory
(4KB)
P2.0/NMI
P2.1
P2.2
P2.3
P2.4
Digital I/O
Control
PORT2
PORT3
P2.5
0.6V
IFBC+
P3.0/INT2/CS1
P3.2/INT0
P3.3/INT1
P3.5/T1
Motor
DC bus shunt
resistor
S/H
IFBC-
IFBCO
Timers
AIN0
Watchdog
Timer
DC bus
voltage
P2.6/AOPWM0
P2.7/AOPWM1
P3.1/AOPWM2
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
PWM0
PWM1
PWM2
12bit
A/D
&
Local
RAM
(2KB)
Analog Output
Other analog input (0-1.2V)
MUX
TSTMOD
Test Mode
Circuit
Program
RAM
Test
AREF
Mode
Optional External Voltage
Reference (0.6V)
TCLK
(48KB)
CMEXT
P5.3/TDI
JTAG Port
JTAG
P5.1/TSM
Interface
5
P5.2/TDO
Control
RESET
AVDD
AVSS
8051
CPU
RESET
1.8V
VDD1
VDD2
System
Reset
3.3V
1.8V
VSS
IRMCF341
Figure 4. Application Connection of IRMCF341
This document is the property of International Rectifier and may not be copied or distributed without expressed consent.
6
IRMCF341
5 Package Dimensions
Figure 5. Package Drawing
This document is the property of International Rectifier and may not be copied or distributed without expressed consent.
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IRMCF341
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 252-7105
http://www.irf.com Data and specifications subject to change without notice. 5/26/2006
Sales Offices, Agents and Distributors in Major Cities Throughout the World.
This document is the property of International Rectifier and may not be copied or distributed without expressed consent.
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