IRS2110-2 [INFINEON]
HIGH AND LOW SIDE DRIVER;
| 型号： | IRS2110-2 |
| 厂家： | 
Infineon |
| 描述： | HIGH AND LOW SIDE DRIVER 驱动 |
| 文件： | 总19页 (文件大小：566K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Data Sheet No. PD60249
IRS2110(-1,-2,S)PbF
IRS2113(-1,-2,S)PbF
HIGHAND LOW SIDE DRIVER
Features
Product Summary
· Floating channel designed for bootstrap operation
· Fully operational to +500 V or +600 V
· Tolerant to negative transient voltage, dV/dt immune
· Gate drive supply range from 10 V to 20 V
· Undervoltage lockout for both channels
· 3.3 V logic compatible
V
(IRS2110)
(IRS2113)
500 V max.
600 V max.
OFFSET
I +/-
O
2 A/2 A
V
OUT
10 V - 20 V
· Separate logic supply range from 3.3 V to 20 V
· Logic and power ground ± 5V offset
t
(typ.)
130 ns & 120 ns
on/off
· CMOS Schmitt-triggered inputs with pull-down
· Cycle by cycle edge-triggered shutdown logic
· Matched propagation delay for both channels
· Outputs in phase with inputs
Delay Matching (IRS2110) 10 ns max.
(IRS2113) 20 ns max.
Packages
· RoHS compliant
Description
The IRS2110/IRS2113 are high voltage, high speed
power MOSFET and IGBT drivers with independent
high-side and low-side referenced output channels. Pro-
prietary HVIC and latch immune CMOS technologies
enable ruggedized monolithic construction. Logic in-
puts are compatible with standard CMOS or LSTTL out-
put, down to 3.3 V logic. The output drivers feature a
high pulse current buffer stage designed for minimum
driver cross-conduction. Propagation delays are
matched to simplify use in high frequency applications.
The floating channel can be used to drive an N-channel
power MOSFET or IGBT in the high-side configuration
which operates up to 500 V or 600 V.
16-Lead PDIP
(w/o leads 4 & 5)
IRS2110-2 and IRS2113-2
14-Lead PDIP
IRS2110 and IRS2113
16-Lead SOIC
IRS2110S and
IRS2113S
14-Lead PDIP
(w/o lead 4)
IRS2110-1 and IRS2113-1
up to 500 V or 600 V
Typical Connection
HO
VDD
HIN
SD
VB
VS
VDD
HIN
SD
TO
LOAD
LIN
VSS
VCC
COM
LO
LIN
VSS
VCC
(Refer to Lead Assignments for correct pin configuration). This diagram shows electrical connec-
tions only. Please refer to our Application Notes and DesignTips for proper circuit board layout.
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1
IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage param-
eters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured
under board mounted and still air conditions. Additional information is shown in Figs. 28 through 35.
Symbol
Definition
Min.
-0.3
Max.
Units
(IRS2110)
(IRS2113)
520 (Note 1)
620 (Note 1)
VB
High-side floating supply voltage
-0.3
V
High-side floating supply offset voltage
High-side floating output voltage
Low-side fixed supply voltage
Low-side output voltage
V
- 20
V
B
+ 0.3
+ 0.3
S
B
S
V
HO
V
- 0.3
V
B
V
CC
-0.3
20 (Note 1)
V
V
LO
-0.3
-0.3
V
CC
+ 0.3
+20
V
SS
V
Logic supply voltage
DD
(Note 1)
V
Logic supply offset voltage
V
- 20
V
CC
V
DD
+ 0.3
+ 0.3
SS
CC
V
Logic input voltage (HIN, LIN, & SD)
V
SS
- 0.3
IN
dV /dt
s
Allowable offset supply voltage transient (Fig. 2)
—
50
V/ns
W
(14 lead DIP)
—
—
1.6
1.25
75
PD
Package power dissipation @ TA £ +25 °C
(16 lead SOIC)
(14 lead DIP)
(16 lead SOIC)
—
RTHJA
Thermal resistance, junction to ambient
°C/W
°C
—
100
150
150
300
T
Junction temperature
—
J
S
L
T
T
Storage temperature
-55
—
Lead temperature (soldering, 10 seconds)
Note 1: All supplies are fully tested at 25 V, and an internal 20 V clamp exists for each supply.
Recommended Operating Conditions
The input/output logic timing diagram is shown in Fig. 1. For proper operation, the device should be used within the
recommended conditions. The V and V
offset ratings are tested with all supplies biased at a 15 V differential.
Typical ratings at other bias conditions are shown in Figs. 36 and 37.
S
SS
Symbol
Definition
Min.
Max.
Units
V
B
High-side floating supply absolute voltage
V
S
+ 10
V + 20
S
(IRS2110)
(IRS2113)
Note 2
500
600
VS
High-side floating supply offset voltage
Note 2
V
High-side floating output voltage
Low-side fixed supply voltage
Low-side output voltage
V
V
B
HO
S
V
CC
10
0
20
V
V
LO
VCC
V
DD
Logic supply voltage
V
SS
+ 3
V
SS
+ 20
V
Logic supply offset voltage
Logic input voltage (HIN, LIN & SD)
Ambient temperature
-5 (Note 3)
5
SS
V
V
SS
V
DD
IN
T
-40
125
°C
A
Note 2: Logic operational for V of -4 V to +500 V. Logic state held for V of -4 V to -V . (Refer to the Design Tip DT97-3)
BS
S
S
Note 3: When V
< 5 V, the minimum V offset is limited to -V
DD
SS
DD.
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2
IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF
Dynamic Electrical Characteristics
V
BIAS
(V , V , V ) = 15 V, C = 1000 pF, T = 25 °C and V
= COM unless otherwise specified. The dynamic
CC BS DD SS
L
A
electrical characteristics are measured using the test circuit shown in Fig. 3.
Symbol
Definition
Turn-on propagation delay
Turn-off propagation delay
Shutdown propagation delay
Turn-on rise time
Min. Typ. Max. Units Test Conditions
t
on
—
—
—
—
—
130
120
130
25
160
150
160
35
V = 0 V
S
t
off
V
S
= 500 V/600 V
t
sd
ns
t
r
t
f
Turn-off fall time
17
25
Delay matching, HS & LS
turn-on/off
(IRS2110)
(IRS2113)
—
—
—
—
10
20
MT
Static Electrical Characteristics
V
(V , V , V ) = 15 V, T = 25 °C and V = COM unless otherwise specified. The V , V
and I parameters
IN
BIAS CC BS DD SS IN TH,
A
are referenced to V and are applicable to all three logic input leads: HIN, LIN, and SD. The V and I parameters are
SS
referenced to COM and are applicable to the respective output leads: HO or LO.
O
O
Symbol
Definition
Min. Typ. Max. Units Test Conditions
V
Logic “1” input voltage
9.5
—
—
—
—
—
—
—
—
—
—
—
—
6.0
1.4
0.15
50
IH
V
Logic “0” input voltage
IL
V
V
OH
High level output voltage, V
- V
—
I
O
= 0 A
BIAS
O
V
Low level output voltage, V
—
I
O
= 20 mA
OL
LK
O
I
Offset supply leakage current
—
V =V = 500 V/600 V
B S
I
I
Quiescent V
Quiescent V
Quiescent V
supply current
supply current
supply current
125
180
15
20
—
230
340
30
QBS
BS
CC
DD
V
IN
= 0 V or V
DD
QCC
µA
I
QDD
I
Logic “1” input bias current
Logic “0” input bias current
40
V = V
IN DD
IN+
I
IN-
5.0
V
IN
= 0 V
V
supply undervoltage positive going
BS
threshold
supply undervoltage negative going
V
7.5
7.0
7.4
7.0
2.0
2.0
8.6
8.2
8.5
8.2
2.5
2.5
9.7
9.4
9.6
9.4
—
BSUV+
V
BS
threshold
supply undervoltage positive going
V
V
BSUV-
V
A
V
CC
threshold
supply undervoltage negative going
CCUV+
V
CC
V
CCUV-
threshold
V
= 0 V, V = V
IN
PW £ 10 µs
O
DD
I
Output high short circuit pulsed current
O+
V
O
= 15 V, V = 0V
IN
I
O-
Output low short circuit pulsed current
—
PW £ 10 µs
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3
IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF
Functional Block Diagram
VB
UV
VDD
DETECT
R
R
S
Q
HV
LEVEL
SHIFT
HO
PULSE
FILTER
R
Q
S
VDD/VCC
LEVEL
SHIFT
HIN
SD
PULSE
GEN
VS
VCC
UV
DETECT
VDD/VCC
LEVEL
SHIFT
LIN
VSS
LO
S
R
Q
DELAY
COM
Lead Definitions
Symbol Description
V
Logic supply
DD
HIN
SD
Logic input for high-side gate driver output (HO), in phase
Logic input for shutdown
LIN
Logic input for low-side gate driver output (LO), in phase
Logic ground
High-side floating supply
V
V
SS
B
HO
High-side gate drive output
High-side floating supply return
Low-side supply
V
V
S
CC
LO
Low-side gate drive output
COM
Low-side return
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4
IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF
Lead Assignments
14 Lead PDIP
16 Lead SOIC (Wide Body)
IRS2113S
IRS2110S/
IRS2110/IRS2113
16 Lead PDIP w/o leads 4 & 5
14 Lead PDIP w/o lead 4
IRS2110-2/IRS2113-2
IRS2110-1/IRS2113-1
Part Number
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5
IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF
HV = 10 to 500V/600V
V
=15V
cc
10KF6
6
10
µF
0.1
µF
+
200
µH
100µF
0.1
µF
10KF6
dV
9
3
2
5
10
7
HO
10KF6
S
11
12
1
>50 V/ns
dt
OUTPUT
MONITOR
13
IRF820
Figure 1. Input/Output Timing Diagram
Figure 2. Floating Supply Voltage Transient Test
Circuit
V
=15V
cc
ꢊꢋꢌ
ꢊꢋꢌ
V
ꢀꢁꢂ
ꢃꢁꢂ
B
10
0.1
+
µF
µF
10
µF
0.1
µF
15V
9
3
2
6
-
V
ꢄ
ꢄ
ꢄ
ꢈ
ꢄ
5
7
ꢆꢇ
ꢆꢈꢈ
ꢅ
S
10
C
HIN
L
(0 to 500V/600V)
HO
LO
10
µF
ꢍꢋꢌ
ꢍꢋꢌ
SD
11
12
1
LIN
ꢀꢉ
ꢃꢉ
C
L
13
!ꢋꢌ
!ꢋꢌ
Figure 3. Switching Time Test Circuit
Figure 4. Switching Time Waveform Definition
ꢊꢋꢌ
ꢊꢋꢌ
ꢀꢁꢂ
ꢃꢁꢂ
ꢊꢋꢌ
ꢐꢑ
ꢃꢉ
ꢀꢉ
ꢄ
ꢒ#
!ꢋꢌ
ꢀꢉ
ꢃꢉ
ꢍꢋꢌ
ꢎꢏ
ꢎꢏ
ꢍꢋꢌ
ꢃꢉ
ꢀꢉ
Figure 5. Shutdown Waveform Definitions
Figure 6. Delay Matching Waveform Definitions
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IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF
250
250
Max.
200
200
150
150
Typ.
Max.
Typ.
100
50
0
100
50
0
10
12
14
16
18
20
-50
-25
0
25
50
75
100
125
Temperature(oC)
Figure 7A. Turn-On Time vs. Temperature
V
Supply Voltage (V)
BIAS
Figure 7B. Turn-On Time vs. Supply Voltage
250
250
M ax.
200
150
100
50
200
Typ
.
150
Max.
100
Typ.
50
0
0
-50 -25
0
25
50
75 100 125
0
2
4
6
8
10 12 14 16 18 20
Temperature(oC)
V
Supply Voltage (V)
DD
Figure 8A. Turn-Off Time vs. Temperature
Figure 7C. Turn-On Time vs. V
Supply Voltage
DD
250
250
Max.
200
200
Max.
150
150
Typ.
Typ.
100
100
50
0
50
0
10
12
14
16
18
20
0
2
4
6
8
10 12 14 16 18 20
V
BIAS
Supply Voltage (V)
V
DD
Supply Voltage (V)
Figure 8B. Turn-Off Time vs. Supply Voltage
Figure 8C. Turn-Off Time vs. VDD Supply Voltage
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IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF
250
250
200
150
100
50
200
Max.
150
Max.
Typ.
Typ.
100
50
0
0
10
12
14
16
18
20
-50 -25
0
25
50
75
100 125
Temperature (oC)
V
BIAS
Supply Voltage (V)
Figure 9B. Shutdown Time vs. Supply Voltage
Figure 9A. Shutdown Time vs. Temperature
250
M ax.
200
100
80
150
60
Typ.
100
50
0
40
Max.
Typ.
20
0
0
2
4
6
8
10 12 14 16 18 20
-50
-25
0
25
50
75
100
125
Temperature (oC)
V
Supply Voltage (V)
DD
Figure 10A. Turn-On Rise Time
vs. Temperature
Figure 9C. Shutdown Time
vs. VDD Supply Voltage
100
80
60
40
20
0
50
40
30
20
10
0
Max.
Max.
Typ.
Typ.
-50
-25
0
25
50
75
100
125
10
12
14
16
18
20
V
BIAS
Supply Voltage (V)
Temperature (oC)
Figure 11A. Turn-Off Fall Time vs. Temperature
Figure 10B. Turn-On Rise Time vs. Voltage
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IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF
50
40
30
20
10
0
15.0
12.0
Max
9.0
6.0
3.0
0.0
Max.
Typ.
10
12
14
16
18
20
-50
-25
0
25
50
75
100
125
V
BIAS
Supply Voltage (V)
Temperature (oC)
Figure 11B. Turn-Off Fall Time vs. Voltage
Figure 12A. Logic “1” Input Threshold
vs. Temperature
15.0
15
12
9
12.0
9.0
6.0
3.0
0.0
Max.
Min.
6
3
0
0
2
4
6
8
10 12 14 16 18 20
-50
-25
0
25
50
75
100
125
V
DD
Logic Supply Voltage (V)
Temperature (oC)
Figure 12B. Logic “1” Input Threshold vs. Voltage
Figure 13A. Logic “0” Input Threshold
vs. Temperature
15
12
9
5.0
4.0
3.0
2.0
1.0
Min.
6
Max.
3
0
0.0
0
2
4
6
8
10 12 14 16 18 20
-50 -25
0
25
50
75 100 125
Temperature (oC)
V
DD
Logic Supply Voltage (V)
Figure 14A. High Level Output Voltage
vs. Te mperature (I = 0 mA)
Figure 13B. Logic “0” Input Threshold vs. Voltage
o
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IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF
5.0
4.0
3.0
2.0
1.0
0.20
0.16
Max.
0.12
0.08
0.04
0.00
Max
0.0
10
12
14
16
18
20
-50 -25
0
25
50
75 100 125
V BIAS Supply Voltage (V)
Temperature (oC)
Figure 14B. High Level Output Voltage
vs. Supply Voltage (I = 0 mA)
Figure 15A. Low Level Output vs. Temperature
o
500
0.20
0.16
0.12
0.08
0.04
0.00
400
300
200
100
Max.
Max.
0
10
12
14
16
18
20
-50
-25
0
25
50
75
100
125
Temperature (oC)
VCC Supply Voltage (V)
Figure 15B. Low Level Output vs. Supply Voltage
Figure 16A. Offset Supply Current vs. Temperature
500
500
400
300
400
300
200
Max.
200
Typ.
100
Max.
100
0
0
0
100
200
300
400
500
600
-50
-25
0
25
50
75
100
125
VB Boost Voltage (V)
Temperature (oC)
Figure 17A. VBS Supply Current vs. Temperature
10
Figure 16B. Offset Supply Current vs. Voltage
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IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF
625
500
375
500
400
300
200
100
0
Max.
250
Max.
Typ.
Typ.
125
0
-50
-25
0
25
50
75
100
125
10
12
14
16
18
20
Temperature (oC)
VBS Floating Supply Voltage (V)
Figure 18A. VCC Supply Current vs. Temperature
Figure 17B. VBS Supply Current vs. Voltage
625
100
80
500
375
60
250
Max.
40
Max.
125
Typ.
20
Typ.
0
0
10
12
14
16
18
20
-50
-25
0
25
50
75
100
125
Temperature (oC)
VCC Fixed Supply Voltage (V)
Figure 18B. VCC Supply Current vs. Voltage
Figure 19A. VDD Supply Current
vs. Temperature
00
60
50
40
30
20
10
0
80
60
40
20
0
Max.
Typ.
0
2
4
6
8
10 12 14 16 18 20
VDD Logic Supply Voltage (V)
Figure 19B. VDD Supply Current vs. VDD Voltage
-50
-25
0
25
50
75
100
125
Temperature (oC)
Figure 20A. Logic “1” Input Current
vs. Temperature
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IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF
60
50
40
30
20
10
0
6
5
Max
4
3
2
1
0
-50
-25
0
25
50
75
100
125
0
2
4
6
8
10 12 14 16 18 20
Temperature (°C)
VDD Logic Supply Voltage (V)
Figure 21A. Logic "0" Input Bias Current
vs. Temperature
Figure 20B. Logic “1” Input Current
vs. VDD Voltage
6
5
4
3
11.0
Max
10.0
9.0
8.0
7.0
6.0
Max.
Typ.
Min.
2
1
0
-50
-25
0
25
50
75
100
125
10
12
14
16
18
20
Temperature (oC)
Supply Voltage (V)
Figure 22. VBS Undervoltage (+) vs. Temperature
Figure 21B. Logic "0" Input Bias Current
vs. Voltage
11.0
11.0
10.0
Max.
10.0
9.0
8.0
7.0
6.0
Max.
Typ.
Min.
9.0
Typ.
8.0
Min.
7.0
6.0
-50
-25
0
25
50
75
100
125
-50
-25
0
25
50
75
100
125
Temperature (oC)
Temperature (oC)
Figure 24. VCC Undervoltage (+)
vs. Temperature
Figure 23. VBS Undervoltage (-)
vs. Temperature
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IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF
11.0
0.0
9.0
5.00
4.00
Max.
Typ.
3.00
Min.
Typ.
Min.
2.00
8.0
1.00
0.00
7.0
6.0
-50
-25
0
25
50
75
100
125
-50
-25
0
25
50
75
100
125
Temperature (oC)
Temperature (oC)
Figure 26A. Output Source Current
vs. Temperature
Figure 25. VCC Undervoltage (-) vs. Temperature
5.00
5.00
4.00
3.00
2.00
1.00
0.00
4.00
3.00
Typ.
Min.
2.00
Typ.
1.00
Min.
0.00
10
12
14
16
18
20
-50
-25
0
25
50
75
100
125
Temperature (oC)
VBIAS Supply Voltage (V)
Figure 26B. Output Source Current vs. Voltage
Figure 27A. Output Sink Current
vs. Temperature
320 V
5.00
4.00
3.00
150
125
100
75
140 V
2.00
Typ.
10 V
50
1.00
Min.
25
0.00
0
10
12
14
16
18
20
1E+2
1E+3
1E+4
1E+5
1E+6
VBIAS Supply Voltage (V)
Frequency (kHz)
Figure 27B. Output Sink Current vs. Voltage
Figure 28. IRS2110/IRS2113 TJ vs. Frequency
(IRFBC20) RGATE = 33 W, VCC = 15 V
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IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF
320 V
320 V
140 V
150
125
100
75
150
125
100
75
140 V
10 V
10 V
50
50
25
25
0
0
1E+2
1E+3
1E+4
1E+5
1E+6
1E+2
1E+3
1E+4
1E+5
1E+6
Frequency (kHz)
Frequency (kHz)
Figure 29. IRS2110/IRS2113 TJ vs. Frequency
Figure 30. IRS2110/IRS2113 TJ vs. Frequency
(IRFBC30) RGATE = 22 Ω, VCC = 15 V
(IRFBC40) RGATE = 15 Ω, VCC = 15 V
320 V
140 V
320 V
140 V
150
150
125
100
75
50
25
0
125
100
75
50
25
0
10 V
10 V
1E+2
1E+3
1E+4
1E+5
1E+6
1E+2
1E+3
1E+4
1E+5
1E+6
Frequency (kHz)
Frequency (kHz)
Figure 31. IRS2110/IRS2113 TJ vs. Frequency
Figure 32. IRS2110S/IRS2113S TJ vs. Frequency
(IRFPE50) RGATE = 10 Ω, VCC = 15 V
(IRFBC20) RGATE = 33 Ω, VCC = 15 V
320 V
140 V
320 V 140 V
150
150
125
100
75
125
100
75
50
25
0
10 V
10 V
50
25
0
1E+2
1E+3
1E+4
1E+5
1E+6
1E+2
1E+3
1E+4
1E+5
1E+6
Frequency (kHz)
Frequency (kHz)
Figure 34. IRS2110S/IRS2113S TJ vs. Frequency
Figure 33. IRS2110S/IRS2113S TJ vs. Frequency
(IRFBC40) RGATE = 15 Ω, VCC = 15 V
(IRFBC30) RGATE = 22 Ω, VCC = 15 V
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14
IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF
320 V 140 V 10 V
150
125
100
75
0.0
-2.0
Typ.
-4.0
-6.0
50
-8.0
25
-10.0
0
10
12
14
16
18
20
1E+2
1E+3
1E+4
1E+5
1E+6
Frequency (kHz)
VBS Floating Supply Voltage (V)
Figure 35. IRS2110S/IRS2113S TJ vs. Frequency
Figure 36. Maximum VS Negative Offset vs.
VBS Supply Voltage
(IRFPE50) RGATE = 10 Ω, VCC = 15 V
20.0
16.0
12.0
8.0
Typ.
4.0
0.0
10
12
14
16
18
20
VCC Fixed Supply Voltage (V)
Figure 37. Maximum VSS Positive Offset vs.
VCC Supply Voltage
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15
IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF
Case Outlines
01-6010
01-3002 03 (MS-001AC)
14-Lead PDIP
01-6010
14-Lead PDIP w/o Lead 4
01-3008 02 (MS-001AC)
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16
IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF
01-6015
16 Lead PDIP w/o Leads 4 & 5
01-3010 02
01 6015
01-3014 03 (MS-013AA)
16-Lead SOIC (wide body)
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17
IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF
Tape & Reel
LOADED TAPE FEED DIRECTION
16-Lead SOIC
A
B
H
D
F
C
NOTE : CONTROLLING
DIMENSION IN MM
E
G
CA R RIE R TA P E D IM E NS I O N FO R 1 6 S O IC W
M etr ic
Im p erial
Co d e
M in
11 .9 0
3 .9 0
15 .7 0
7 .4 0
10 .8 0
10 .6 0
1 .5 0
M ax
1 2.10
4.1 0
1 6.30
7.6 0
1 1.00
1 0.80
n/a
M in
M ax
0 .4 76
0 .1 61
0 .6 41
0 .2 99
0 .4 33
0 .4 25
n/a
A
B
C
D
E
F
0.46 8
0.15 3
0.61 8
0.29 1
0.42 5
0.41 7
0.05 9
0.05 9
G
H
1 .5 0
1.6 0
0 .0 62
F
D
B
C
A
E
G
H
RE E L D IM E NS I O N S FO R 1 6 SO IC W
M etr ic
Im p erial
Co d e
M in
32 9.60
20 .9 5
12 .8 0
1 .9 5
98 .0 0
n /a
18 .5 0
16 .4 0
M ax
3 30 .2 5
2 1.45
1 3.20
2.4 5
1 02 .0 0
2 2.40
2 1.10
1 8.40
M in
1 2 .9 76
0.82 4
0.50 3
0.76 7
3.85 8
n /a
M ax
13 .0 0 1
0 .8 44
0 .5 19
0 .0 96
4 .0 15
0 .8 81
0 .8 30
0 .7 24
A
B
C
D
E
F
G
H
0.72 8
0.64 5
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18
IRS2110(-1,-2,S)PbF/IRS2113(-1,-2,S)PbF
LEADFREE PART MARKING INFORMATION
Part number
IRSxxxxx
Date code
IR logo
YWW?
?XXXX
Pin 1
Identifier
Lot Code
(Prod mode - 4 digit SPN code)
?
MARKING CODE
P
Lead Free Released
Non-Lead Free
Released
Assembly site code
Per SCOP 200-002
ORDER INFORMATION
14-Lead PDIP IRS2110PbF
14-Lead PDIP IRS2110-1PbF
14-Lead PDIP IRS2113PbF
14-Lead PDIP IRS2113-1PbF
16-Lead PDIP IRS2110-2PbF
16-Lead PDIP IRS2113-2PbF
16-Lead SOIC IRS2110SPbF
16-Lead SOIC IRS2113SPbF
16-Lead SOIC Tape & Reel IRS2110STRPbF
16-Lead SOIC Tape & Reel IRS2113STRPbF
The SOIC-14 is MSL3 qualified.
The SOIC-16 is MSL3 qualified.
This product has been designed and qualified for the industrial level.
Qualification standards can be found at www.irf.com
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
Data and specifications subject to change without notice. 1/22/2007
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19
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