IRS21844MPBF [INFINEON]
HALF-BRIDGE DRIVER; 半桥驱动器型号: | IRS21844MPBF |
厂家: | Infineon |
描述: | HALF-BRIDGE DRIVER |
文件: | 总26页 (文件大小:873K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
August 9, 2011
IRS21844MPBF
HALF-BRIDGE DRIVER
Features
Product Summary
Topology
•
•
•
Floating channel designed for bootstrap operation
HalfꢀBridge
600 V
Fully operational to + 600 V
Tolerant to negative transient voltage, dV/dt
immune
VOFFSET
VOUT
10 V – 20 V
1.9 A & 2.3 A
•
•
•
•
•
•
•
Gate drive supply range from 10 V to 20 V
Undervoltage lockout for both channels
3.3 V and 5 V input logic compatible
Matched propagation delay for both channels
Logic and power ground +/ꢀ 5 V offset
Lower di/dt gate driver for better noise immunity
Output source/sink current capability 1.4 A/1.8 A
Io+ & I oꢀ (typical)
680 ns & 270 ns
ton & toff (typical)
400 ns (RDT = 0 ꢁ)
5 ꢂs (RDT = 200 kꢁ)
Deadtime (typical)
•
Lead free, RoHS compliant
Package Options
MLPQ4x4 16ꢀ Leads
(Without 2 leads)
Typical Connection
* Qualification standards can be found at www.irf.com
© 2008 International Rectifier
IRS21844MPBF
Description
The IRS21844MPBF is a high voltage, high speed power MOSFET and IGBT drivers with dependent high
and lowꢀside referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable
ruggedized monolithic construction. The logic input is compatible with standard CMOS or LSTTL output,
down to 3.3 V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver
crossꢀconduction. The floating channel can be used to drive an Nꢀchannel power MOSFET or IGBT in the
highꢀside configuration which operates up to 600 V.
Feature Comparison: IRS2181(4)/IRS2183(4)/IRS2184(4)
Crossꢀ
Part
Input
Logic
Conduction
Prevention
logic
DeadꢀTime
Ground
Pins
Ton/Toff
2181
21814
2183
21834
2184
21844
COM
VSS/COM
COM
VSS/COM
COM
VSS/COM
180/220 ns
180/220 ns
680/270 ns
HIN/LIN
HIN/LIN
IN/SD
no
yes
yes
none
Internal 500ns
Programmable 0.4 – 5 us
Internal 500ns
Programmable 0.4 – 5 us
Qualification Information†
Qualification Level
Industrial††
(per JEDEC JESD 47)
Comments: This IC has passed JEDEC’s Industrial
qualification. IR’s Consumer qualification level is
granted by extension of the higher Industrial level.
MSL2†††
MLPQ4x4 14L
Moisture Sensitivity Level
Machine Model
(per IPC/JEDEC JꢀSTDꢀ020)
Class A (+/ꢀ100V)
(per JEDEC standard JESD22ꢀA115)
Class 1C (+/ꢀ1500V)
ESD
Human Body Model
(per EIA/JEDEC standard EIA/JESD22ꢀA114)
Class III (+/ꢀ1000V)
(per JEDEC standard JESD22ꢀC101)
Class II, Level A
Charged Device Model
IC Latch-Up Test
RoHS Compliant
(per JESD78A)
Yes
†
Qualification standards can be found at International Rectifier’s web site http://www.irf.com/
†† Higher qualification ratings may be available should the user have such requirements. Please
contact your International Rectifier sales representative for further information.
††† Higher MSL ratings may be available for the specific package types listed here. Please contact your
International Rectifier sales representative for further information.
www.irf.com
© 2008 International Rectifier
2
IRS21844MPBF
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All
voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation
ratings are measured under board mounted and still air conditions.
Symbol
VB
Definition
Highꢀside floating absolute voltage
Highꢀside floating supply offset voltage
Highꢀside floating output voltage
Lowꢀside and logic fixed supply voltage
Lowꢀside output voltage
Min
ꢀ0.3
Max
620
Units
VS
VB ꢀ 25
VS ꢀ 0.3
ꢀ0.3
VB + 0.3
VB + 0.3
20†
VHO
VCC
VLO
V
ꢀ0.3
VCC + 0.3
VCC + 0.3
VCC + 0.3
VCC + 0.3
50
DT
Programmable deadtime pin voltage
VSS ꢀ0.3
VSS ꢀ0.3
VCC ꢀ 20
—
VIN
Logic input voltage (IN & SD)
Logic ground
VSS
dVS/dt
PD
Allowable offset supply voltage transient
Package power dissipation @ TA ≤ 25°C
V/ns
W
—
2.08
RthJA
TJ
Thermal resistance, junction to ambient
Junction temperature
—
—
36
°C/W
150
150
300
°C
TS
Storage temperature
ꢀ50
—
TL
Lead temperature (soldering, 10 seconds)
†
All supplies are fully tested at 25 V and an internal 20 V clamp exists for each supply.
Recommended Operating Conditions
The input/output logic timing diagram is shown in Figure 1. For proper operation the device should be used
within the recommended conditions. The VS and VSS offset rating are tested with all supplies biased at a 15 V
differential.
Symbol
VB
Definition
Highꢀside floating supply absolute voltage
Highꢀside floating supply offset voltage
Highꢀside floating output voltage
Lowꢀside and logic fixed supply voltage
Lowꢀside output voltage
Min
VS + 10
(††)
VS
Max
VS + 20
600
VB
Units
VS
VHO
VCC
VLO
VIN
10
20
V
0
VCC
VCC
VCC
5
†††)
Logic input voltage (IN & SD) (
VSS
VSS
ꢀ5
DT
Programmable deadtime pin voltage
Logic ground
VSS
TA
Ambient temperature
ꢀ40
125
°C
††
Logic operational for VS of ꢀ5 V to +600 V. Logic state held for VS of ꢀ5 V to –VBS. (Please refer to Design
Tip DT97ꢀ3 for more details).
†††
HIN and LIN are internally clamped with a 5.2 V zener diode.
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© 2008 International Rectifier
3
IRS21844MPBF
Dynamic Electrical Characteristics
VBIAS (VCC, VBS) = 15 V, VSS = COM, CL = 1000 pF, TA = 25°C, DT = VSS unless otherwise specified.
Symbol
ton
Definition
Turnꢀon propagation delay
Min Typ Max Units Test Conditions
—
—
—
—
—
—
—
680 900
270 400
180 270
VS = 0 V
toff
Turnꢀoff propagation delay
VS = 0 V or 600 V
tsd
Shutꢀdown propagation delay
Delay matching, HS & LS turnꢀon
Delay matching , HS & LS turnꢀoff
Turnꢀon rise time
MTon
MToff
t r
0
0
90
40
ns
40 60
20 35
VS = 0 V
t f
Turnꢀoff fall time
280 400 520
RDT = 0 ꢁ
RDT = 200 kꢁ
RDT = 0 ꢁ
Deadtime: LO turnꢀoff to HO turnꢀon (DTLOꢀHO) &
DT
HO turnꢀoff to LO turnꢀon (DTHOꢀLO
)
4
5
0
0
6
ꢂs
ns
—
—
50
MDT
Deadtime matching DTLOꢀHO ꢀ DTHOꢀLO
600
RDT = 200 kꢁ
Static Electrical Characteristics
VBIAS (VCC, VBS) = 15 V, VSS = COM, DT = VSS and TA = 25°C unless otherwise specified. The VIL, VIH and IIN
parameters are referenced to VSS/COM and are applicable to the respective input leads: IN and SD. The VO,
IO and Ron parameters are referenced to COM and are applicable to the respective output leads: HO and LO.
Test Conditions
Min Typ Max Units
Symbol
VIH
Definition
Logic “1” input voltage for HO & logic “0” for LO
Logic “0” input voltage for HO & logic “1” for LO
2.5
—
—
—
—
—
—
—
—
—
0.8
—
VIL
V
CC = 10 V to 20 V
VSD,TH+
VSD,THꢀ
VOH
2.5
—
SDinput positive going threshold
V
0.8
1.4
0.2
50
SDinput negative going threshold
High level output voltage, VBIAS ꢀ VO
—
IO = 0 A
IO = 20 mA
VOL
Low level output voltage, VO
Offset supply leakage current
Quiescent VBS supply current
Quiescent VCC supply current
Logic “1” input bias current
Logic “0” input bias current
—
ILK
—
VB = VS = 600 V
ꢂA
IQBS
20 60 150
VIN = 0 V or 5 V
IQCC
IIN+
0.4 1.0 1.6 mA
—
—
25 60
5.0
IN = 5 V, SD = 0 V
IN = 0 V, SD= 5 V
ꢂA
V
IINꢀ
—
VCCUV+
VBSUV+
VCCUVꢀ
VBSUVꢀ
VCC and VBS supply undervoltage positive going
threshold
VCC and VBS supply undervoltage negative going
threshold
8.0 8.9 9.8
7.4 8.2 9.0
VCCUVH
VBSUVH
Hysteresis
0.3 0.7
1.4 1.9
1.8 2.3
—
—
—
VO = 0 V,
IO+
IOꢀ
Output high short circuit pulsed current
Output low short circuit pulsed current
PW ≤ 10 ꢂs
VO = 15 V,
A
PW ≤ 10 ꢂs
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© 2008 International Rectifier
4
IRS21844MPBF
Functional Block Diagram: IRS21844
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© 2008 International Rectifier
5
IRS21844MPBF
Input/Output Pin Equivalent Circuit Diagrams: IRS21844
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© 2008 International Rectifier
6
IRS21844MPBF
Lead Definitions
PIN
Symbol
Description
Logic input for shutdown (referenced to VSS)
1
2
SD
VSS
Logic ground
3
4
DT
COM
LO
Programmable deadtime lead, referenced to VSS
Lowꢀside return
Lowꢀside gate drive output
No Connection
5
6
NC
VCC
NC
NC
NC
VS
7
Lowꢀside and logic fixed supply
No Connection
8
9
No Connection
10
11
12
13
14
15
16
No Connection (removed lead)
Highꢀside floating supply return
Highꢀside gate drive output
HO
VB
NC
NC
IN
Highꢀside floating supply
No Connection
No Connection (removed lead)
Logic input for highꢀside gate driver output (HO), in phase
Lead Assignments: IRS21844
16
15
14
13
SD
1
2
3
4
12
11
10
9
HO
VS
NC
NC
IRS21844MPBF
Vss
16Lꢀ MLPQ4x 4
with 2 leads
removed
DT
COM
5
6
7
8
= Removed lead
IRS21844MPBF
www.irf.com
© 2008 International Rectifier
7
IRS21844MPBF
Application Information and Additional Details
SD
Figure 1: Input/Output Timing Diagram
Figure 2: Switching Time Waveform Definitions
SD
Figure 3: Shutdown Waveform Definitions
Figure 4: Deadtime Waveform Definitions
IN (LO)
IN (HO)
50%
50%
LO
HO
10%
MT
MT
90%
LO
HO
Figure 5: Delay Matching Waveform Definitions
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© 2008 International Rectifier
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Package Details: MLPQ 4x4 -16L
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© 2008 International Rectifier
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IRS21844MPBF
Tape and Reel Details: MLPQ 4x4
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© 2008 International Rectifier
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IRS21844MPBF
Part Marking Information
Ordering Information
Standard Pack
Base Part Number
Package Type
Complete Part Number
Form
Quantity
Tube/Bulk
92
IRS21844MPBF
MLPQ 4x4ꢀ16L
IRS21844
IRS21844MTRPBF
Tape and Reel
3,000
The information provided in this document is believed to be accurate and reliable. However, International Rectifier assumes no
responsibility for the consequences of the use of this information. International Rectifier assumes no responsibility for any
infringement of patents or of other rights of third parties which may result from the use of this information. No license is granted by
implication or otherwise under any patent or patent rights of International Rectifier. The specifications mentioned in this document are
subject to change without notice. This document supersedes and replaces all information previously supplied.
For technical support, please contact IR’s Technical Assistance Center
http://www.irf.com/technicalꢀinfo/
WORLD HEADQUARTERS:
233 Kansas St., El Segundo, California 90245
Tel: (310) 252ꢀ7105
www.irf.com
© 2008 International Rectifier
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