IRSM005800MHTR [INFINEON]
Half-Bridge IPM for Low Voltage Applications;型号: | IRSM005800MHTR |
厂家: | Infineon |
描述: | Half-Bridge IPM for Low Voltage Applications |
文件: | 总14页 (文件大小:645K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
IRSM005-800MH
Half-Bridge IPM for Low Voltage
Applications
80A, 40V
Description
The IRSM005ꢀ800MH is a general purpose halfꢀbridge with integrated gate driver in an attractive 7x8mm
PQFN package. It is a general purpose building block suitable for a variety of low voltage applications where
power density is of critical importance. Typical examples would be advanced motor drives, dcꢀtoꢀac and dcꢀ
toꢀdc converters.
Features
• Package with low thermal resistance and minimal parasitics
• Low onꢀresistance HEXFETs: 2.7 mꢀ typ.
• Undervoltage lockout on logic supply
• Independent gate drive in phase with logic input
• Gate drive supply range from 10V to 20V
• Propagation delay matched to defined spec
• 3.3V, 5V and 15V logic input compatible
• RoHS compliant
Internal Electrical Schematic
Ordering Information
Orderable Part Number
Package Type
PQFN 7x8mm
PQFN 7x8mm
Form
Tray
Quantity
1300
IRSM005800MH
IRSM005800MHTR
Tape and Reel
2000
1
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March 19, 2014
IRSM005-800MH
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the module may occur. These are
not tested at manufacturing. All voltage parameters are absolute voltages referenced to VSS unless otherwise
stated in the table. The thermal resistance rating is measured under board mounted and still air conditions.
Symbol
Description
Min
---
Max
40
Unit
V
VDS
MOSFET Drain-to-Source Voltage
Maximum DC current per MOSFET @ TC=25°C (Note1)
Maximum Power dissipation per MOSFET @ TC =100°C
Maximum Operating Junction Temperature
Storage Temperature Range
Io
---
80
A
Pd
W
°C
°C
---
13
TJ (MOSFET & IC)
---
150
150
TS
-40
VGS
VB
Gate to Source voltage
+/- 20
High side floating absolute supply voltage
High side floating supply offset voltage
Low Side fixed supply voltage
-0.3
VB - 20
-0.3
225
VS
VB + 0.3
25
V
VCC
VLO
VHO
VIN
Low side output voltage
-0.3
VCC +0.3V
VCC +0.3V
VCC +0.3V
High side output voltage
-0.3
Logic input voltage LIN, HIN
-0.3
Note1: Calculated based on maximum junction temperature. Bond wires current limit is 49A
Inverter Static Electrical Characteristics
VBIAS (VCC, VBS)=15V, TJ=25ºC, unless otherwise specified.
Symbol
V(BR)DSS
VGS(TH)
Description
Min
40
2
Typ
ꢀꢀꢀ
Max
ꢀꢀꢀ
Units Conditions
DrainꢀtoꢀSource Breakdown Voltage
Gate Threshold Voltage
V
V
HIN=LIN=0V, ID=250ꢁA
ꢀꢀꢀ
4
ID=100ꢁA
ꢀꢀꢀ
ꢀꢀꢀ
ꢀꢀꢀ
2.7
4.2
5.0
ID=10A, TJ=25°C
ID=10A, TJ=150°C
HIN=LIN=0V, V+=40V
HIN=LIN=0V, V+=40V,
TJ=125°C
RDS(ON)
DrainꢀtoꢀSource Voltage
mꢂ
ꢃA
nA
20
IDSS
Zero Gate Voltage Drain Current
ꢀꢀꢀ
ꢀꢀꢀ
150
Gate to Source Forward Leakage
Gate to Source Reverse Leakage
Internal Gate Resistance
ꢀꢀꢀ
ꢀꢀꢀ
ꢀꢀꢀ
ꢀꢀꢀ
ꢀꢀꢀ
ꢀꢀꢀ
ꢀꢀꢀ
100
ꢀ100
ꢀꢀꢀ
VGS=20V
VGS=ꢀ20V
IGSS
RG
1.5
0.8
0.55
ꢂ
V
0.9
IF=10A
VSD
Mosfet Diode Forward Voltage Drop
IF=10A, TJ=150°C
V+= 40V,
VCC=+15V to 0V
RBSOA
Reverse Bias Safe Operating Area
FULL SQUARE, limited by TJmax
RMS Phase Current, sinusoidal
modulation, 5kHz
Io @ TA=60°C
ꢀꢀꢀ
13.5
ꢀꢀꢀ
ARMS V+=32V, TJ=125°C, MI=1,
PF=0.8, typical board
RMS Phase Current, sinusoidal
modulation, 20kHz
mount. See Figure 2.
Io @ TA=60°C
EAS
ꢀꢀꢀ
6
ꢀꢀꢀ
ꢀꢀꢀ
ARMS
Single Pulse Avalanche Energy
9.2
ꢀꢀꢀ
mJ
2
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March 19, 2014
IRSM005-800MH
Inverter Dynamic Electrical Characteristics
VBIAS (VCC, VBS)=15V, TJ=25ºC, unless otherwise specified.
gfs
Forward Transconductance
Total Gate Charge
159
ꢀꢀꢀ
ꢀꢀꢀ
ꢀꢀꢀ
ꢀꢀꢀ
ꢀꢀꢀ
ꢀꢀꢀ
ꢀꢀꢀ
ꢀꢀꢀ
ꢀꢀꢀ
ꢀꢀꢀ
ꢀꢀꢀ
ꢀꢀꢀ
ꢀꢀꢀ
ꢀꢀꢀ
ꢀꢀꢀ
65
ꢀꢀꢀ
98
ꢀꢀꢀ
ꢀꢀꢀ
ꢀꢀꢀ
ꢀꢀꢀ
ꢀꢀꢀ
ꢀꢀꢀ
ꢀꢀꢀ
ꢀꢀꢀ
ꢀꢀꢀ
ꢀꢀꢀ
ꢀꢀꢀ
ꢀꢀꢀ
ꢀꢀꢀ
S
ID =50A VDS = 10V
QG
ID =50A
VDS = 20V
VGS=10V
QGS
QGD
QSYNC
TDON
TR
Gate to Source Charge
Gate to Drain Charge
16
nC
23
Total Gate Charge Sync. (QG ꢀ QGD )
Mosfet Turn On Delay Time
Mosfet Rise Time
42
ID =50A,VDS = 0V,VGS = 10V
11
ID =30A
37
VDD = 20V
VGS=10V
RG=2.7ꢂ
ns
TDOFF
TF
Mosfet Turn Off Delay Time
Mosfet Fall Time
33
26
CISS
COSS
CRSS
TRR
Input Capacitance
3174
479
332
16
F= 1.0MHz
VDS = 25V
VGS=0V
pF
Output Capacitance
Reverse Transfer Capacitance
Reverse Recovery TIme
Reverse Recovery Charge
Reverse Recovery Current
ns
nC
A
IF =50A
VR =34V
dI/dt= 100A/us
QRR
IRRM
5
0.5
Recommended Operating Conditions Driver Function
For proper operation the device should be used within the recommended conditions. All voltages are absolute
referenced to COM. The VS offset is tested with all supplies biased at 15V differential.
Symbol
VB
Definition
Min
VS+10
Note 1
10
Typ
VS+15
ꢀꢀꢀ
Max
VS+20
40
Units
V
High side floating supply voltage
High side floating supply offset voltage
Low side and logic fixed supply voltage
Logic input voltage LIN, HIN
VS
V
VCC
15
20
V
VIN
COM
1
ꢀꢀꢀ
VCC
ꢀꢀꢀ
V
HIN
High side PWM pulse width
ꢀꢀꢀ
ꢁs
ꢁs
Deadtime
Suggested dead time between HIN and LIN
0.3
0.5
ꢀꢀꢀ
3
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March 19, 2014
IRSM005-800MH
Static Electrical Characteristics Driver Function
VBIAS (VCC, VBS)=15V, TJ=25ºC, unless otherwise specified. The VIN, and IIN parameters are
referenced to COM
Test
Conditions
Symbol
Definition
Min
Typ
Max
Units
VIH
VIL
Positive going input threshold for LIN, HIN
Negative going input threshold for LIN, HIN
High Level Output Voltage
2.5
ꢀꢀꢀ
ꢀꢀꢀ
ꢀꢀꢀ
ꢀꢀꢀ
0.8
0.2
V
20V
CC=10 to
VOH
ꢀꢀꢀ
0.05
IO=2mA
VOL
Low Level Output Voltage
ꢀꢀꢀ
0.02
8.9
0.1
9.8
9.0
V
VCCUV+
VBSUV+
VCC/VBS supply undervoltage, Positive going
threshold
8.0
7.4
VCCUVꢀ
VBSUVꢀ
VCC/VBS supply undervoltage, Negative going
threshold
8.2
VCCUVH
VBSUH
VCC/VBS supply undervoltage lockꢀout hysteresis
Offset Supply Leakage Current
ꢀꢀꢀ
ꢀꢀꢀ
0.8
ꢀꢀꢀ
ꢀꢀꢀ
50
75
500
10
1
ILK
VB=VS=200V
VIN =0V or 5V
IQBS
IQCC
IIN+
IINꢀ
Quiescent VBS supply current
ꢀꢀꢀ
45
ꢁA
Quiescent VCC supply current
ꢀꢀꢀ
250
4
Input bias current VIN=5V for LIN, HIN
Input bias current VIN=0V for LIN, HIN
IC high output short circuit current
IC low output short circuit current
ꢀꢀꢀ
VIN = 5V
VIN =0V
ꢀꢀꢀ
0.5
290
600
VO= 0V,
IO+
200
420
ꢀꢀꢀ
mA
VIN = 5V,
PW <10us
IOꢀ
ꢀꢀꢀ
Dynamic Electrical Characteristics Driver Function
VBIAS (VCC, VBS)=15V, TJ=25ºC unless otherwise specified, CL = 1000 pF, Driver only timing.
Symbol
Description
Min
Typ
Max
Units Conditions
TR
IC Turn on Rise Time
ꢀꢀꢀ
50
150
TF
IC Turn off Fall Time
ꢀꢀꢀ
ꢀꢀꢀ
35
90
ns
IC Input to Output propagation turnꢀ
on delay time
TON
160
220
IC Input to Output propagation turnꢀ
off delay time
TOFF
MT
ꢀꢀꢀ
ꢀꢀꢀ
150
ꢀꢀꢀ
220
50
IC Delay matching, HS and LS turnꢀ
on/off
4
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March 19, 2014
IRSM005-800MH
Thermal and Mechanical Characteristics
Symbol
Description
Min
Typ
Max
Units Conditions
Thermal resistance, junction to
mounting pad, each MOSFET
Standard reflowꢀsolder
process
Rth(JꢀB)
ꢀꢀꢀ
3.8
ꢀꢀꢀ
°C/W
Thermal resistance, junction to
ambient, each MOSFET
Mounted on 50mm2 of
°C/W
Rth(JꢀA)
ꢀꢀꢀ
40
ꢀꢀꢀ
fourꢀlayer FR4 with 28 vias
Input-Output Logic Level Table
HIN
LIN
HI
U,V,W
HI
LO
HI
LO
Shoot-through
LO
LO
HI
**
V+
0
* V+ if motor current is flowing into VS, 0 if current is flowing out of VS into the motor winding
5
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March 19, 2014
IRSM005-800MH
8.0
7.0
6.0
5.0
4.0
3.0
2.0
1.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
I
= 50A
I
= 50A
D
D
V
= 10V
GS
T
= 125°C
J
T
= 25°C
J
4
6
8
10 12 14 16 18 20
ꢀ60 ꢀ40 ꢀ20
0
20 40 60 80 100 120 140 160
T
J
, Junction Temperature (°C)
V
Gate ꢀto ꢀSource Voltage (V)
GS,
Fig.2 Normalized On Resistance vs Temperature
Fig. 1 Typical On Resistance vs Gate Voltage
1000
1000
VGS
TOP
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
T
= 150°C
100
10
1
100
10
J
BOTTOM
4.5V
T
= 25°C
J
60ꢁs PULSE WIDTH
≤
V
= 10V
DS
Tj = 150°C
≤60ꢁs PULSE WIDTH
1.0
0.1
1
10
100
3
4
5
6
7
8
V
, DrainꢀtoꢀSource Voltage (V)
DS
V
, GateꢀtoꢀSource Voltage (V)
GS
Fig.4 Typical Output Characteristic @ 150C
Fig. 3 Typical Transfer Characteristic
100000
1000
V
= 0V,
= C
f = 1 MHZ
+ C , C
GS
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
C
C
C
SHORTED
iss
gs
gd
ds
TOP
= C
rss
oss
gd
= C + C
ds
gd
10000
1000
100
100
10
1
BOTTOM
C
iss
C
oss
rss
C
4.5V
60ꢁs PULSE WIDTH
≤
Tj = 25°C
1
10
, DrainꢀtoꢀSource Voltage (V)
100
0.1
1
10
100
V
DS
V
, DrainꢀtoꢀSource Voltage (V)
DS
Fig. 6 Typical Capacitance vs Drain to Source
Voltage
Fig. 5 Typical Output Characteristic @ 25C
6
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IRSM005-800MH
1000
100
10
14.0
12.0
10.0
8.0
I
= 50A
D
V
V
= 32V
= 20V
DS
DS
T
= 150°C
J
6.0
T
= 25°C
J
4.0
V
GS
= 0V
2.0
1.0
0.0
0.4
V , SourceꢀtoꢀDrain Voltage (V)
SD
0.8
1.2
1.6
2.0
0.0
0
10 20 30 40 50 60 70 80 90
, Total Gate Charge (nC)
Q
G
Fig.8 Typical Diode Forward Voltage Drop
Fig. 7 Typical Gate Charge vs Gate Voltage
4.5
50
Id = 1.0mA
4.0
3.5
3.0
48
46
44
42
40
I
I
I
= 100ꢁA
= 1.0mA
= 1.0A
D
D
D
2.5
2.0
1.5
ꢀ75 ꢀ50 ꢀ25
0
25 50 75 100 125 150
ꢀ60 ꢀ40 ꢀ20
0
20 40 60 80 100 120 140 160
, Temperature ( °C )
T
, Temperature ( °C )
J
T
J
Fig.10 Threshold Voltage vs Temperature
Fig. 9 Typical Breakdown Voltage vs Temperature
100
I
= 30A
= 34V
7
F
I
= 30A
= 34V
V
F
R
80
60
40
20
0
6
5
4
3
2
1
0
V
T
= 25°C
R
J
T
= 25°C
T
= 125°C
J
J
T
= 125°C
J
0
200
400
600
800
1000
0
200
400
600
800
1000
di /dt (A/ꢁs)
F
di /dt (A/ꢁs)
F
Fig. 12 Typical Recovery Charge vs Temperature
Fig. 11 Typical Recovery Current vs dI/dt
7
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March 19, 2014
IRSM005-800MH
Module Pin-Out Description
Pin
Name
COM
VCC
HIN
LIN
LO
Description
3, 6, 8
Negative of Gate Drive Supply Voltage
15V Gate Drive Supply
2
4
Logic Input for High Side (Active High)
Logic Input for Low Side (Active High)
Low Side FET Gate
5
7
9
G2
Low Side Gate Drive Output
Phase Output
10, 16, 17
11 – 15
18 – 23
24
VS
Vꢀ
Low Side Source Connection
DC Bus
V+
G1
High Side Gate Drive Output
High Side FET Gate
25
HO
VS
26 – 27
1
Negative of Bootstrap Supply
Positive of Bootstrap Supply
VB
16 VS
17 VS
18-V+
19 V+
V- 15
V- 14
V- 13
V- 12
20 V+
21 V+
22 V+
23 V+
V- 11
24 G1
25 HO
VS 10
G2 9
28
COM 8
LO 7
26 VS
27 VS
COM
LIN
HIN COM VCC
VB
6
5
4
3
2
1
BOTTOM OF PACKAGE VIEW
Exposed pad (Pin 28) has to be connected to COM for better electrical performance
8
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March 19, 2014
IRSM005-800MH
Figure 13: Typical Application Connection
1. Bus capacitors should be mounted as close to the module bus terminals as possible to reduce ringing
and EMI problems. Additional high frequency ceramic capacitor mounted close to the module pins will
further improve performance.
2. Value of the bootꢀstrap capacitors depends upon the switching frequency. Their selection should be
made based on IR Design tip DT04ꢀ4 or application note ANꢀ1044.
20
18
16
14
12
10
8
Series1
6
4
2
0
0.1
1
10
100
Figure 14: Typical Output Current (RMS of fundamental) vs. Modulation Frequency
Sinusoidal Modulation, V+=32V, TJ=125°C, TA=60°C, MI=1, PF=0.8, mounted on 50 mm2 of FR4
9
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March 19, 2014
IRSM005-800MH
Qualification
Industrial††
(per JEDEC JESD 47E)
Qualification Level
MSL3†††
(per IPC/JEDEC JꢀSTDꢀ020C)
Moisture Sensitivity Level
Class B (±200V)
(per JEDEC standard JESD22ꢀA115A)
Machine Model
ESD
Class 1C (±1000V)
(per EIA/JEDEC standard EIA/JESꢀ001Aꢀ2011)
Human Body Model
RoHS Compliant
Yes
†
Qualification standards can be found at International Rectifier’s web site HUhttp://www.irf.com/
U
†† Higher qualification ratings may be available should the user have such requirements. Please contact
your International Rectifier sales representative for further information.
††† Higher MSL ratings may be available for the specific package types listed here. Please contact your
International Rectifier sales representative for further information.
10
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March 19, 2014
IRSM005-800MH
Package Outline (Top & Side view)
11
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March 19, 2014
IRSM005-800MH
Package Outline (Bottom View, 1 of 2)
1. For mounting instruction see ANꢀ1178.
2. For recommended PCB via design see ANꢀ1091.
3. For recommended design, solder profile, integration and rework guidelines see ANꢀ1028.
4. For board inspection guidelines see ANꢀ1133.
12
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March 19, 2014
IRSM005-800MH
Tape and Reel Details
13
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March 19, 2014
IRSM005-800MH
Data and Specifications are subject to change without notice
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252ꢀ7105
TAC Fax: (310) 252ꢀ7903
Visit us at www.irf.com for sales contact information
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