IRU1010CYTR [INFINEON]
Adjustable Positive LDO Regulator, 1.25V Min, 5.5V Max, 1.3V Dropout, BIPolar, PDSO4, PLASTIC, SOT-223, 3 PIN;
| 型号： | IRU1010CYTR |
| 厂家： | 
Infineon |
| 描述： | Adjustable Positive LDO Regulator, 1.25V Min, 5.5V Max, 1.3V Dropout, BIPolar, PDSO4, PLASTIC, SOT-223, 3 PIN 光电二极管 输出元件 调节器 |
| 文件： | 总10页 (文件大小：134K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Data Sheet No. PD94119revA
IRU1010(PbF)
1A LOW DROPOUT POSITIVE
ADJUSTABLE REGULATOR
FEATURES
DESCRIPTION
Guaranteed < 1.3V Dropout at Full Load Current
Fast Transient Response
The IRU1010 is a low dropout, three-terminal adjustable
regulator with minimum of 1A output current capability.
This product is specifically designed to provide well regu-
lated supply for low voltage IC applications such as high
speed bus termination and low current 3.3V logic sup-
ply. The IRU1010 is also well suited for other applica-
tions such as VGA and sound cards. The IRU1010 is
guaranteed to have <1.3V dropout at full load current
making it ideal to provide well regulated outputs of 2.5V
to 3.6V with 4.75V to 7V input supply.
1% Voltage Reference Initial Accuracy
Built-In Thermal Shutdown
Available in SOT-223, D-Pak, Ultra Thin-PakTM
and 8-Pin SOIC Surface-Mount Packages
APPLICATIONS
VGA & Sound Card Applications
Low Voltage High Speed Termination Applications
Standard 3.3V Chip Set and Logic Applications
TYPICAL APPLICATION
D1
5V
C1
10uF
V
IN
3
2
1
IRU1010
V
OUT
2.85V / 1A
R1
121
C2
Adj
22uF
R2
154
Figure 1 - Typical application of IRU1010 in a 5V to 2.85V SCSI termination regulator.
PACKAGE ORDER INFORMATION
Basic Part (Non-Lead Free)
TJ (°C)
2-PIN PLASTIC
TO-252 (D-Pak)
IRU1010CD
2-PIN PLASTIC
Ultra Thin-PakTM (P)
IRU1010CP
8-PIN PLASTIC
SOIC (S)
3-PIN PLASTIC
SOT-223 (Y)
IRU1010CY
0 To 150
IRU1010CS
Leadfree Part
TJ (°C)
2-PIN PLASTIC
TO-252 (D-Pak)
Not available
2-PIN PLASTIC
Ultra Thin-PakTM (P)
Not available
8-PIN PLASTIC
SOIC (S)
3-PIN PLASTIC
SOT-223 (Y)
Not available
0 To 150
IRU1010CSPbF
Rev. 1.7
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1
IRU1010(PbF)
ABSOLUTE MAXIMUM RATINGS
Input Voltage (VIN) .................................................... 7V
Power Dissipation ..................................................... Internally Limited
Storage Temperature Range ...................................... -65°C To 150°C
Operating Junction Temperature Range ..................... 0°C To 150°C
PACKAGE INFORMATION
2-PIN PLASTIC TO-252 (D-Pak) 2-PIN ULTRA THIN-PAKTM (P)
8-PIN PLASTIC SOIC (S)
3-PIN PLASTIC SOT-223 (Y)
FRONT VIEW
FRONT VIEW
TOP VIEW
TOP VIEW
3
3
3
V
IN
VIN
1
2
3
4
8
7
6
5
V
IN
V
OUT
OUT
OUT
OUT
V
IN
Tab is
Tab is
V
NC
NC
Adj
V
Tab is
2
1
VOUT
OUT
V
OUT
V
V
V
OUT
Adj
1
1
Adj
Adj
θJA=908C/W for 0.4" Sq pad
θJA=708C/W for 0.5" Sq pad
θJA=708C/W for 0.5" Sq pad
θJA=558C/W for 1" Sq pad
ELECTRICAL SPECIFICATIONS
Unless otherwise specified, these specifications apply over CIN=1µF, COUT=10µF, and TJ=0 to 1508C.
Typical values refer to TJ=258C.
PARAMETER
SYM
TEST CONDITION
Io=10mA, TJ=258C, (VIN-Vo)=1.5V
Io=10mA, (VIN-Vo)=1.5V
MIN
TYP MAX UNITS
Reference Voltage
VREF
1.238 1.250 1.262
V
1.225 1.250 1.275
Line Regulation
Io=10mA, 1.3V<(VIN-Vo)<7V
VIN=3.3V, VADJ=0, 10mA<Io<1A
0.2
0.4
%
%
Load Regulation (Note 1)
Dropout Voltage (Note 2)
Current Limit
∆Vo Note 2 , Io=1A
1.1
1.3
V
VIN=3.3V, ∆Vo=100mV
VIN=3.3V, VADJ=0V
1.1
60
A
mA
%/W
Minimum Load Current (Note 3)
Thermal Regulation
Ripple Rejection
5
0.01
10
0.02
30ms Pulse, VIN-Vo=3V, Io=1A
f=120Hz, Co=25µF Tantalum,
Io=0.5A, VIN-Vo=3V
70
dB
Adjust Pin Current
IADJ
Io=10mA, VIN-Vo=1.5V, TJ=258C,
Io=10mA, VIN-Vo=1.5V
55
0.2
120
5
µA
µA
%
Adjust Pin Current Change
Temperature Stability
Long Term Stability
Io=10mA, VIN-Vo=1.5V, TJ=258C
VIN=3.3V, VADJ=0V, Io=10mA
TJ=1258C, 1000Hrs
0.5
0.3
0.003
1
%
RMS Output Noise
TJ=258C, 10Hz<f<10KHz
%Vo
Note 1: Low duty cycle pulse testing with Kelvin con- Note 3: Minimum load current is defined as the mini-
nections is required in order to maintain accurate data. mum current required at the output in order for the out-
put voltage to maintain regulation. Typically, the resistor
Note 2: Dropout voltage is defined as the minimum dif- dividers are selected such that it automatically main-
ferential voltage between VIN and VOUT required to main- tains this current.
tain regulation at VOUT. It is measured when the output
voltage drops 1% below its nominal value.
Rev. 1.7
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2
IRU1010(PbF)
PIN DESCRIPTIONS
PIN # PIN SYMBOL PIN DESCRIPTION
1
A resistor divider from this pin to the VOUT pin and ground sets the output voltage.
Adj
2
The output of the regulator. A minimum of 10µF capacitor must be connected from this pin
VOUT
to ground to insure stability.
3
The input pin of the regulator. Typically a large storage capacitor is connected from this
pin to ground to insure that the input voltage does not sag below the minimum dropout
voltage during the load transient response. This pin must always be 1.3V higher than VOUT
in order for the device to regulate properly.
VIN
BLOCK DIAGRAM
VIN
3
2 VOUT
+
+
1.25V
CURRENT
LIMIT
THERMAL
SHUTDOWN
1 Adj
Figure 2 - Simplified block diagram of the IRU1010.
APPLICATION INFORMATION
Introduction
The IRU1010 adjustable Low Dropout (LDO) regulator is memory termination need to switch the load current from
a three-terminal device which can easily be programmed zero to full load in tens of nanoseconds at their pins,
with the addition of two external resistors to any volt- which translates to an approximately 300 to 500ns cur-
ages within the range of 1.25 to 5.5V. This regulator, rent step at the regulator. In addition, the output voltage
unlike the first generation of the three-terminal regula- tolerances are sometimes tight and they include the tran-
tors such as LM117 that required 3V differential between sient response as part of the specification.
the input and the regulated output, only needs 1.3V dif-
ferential to maintain output regulation. This is a key re- The IRU1010 is specifically designed to meet the fast
quirement for today’s low voltage IC applications that current transient needs as well as providing an accurate
typically need 3.3V supply and are often generated from initial voltage, reducing the overall system cost with the
the 5V supply. Other applications such as high speed need for fewer output capacitors.
Rev. 1.7
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3
IRU1010(PbF)
Output Voltage Setting
to the load side, the effective resistance between the
The IRU1010 can be programmed to any voltages in the regulator and the load is gained up by the factor of (1+
range of 1.25V to 5.5V with the addition of R1 and R2 R2/R1), or the effective resistance will be RP(eff)=RP3(1+
external resistors according to the following formula:
R2
R2/R1). It is important to note that for high current appli-
cations, this can represent a significant percentage of
the overall load regulation and one must keep the path
from the regulator to the load as short as possible to
minimize this effect.
VOUT = VREF3 1+
+ IADJ3R2
( )
R1
Where:
PARASITIC LINE
RESISTANCE
VREF = 1.25V Typically
IADJ = 50µA Typically
RP
VOUT
VIN
VIN
R1 and R2 as shown in Figure 3:
IRU1010
V
OUT
VIN
VIN
Vout
Adj
RL
R1
R2
IRU1010
Adj
VREF
R1
R2
I
ADJ = 50uA
Figure 4 - Schematic showing connection
for best load regulation.
Figure 3 - Typical application of the IRU1010
for programming the output voltage.
Stability
The IRU1010 requires the use of an output capacitor as
The IRU1010 keeps a constant 1.25V between the out- part of the frequency compensation in order to make the
put pin and the adjust pin. By placing a resistor R1 across regulator stable. Typical designs for microprocessor ap-
these two pins a constant current flows through R1, add- plications use standard electrolytic capacitors with a
ing to the IADJ current and into the R2 resistor producing typical ESR in the range of 50 to 100mς and an output
a voltage equal to the (1.25/R1)3R2+IADJ3R2 which will capacitance of 500 to 1000µF. Fortunately as the ca-
be added to the 1.25V to set the output voltage. This is pacitance increases, the ESR decreases resulting in a
summarized in the above equation. Since the minimum fixed RC time constant. The IRU1010 takes advantage
load current requirement of the IRU1010 is 10mA, R1 is of this phenomena in making the overall regulator loop
typically selected to be 121ς resistor so that it auto- stable. For most applications a minimum of 100µF alu-
matically satisfies the minimum current requirement. minum electrolytic capacitor such as Sanyo MVGX se-
Notice that since IADJ is typically in the range of 50µA it ries, Panasonic FA series as well as the Nichicon PL
only adds a small error to the output voltage and should series insures both stability and good transient response.
only be considered when a very precise output voltage
setting is required. For example, in a typical 3.3V appli- Thermal Design
cation where R1=121ς and R2=200ς the error due to The IRU1010 incorporates an internal thermal shutdown
IADJ is only 0.3% of the nominal set point.
that protects the device when the junction temperature
exceeds the maximum allowable junction temperature.
Although this device can operate with junction tempera-
Load Regulation
Since the IRU1010 is only a three-terminal device, it is tures in the range of 1508C, it is recommended that the
not possible to provide true remote sensing of the output selected heat sink be chosen such that during maxi-
voltage at the load. Figure 4 shows that the best load mum continuous load operation the junction tempera-
regulation is achieved when the bottom side of R2 is ture is kept below this number. The next example for a
connected to the load and the top side of R1 resistor is SCSI terminator application shows the steps in sellecting
connected directly to the case or the VOUT pin of the the proper regulator in a surface-mount package. (See
regulator and not to the load. In fact, if R1 is connected IRU1015 for non-surface-mount packages)
Rev. 1.7
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4
IRU1010(PbF)
Assuming the following specifications:
To set the output DC voltage, we need to select R1 and
R2:
VIN = 5V
VF = 0.5V
4) Assuming R1 = 121ς, 1%:
VOUT = 2.85V
IOUT(MAX) = 0.8A
TA = 358C
R2 = VOUT -1
3R1 =
-1 3121 = 154.8ς
2.85
(VREF ) (1.25 )
Where: VF is the forward voltage drop of the D1 diode as
shown in Figure 5.
Select R2 = 154ς, 1%.
D1
The steps for selecting the right package with proper
board area for heatsinking to keep the junction tempera-
ture below 1358C is given as:
VOUT
VIN
5V
2.85V
C1
C2
IRU1010
10uF
22uF
R1
Adj
121
1%
1) Calculate the maximum power dissipation using:
PD = IOUT 3 (VIN - VF - VOUT)
R2
154
1%
PD = 0.8 3 (5 - 0.5 - 2.85) = 1.32W
2) Calculate the maximum θJA allowed for our example:
Figure 5 - Final Schematic for half of the
GTL+ termination regulator.
TJ - TA
PD
135 - 35
1.32
υJA(MAX) =
=
= 75.68C/W
3) Select a package from the datasheet with lower θJA
Layout Consideration
than the one calculated in the previous step.
The output capacitors must be located as close to the
VOUT terminal of the device as possible. It is recom-
mended to use a section of a layer of the PC board as a
plane to connect the VOUT pin to the output capacitors to
prevent any high frequency oscillation that may result
due to excessive trace inductance.
Selecting TO-252 (D-Pak) with at least 0.5" square
of 0.062" FR4 board using 1 oz. copper has 70°C/W
which is lower than the calculated number.
Rev. 1.7
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5
IRU1010(PbF)
(D) TO-252 Package
2-Pin
K
A
B
C
L
M
N
78
458
D
E
J
O
P
Q
R
G
F
S
H
R1
SYMBOL
MIN
MAX
A
B
C
D
E
6.477 6.731
5.004 5.207
0.686 0.838
7.417 8.179
C
L
9.703 10.084
0.635 0.889
2.286 BSC
4.521 4.623
&1.52 &1.62
2.184 2.388
0.762 0.864
1.016 1.118
5.969 6.223
1.016 1.118
F
G
H
J
K
L
M
N
O
P
0
0.102
Q
R
R1
S
0.534 0.686
R0.31 TYP
R0.51 TYP
0.428 0.588
NOTE: ALL MEASUREMENTS
ARE IN MILLIMETERS.
Rev. 1.7
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6
IRU1010(PbF)
(P) Ultra Thin-PakTM
2-Pin
A
A1
E
U
K
B
V
H
M
L
P
G
D
G1
N
R
C
C
L
SYMBOL
MIN
5.91
5.54
6.02
1.70
0.63
0.17
2.16
4.45
9.42
0.76
0.02
0.89
0.25
0.94
28
MAX
6.17
5.79
6.27
2.03
0.79
0.33
2.41
4.70
9.68
1.27
0.13
1.14
0.25
1.19
68
A
A1
B
C
D
E
G
G1
H
K
L
M
N
P
R
U
V
2.92
5.08 NOM
3.30
NOTE: ALL MEASUREMENTS
ARE IN MILLIMETERS.
Rev. 1.7
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7
IRU1010(PbF)
(S) SOIC Package
8-Pin Surface Mount, Narrow Body
H
A
B
C
E
DETAIL-A
L
D
PIN NO. 1
DETAIL-A
I
0.38
6
0.015 x 45
8
K
T
F
J
G
8-PIN
MIN
SYMBOL
MAX
A
B
C
D
E
F
G
H
I
4.80
4.98
1.27 BSC
0.53 REF
0.36
0.46
3.99
1.72
0.25
3.81
1.52
0.10
78 BSC
0.19
5.80
08
0.41
1.37
0.25
6.20
88
1.27
1.57
J
K
L
T
NOTE: ALL MEASUREMENTS
ARE IN MILLIMETERS.
Rev. 1.7
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8
IRU1010(PbF)
(Y) SOT-223 Package
3-Pin
SYMBOL
MIN
MAX
D
B
A
A1
B
B1
C
1.498 1.702
0.02
2.895
0.637
0.239 0.381
6.299 6.706
0.11
3.15
0.85
D
E
e
e1
H
Q
3.30
2.209 2.953
4.496 4.699
6.70
08
3.708
H
E
7.30
108
Q1
Q2
S
78
78
0.838
1.092
168
168
1.05
1.30
T
e
S
NOTE: ALL MEASUREMENTS
ARE IN MILLIMETERS.
e1
B1
Q1
T
A
Q
C
A1
Q2
Rev. 1.7
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9
IRU1010(PbF)
PACKAGE SHIPMENT METHOD
PKG
PACKAGE
PIN
PARTS
PARTS
PER REEL
2500
T & R
Orientation
Fig A
DESIG
DESCRIPTION
COUNT
PER TUBE
D
P
S
Y
TO-252, (D-Pak)
2
2
8
3
75
75
95
80
Ultra Thin-PakTM
SOIC, Narrow Body
SOT-223
2500
2500
2500
Fig B
Fig C
Fig D
1
1
1
1
1
1
Feed Direction
Figure A
Feed Direction
Figure B
1
1
1
1
1
1
Feed Direction
Figure D
Feed Direction
Figure C
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information
Data and specifications subject to change without notice. 5/2/2005
Rev. 1.7
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10
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