IRU3037ACFTRPBF [INFINEON]
Switching Controller, Voltage-mode, 0.5A, 440kHz Switching Freq-Max, BIPolar, PDSO8, PLASTIC, TSSOP-8;
| 型号： | IRU3037ACFTRPBF |
| 厂家： | 
Infineon |
| 描述： | Switching Controller, Voltage-mode, 0.5A, 440kHz Switching Freq-Max, BIPolar, PDSO8, PLASTIC, TSSOP-8 控制器 |
| 文件： | 总21页 (文件大小：221K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Data Sheet No. PD94173
IRU3037 / IRU3037A
8-PIN SYNCHRONOUS PWM CONTROLLER
FEATURES
DESCRIPTION
Synchronous Controller in 8-Pin Package
Operating with single 5V or 12V supply voltage
Internal 200KHz Oscillator
The IRU3037 controller IC is designed to provide a low
cost synchronous Buck regulator for on-board DC to DC
converter applications. With the migration of today’s ASIC
products requiring low supply voltages such as 1.8V and
lower, together with currents in excess of 3A, traditional
linear regulators are simply too lossy to be used when
input supply is 5V or even in some cases with 3.3V
input supply. The IRU3037 together with dual N-channel
MOSFETs such as IRF7313, provide a low cost solution
for such applications. This device features an internal
200KHz oscillator (400KHz for "A" version), under-volt-
age lockout for both Vcc and Vc supplies, an external
programmable soft-start function as well as output un-
der-voltage detection that latches off the device when an
output short is detected.
(400KHz for IRU3037A)
Soft-Start Function
Fixed Frequency Voltage Mode
500mA Peak Output Drive Capability
Protects the output when control FET is shorted
APPLICATIONS
DDR memory source sink Vtt application
Low cost on-board DC to DC such as 5V to 3.3V,
2.5V or 1.8V
Graphic Card
Hard Disk Drive
TYPICAL APPLICATION
5V
12V
L1
1uH
C3
1uF
C4
1uF
C2
C1
47uF
10TPB100M,
100uF, 55m
Ω
Vcc
Vc
Q1
1/2 of IRF7313
HDrv
LDrv
Fb
L2
D05022P-562, 5.6uH, 5.3A
SS/SD
1.5V/5A
U1
C8
0.1uF
IRU3037
Q2
C7
1/2 of IRF7313
2x 6TPC150M,
150uF, 40m
Ω
R3
Comp
C9
249, 1%
2200pF
Gnd
R5
1.24K, 1%
R4
24k
Figure 1 - Typical application of IRU3037 or IRU3037A.
PACKAGE ORDER INFORMATION
TA (°C)
0 To 70
0 To 70
0 To 70
0 To 70
DEVICE
PACKAGE
FREQUENCY
200KHz
200KHz
400KHz
400KHz
IRU3037CF
IRU3037CS
IRU3037ACF
IRU3037ACS
8-Pin Plastic TSSOP (F)
8-Pin Plastic SOIC NB (S)
8-Pin Plastic TSSOP (F)
8-Pin Plastic SOIC NB (S)
Rev. 2.8
03/10/03
www.irf.com
1
IRU3037 / IRU3037A
ABSOLUTE MAXIMUM RATINGS
Vcc Supply Voltage .................................................. 25V
Vc Supply Voltage ...................................................... 30V (not rated for inductive load)
Storage Temperature Range ...................................... -65°C To 150°C
Operating Junction Temperature Range .....................
0°C To 125°C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device.
PACKAGE INFORMATION
8-PIN PLASTIC TSSOP (F)
8-PIN PLASTIC SOIC (S)
1
2
3
4
8
7
6
5
Fb
Vcc
SS/SD
Comp
Vc
Fb
1
2
3
4
8
7
6
5
SS/SD
Comp
Vc
Vcc
LDrv
Gnd
LDrv
Gnd
HDrv
HDrv
qJA=124°C/W
qJA=160°C/W
ELECTRICAL SPECIFICATIONS
Unless otherwise specified, these specifications apply over Vcc=5V, Vc=12V and TA=0 to 70°C. Typical values refer
to TA=25°C. Low duty cycle pulse testing is used which keeps junction and case temperatures equal to the ambient
temperature.
PARAMETER
Reference Voltage
Fb Voltage
SYM
TEST CONDITION
MIN
TYP
MAX
UNITS
VFB
IRU3037
IRU3037A
5<Vcc<12
1.225
0.784
1.250
0.800
0.2
1.275
0.816
0.35
V
%
Fb Voltage Line Regulation
UVLO
LREG
UVLO Threshold - Vcc
UVLO Hysteresis - Vcc
UVLO Threshold - Vc
UVLO Hysteresis - Vc
UVLO Threshold - Fb
UVLO Vcc Supply Ramping Up
UVLO Vc Supply Ramping Up
4.0
3.1
4.2
0.25
3.3
0.2
0.6
0.4
0.1
4.4
3.5
V
V
V
V
V
UVLO Fb Fb Ramping Down (IRU3037)
(IRU3037A)
0.4
0.3
0.8
0.5
UVLO Hysteresis - Fb
V
Supply Current
Vcc Dynamic Supply Current Dyn Icc Freq=200KHz, CL=1500pF
2
2
1
5
7
3.3
1
8
10
6
mA
mA
mA
mA
Vc Dynamic Supply Current
Vcc Static Supply Current
Vc Static Supply Current
Soft-Start Section
Dyn Ic
Freq=200KHz, CL=1500pF
SS=0V
SS=0V
ICCQ
ICQ
0.5
4.5
Charge Current
SSIB
SS=0V
-10
-20
-30
µA
Rev. 2.8
05/10/04
www.irf.com
2
IRU3037 / IRU3037A
PARAMETER
SYM
TEST CONDITION
MIN
TYP
MAX
UNITS
Error Amp
Fb Voltage Input Bias Current
Fb Voltage Input Bias Current
Transconductance
Oscillator
IFB1
IFB2
gm
SS=3V, Fb=1V
SS=0V, Fb=1V
µA
µA
µmho
-0.1
-64
600
830
410
Frequency
Freq IRU3037
IRU3037A
VRAMP
180
345
1.225
200
400
1.25
220
440
1.275
KHz
V
Ramp-Amplitude Voltage
Output Drivers
Rise Time
Tr
Tf
CL=1500pF
CL=1500pF
50
50
150
90
0
100
100
250
95
ns
ns
ns
%
%
Fall Time
Dead Band Time
Max Duty Cycle
Min Duty Cycle
TDB
TON
50
85
0
Fb=1V, Freq=200KHz
TOFF Fb=1.5V
PIN DESCRIPTIONS
PIN#
PIN SYMBOL
PIN DESCRIPTION
1
Fb
This pin is connected directly to the output of the switching regulator via resistor divider to
provide feedback to the Error amplifier.
2
Vcc
This pin provides biasing for the internal blocks of the IC as well as power for the low side
driver. A minimum of 1µF, high frequency capacitor must be connected from this pin to
ground to provide peak drive current capability.
3
4
LDrv
Gnd
Output driver for the synchronous power MOSFET.
This pin serves as the ground pin and must be connected directly to the ground plane. A
high frequency capacitor (0.1 to 1µF) must be connected from V5 and V12 pins to this pin
for noise free operation.
5
6
HDrv
Vc
Output driver for the high side power MOSFET. Connect a diode, such as BAT54 or 1N4148,
from this pin to ground for the application when the inductor current goes negative (Source/
Sink), soft-start at no load and for the fast load transient from full load to no load.
This pin is connected to a voltage that must be at least 4V higher than the bus voltage of
the switcher (assuming 5V threshold MOSFET) and powers the high side output driver. A
minimum of 1µF, high frequency capacitor must be connected from this pin to ground to
provide peak drive current capability.
7
8
Comp
Compensation pin of the error amplifier. An external resistor and capacitor network is
typically connected from this pin to ground to provide loop compensation.
SS / SD
This pin provides soft-start for the switching regulator. An internal current source charges
an external capacitor that is connected from this pin to ground which ramps up the output
of the switching regulator, preventing it from overshooting as well as limiting the input
current. The converter can be shutdown by pulling this pin below 0.5V.
Rev. 2.8
03/10/03
www.irf.com
3
IRU3037 / IRU3037A
BLOCK DIAGRAM
Vcc
3V
Bias
Generator
1.25V
0.2V
0.2V
POR
4.0V
Vc
3V
20uA
3.5V
6 Vc
SS/SD
POR
64uA Max
8
Oscillator
5 HDrv
Ct
S
R
1.25V
Q
Error Comp
Error Amp
25K
25K
2 Vcc
Reset Dom
Fb
1
3 LDrv
FbLo Comp
0.5V
4 Gnd
Comp 7
POR
Figure 2 - Simplified block diagram of the IRU3037.
THEORY OF OPERATION
Introduction
the Power On Reset (POR) signal. Soft-start function
The IRU3037 is a fixed frequency, voltage mode syn- operates by sourcing an internal current to charge an
chronous controller and consists of a precision refer- external capacitor to about 3V. Initially, the soft-start func-
ence voltage, an error amplifier, an internal oscillator, a tion clamps the E/A’s output of the PWM converter. As
PWM comparator, 0.5A peak gate driver, soft-start and the charging voltage of the external capacitor ramps up,
shutdown circuits (see Block Diagram).
the PWM signals increase from zero to the point the
feedback loop takes control.
The output voltage of the synchronous converter is set
and controlled by the output of the error amplifier; this is Short-Circuit Protection
the amplified error signal from the sensed output voltage The outputs are protected against the short-circuit. The
and the reference voltage.
IRU3037 protects the circuit for shorted output by sens-
ing the output voltage (through the external resistor di-
This voltage is compared to a fixed frequency linear vider). The IRU3037 shuts down the PWM signals, when
sawtooth ramp and generates fixed frequency pulses of the output voltage drops below 0.6V (0.4V for IRU3037A).
variable duty-cycle, which drives the two N-channel ex-
ternal MOSFETs.The timing of the IC is provided through The IRU3037 also protects the output from over-voltaging
an internal oscillator circuit which uses on-chip capaci- when the control FET is shorted. This is done by turning
tor to set the oscillation frequency to 200 KHz (400 KHz on the sync FET with the maximum duty cycle.
for “A” version).
Under-Voltage Lockout
Soft-Start
The under-voltage lockout circuit assures that the
The IRU3037 has a programmable soft-start to control MOSFET driver outputs remain in the off state whenever
the output voltage rise and limit the current surge at the the supply voltage drops below set parameters. Lockout
start-up. To ensure correct start-up, the soft-start se- occurs if Vc or Vcc fall below 3.3V and 4.2V respec-
quence initiates when the Vc and Vcc rise above their tively. Normal operation resumes once Vc and Vcc rise
threshold (3.3V and 4.2V respectively) and generates above the set values.
Rev. 2.8
05/10/04
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4
IRU3037 / IRU3037A
APPLICATION INFORMATION
Design Example:
Soft-Start Programming
The following example is a typical application for IRU3037, The soft-start timing can be programmed by selecting
the schematic is Figure 18 on page 14.
the soft start capacitance value. The start up time of the
converter can be calculated by using:
VIN = 5V
VOUT = 3.3V
IOUT = 4A
∆VOUT = 100mV
fS = 200KHz
t
START = 75×Css (ms)
---(2)
Where:
CSS is the soft-start capacitor (µF)
Output Voltage Programming
For a start-up time of 7.5ms, the soft-start capacitor will
Output voltage is programmed by reference voltage and be 0.1µF. Choose a ceramic capacitor at 0.1µF.
external voltage divider. The Fb pin is the inverting input
of the error amplifier, which is internally referenced to Shutdown
1.25V (0.8V for IRU3037A). The divider is ratioed to pro- The converter can be shutdown by pulling the soft-start
vide 1.25V at the Fb pin when the output is at its desired pin below 0.5V. The control MOSFET turns off and the
value. The output voltage is defined by using the follow- synchronous MOSFET turns on during shutdown.
ing equation:
Boost Supply Vc
R6
R5
To drive the high-side switch it is necessary to supply a
gate voltage at least 4V greater than the bus voltage.
This is achieved by using a charge pump configuration
VOUT = VREF × 1 +
---(1)
( )
When an external resistor divider is connected to the as shown in Figure 18. The capacitor is charged up to
output as shown in Figure 3.
approximately twice the bus voltage. A capacitor in the
range of 0.1µF to 1µF is generally adequate for most
applications. In application, when a separate voltage
source is available the boost circuit can be avoided as
shown in Figure 1.
V
OUT
IRU3037
R
6
Fb
Input Capacitor Selection
R5
The input filter capacitor should be based on how much
ripple the supply can tolerate on the DC input line. The
larger capacitor, the less ripple expected but consider
should be taken for the higher surge current during the
power-up. The IRU3037 provides the soft-start function
which controls and limits the current surge. The value of
the input capacitor can be calculated by the following
formula:
Figure 3 - Typical application of the IRU3037 for
programming the output voltage.
Equation (1) can be rewritten as:
VOUT
R6 = R5 ×
- 1
(VREF )
IIN × ∆t
CIN =
---(3)
∆V
Choose R5 = 1KΩ
This will result toR6 = 1.65KΩ
Where:
CIN is the input capacitance (µF)
If the high value feedback resistors are used, the input
bias current of the Fb pin could cause a slight increase
in output voltage. The output voltage set point can be
more accurate by using precision resistor.
IIN is the input current (A)
∆t is the turn on time of the high-side switch (µs)
∆V is the allowable peak to peak voltage ripple (V)
Rev. 2.8
03/10/03
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5
IRU3037 / IRU3037A
Assuming the following:
∆i
∆t
1
fS
VOUT
VIN
VIN - VOUT = L×
; ∆t = D×
; D =
---(5)
∆V = 1%(VIN), Efficiency(η) = 90%
VOUT
1
fS
L = (VIN - VOUT)×
∆t = D ×
∆t = 3.3µs
VIN×∆i×fS
Where:
VO × IO
η × VIN
IIN =
IIN = 2.93A
VIN = Maximum Input Voltage
VOUT = Output Voltage
Di = Inductor Ripple Current
fS = Switching Frequency
Dt = Turn On Time
By using equation (3), CIN = 193.3µF
For higher efficiency, low ESR capacitor is recommended.
Choose two 100µF capacitors.
D = Duty Cycle
The Sanyo TPB series PosCap capacitor 100µF, 10V
with 55mΩ ESR is a good choice.
If ∆i = 20%(IO), then the output inductor will be:
L = 7µH
Output Capacitor Selection
The criteria to select the output capacitor is normally The Toko D124C series provides a range of inductors in
based on the value of the Effective Series Resistance different values, low profile suitable for large currents,
(ESR). In general, the output capacitor must have low 10µH, 4.2A is a good choice for this application. This
enough ESR to meet output ripple and load transient will result to a ripple approximately 14% of output cur-
requirements, yet have high enough ESR to satisfy sta- rent.
bility requirements. The ESR of the output capacitor is
calculated by the following relationship:
Power MOSFET Selection
The IRU3037 uses two N-Channel MOSFETs. The se-
lections criteria to meet power transfer requirements is
based on maximum drain-source voltage (VDSS), gate-
source drive voltage (VGS), maximum output current, On-
resistance RDS(ON) and thermal management.
∆VO
∆IO
ESR ≤
---(4)
Where:
∆VO = Output Voltage Ripple
∆IO = Output Current
∆VO=100mV and ∆IO=4A
Results to ESR=25mΩ
The MOSFET must have a maximum operating voltage
(VDSS) exceeding the maximum input voltage (VIN).
The Sanyo TPC series, PosCap capacitor is a good
choice. The 6TPC150M 150µF, 6.3V has an ESR 40mΩ. The gate drive requirement is almost the same for both
Selecting two of these capacitors in parallel, results to MOSFETs. Logic-level transistor can be used and cau-
an ESR of @ 20mΩ which achieves our low ESR goal.
tion should be taken with devices at very low VGS to pre-
vent undesired turn-on of the complementary MOSFET,
The capacitor value must be high enough to absorb the which results a shoot-through current.
inductor's ripple current. The larger the value of capaci-
tor, the lower will be the output ripple voltage.
The total power dissipation for MOSFETs includes con-
duction and switching losses. For the Buck converter
the average inductor current is equal to the DC load cur-
Inductor Selection
The inductor is selected based on output power, operat- rent. The conduction loss is defined as:
ing frequency and efficiency requirements. Low inductor
2
PCOND (Upper Switch) = ILOAD × RDS(ON) × D × ϑ
value causes large ripple current, resulting in the smaller
size, but poor efficiency and high output noise. Gener-
ally, the selection of inductor value can be reduced to
desired maximum ripple current in the inductor (Di). The
optimum point is usually found between 20% and 50%
ripple of the output current.
2
PCOND (Lower Switch) = ILOAD × RDS(ON) × (1 - D) × ϑ
ϑ = RDS(ON) Temperature Dependency
The RDS(ON) temperature dependency should be consid-
For the buck converter, the inductor value for desired ered for the worst case operation. This is typically given
operating ripple current can be determined using the fol- in the MOSFET data sheet. Ensure that the conduction
lowing relation:
losses and switching losses do not exceed the package
ratings or violate the overall thermal budget.
Rev. 2.8
05/10/04
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6
IRU3037 / IRU3037A
For this design, IRF7301 is a good choice. The device These values are taken under a certain condition test.
provides low on-resistance in a compact SOIC 8-Pin For more detail please refer to the IRF7301 data sheet.
package.
By using equation (6), we can calculate the switching
The IRF7301 has the following data:
losses.
PSW = 0.186W
VDSS = 20V
ID = 5.2A
RDS(ON) = 0.05Ω
Feedback Compensation
The IRU3037 is a voltage mode controller; the control
loop is a single voltage feedback path including error
amplifier and error comparator. To achieve fast transient
response and accurate output regulation, a compensa-
tion circuit is necessary. The goal of the compensation
network is to provide a closed loop transfer function with
the highest 0dB crossing frequency and adequate phase
margin (greater than 458).
The total conduction losses will be:
PCON(TOTAL)=PCON(Upper Switch)+PCON(Lower Switch)
PCON(TOTAL) = IL2OAD × RDS(ON) × ϑ
ϑ = 1.5 according to the IRF7301 data sheet for
1508C junction temperature
PCON(TOTAL) = 1.2W
The switching loss is more difficult to calculate, even The output LC filter introduces a double pole, –40dB/
though the switching transition is well understood. The decade gain slope above its corner resonant frequency,
reason is the effect of the parasitic components and and a total phase lag of 1808 (see Figure 5). The Reso-
switching times during the switching procedures such nant frequency of the LC filter expressed as follows:
as turn-on / turnoff delays and rise and fall times. With a
1
linear approximation, the total switching loss can be ex-
pressed as:
FLC =
---(7)
2π×
LO×CO
VDS(OFF)
tr + tf
PSW =
×
× ILOAD
---(6)
Figure 5 shows gain and phase of the LC filter. Since we
already have 1808 phase shift just from the output filter,
the system risks being unstable.
2
T
Where:
VDS(OFF) = Drain to Source Voltage at off time
tr = Rise Time
tf = Fall Time
T = Switching Period
ILOAD = Load Current
Gain
0dB
Phase
08
-40dB/decade
The switching time waveform is shown in figure 4.
V
DS
-180
8
90%
FLC
Frequency
FLC Frequency
Figure 5 - Gain and phase of LC filter.
The IRU3037’s error amplifier is a differential-input
transconductance amplifier. The output is available for
DC gain control or AC phase compensation.
10%
VGS
t
d
(ON)
td(OFF)
tr
tf
The E/A can be compensated with or without the use of
local feedback. When operated without local feedback
the transconductance properties of the E/A become evi-
dent and can be used to cancel one of the output filter
poles. This will be accomplished with a series RC circuit
from Comp pin to ground as shown in Figure 6.
Figure 4 - Switching time waveforms.
From IRF7301 data sheet we obtain:
tr = 42ns
tf = 51ns
Rev. 2.8
03/10/03
www.irf.com
7
IRU3037 / IRU3037A
Note that this method requires that the output capacitor
should have enough ESR to satisfy stability requirements.
In general the output capacitor’s ESR generates a zero
typically at 5KHz to 50KHz which is essential for an
acceptable phase margin.
Where:
VIN = Maximum Input Voltage
VOSC = Oscillator Ramp Voltage
Fo = Crossover Frequency
FESR = Zero Frequency of the Output Capacitor
FLC = Resonant Frequency of the Output Filter
R5 and R6 = Resistor Dividers for Output Voltage
Programming
The ESR zero of the output capacitor expressed as fol-
lows:
1
2π × ESR × Co
gm = Error Amplifier Transconductance
FESR =
---(8)
For:
VIN = 5V
VOUT
VOSC = 1.25V
Fo = 30KHz
FESR = 26.52KHz
FLC = 2.9KHz
R5 = 1K
R
6
Fb
Comp
Ve
E/A
R
5
C
9
R6 = 1.65K
gm = 600µmho
V
REF
R4
Gain(dB)
This results to R4=104.4KΩ. Choose R4=105KΩ
H(s) dB
To cancel one of the LC filter poles, place the zero be-
fore the LC filter resonant frequency pole:
FZ @ 75%FLC
Frequency
F
Z
1
FZ @ 0.75 ×
---(13)
Figure 6 - Compensation network without local
feedback and its asymptotic gain plot.
2π LO × CO
For:
Lo = 10µH
Co = 300µF
FZ = 2.17KHz
R4 = 86.6KΩ
The transfer function (Ve / VOUT) is given by:
R5
1 + sR4C9
sC9
H(s) = gm ×
×
---(9)
(
)
R6 + R5
Using equations (11) and (13) to calculate C9, we get:
The (s) indicates that the transfer function varies as a
function of frequency. This configuration introduces a gain
and zero, expressed by:
C9 = 698pF
Choose C9 = 680pF
One more capacitor is sometimes added in parallel with
C9 and R4. This introduces one more pole which is mainly
R5
R6×R5
|H(s)| = gm×
× R4
---(10)
used to supress the switching noise. The additional pole
1
is given by:
1
FZ =
---(11)
2π×R4×C9
FP =
The gain is determined by the voltage divider and E/A's
transconductance gain.
C9 × CPOLE
2π × R4 ×
C9 + CPOLE
First select the desired zero-crossover frequency (Fo):
The pole sets to one half of switching frequency which
results in the capacitor CPOLE:
Fo > FESR and FO ≤ (1/5 ~ 1/10)× fS
1
1
Use the following equation to calculate R4:
1
CPOLE =
@
π×R4×fS
1
C9
π×R4×fS -
VOSC
VIN
Fo×FESR
R5 + R6
R5
R4 =
×
×
×
---(12)
2
fS
2
gm
FLC
for FP <<
Rev. 2.8
05/10/04
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8
IRU3037 / IRU3037A
For a general solution for unconditionally stability for any
type of output capacitors, in a wide range of ESR values
we should implement local feedback with a compensa-
tion network. The typically used compensation network
for voltage-mode controller is shown in Figure 7.
FP1 = 0
FP2 =
1
2π×R8×C10
1
1
FP3 =
@
2π×R7×C12
C12×C11
(C12+C11)
2π×R7×
VOUT
Z
IN
C12
1
C10
FZ1 =
FZ2 =
R7
C11
2π×R7×C11
R8
R6
Z
f
1
1
@
2π×C10×(R6 + R8)
2π×C10×R6
Fb
Ve
E/A
Cross Over Frequency:
R5
Comp
VIN
VOSC
1
FO = R7×C10×
×
---(15)
VREF
2π×Lo×Co
Gain(dB)
Where:
VIN = Maximum Input Voltage
VOSC = Oscillator Ramp Voltage
Lo = Output Inductor
H(s) dB
Co = Total Output Capacitors
Frequency
F
Z
1
F
Z
2
F
P
2
FP3
The stability requirement will be satisfied by placing the
poles and zeros of the compensation network according
to following design rules. The consideration has been
taken to satisfy condition (14) regarding transconduc-
tance error amplifier.
Figure 7 - Compensation network with local
feedback and its asymptotic gain plot.
In such configuration, the transfer function is given by:
1 - gmZf
1 + gmZIN
Ve
VOUT
=
1) Select the crossover frequency:
Fo < FESR and Fo ≤ (1/10 ~ 1/6)× fS
The error amplifier gain is independent of the transcon-
ductance under the following condition:
2
2) Select R7, so that R7 >>
gm
gmZf >> 1
and
gmZIN >>1
---(14)
3) Place first zero before LC’s resonant frequency pole.
By replacing ZIN and Zf according to Figure 7, the trans-
former function can be expressed as:
FZ1 @ 75% FLC
1
C11 =
2π × FZ1 × R7
(1+sR7C11)×[1+sC10(R6+R8)]
C12×C11
1
H(s)=
×
sR6(C12+C11)
4) Place third pole at the half of the switching frequency.
1+sR7
[ (C12+C11 )]
×(1+sR8C10)
fS
FP3 =
2
As known, transconductance amplifier has high imped-
ance (current source) output, therefore, consider should
be taken when loading the E/A output. It may exceed its
source/sink output current capability, so that the ampli-
fier will not be able to swing its output voltage over the
necessary range.
1
C12 =
2π × R7 × FP3
C12 > 50pF
If not, change R7 selection.
5) Place R7 in (15) and calculate C10:
The compensation network has three poles and two ze-
ros and they are expressed as follows:
2π × Lo × Fo × Co
VOSC
VIN
C10 ≤
×
R7
Rev. 2.8
03/10/03
www.irf.com
9
IRU3037 / IRU3037A
6) Place second pole at the ESR zero.
Start to place the power components, make all the con-
nection in the top layer with wide, copper filled areas.
The inductor, output capacitor and the MOSFET should
be close to each other as possible. This helps to reduce
the EMI radiated by the power traces due to the high
switching currents through them. Place input capacitor
directly to the drain of the high-side MOSFET, to reduce
the ESR replace the single input capacitor with two par-
allel units. The feedback part of the system should be
kept away from the inductor and other noise sources,
and be placed close to the IC. In multilayer PCB use
one layer as power ground plane and have a control cir-
cuit ground (analog ground), to which all signals are ref-
erenced. The goal is to localize the high current path to
a separate loop that does not interfere with the more
sensitive analog control function. These two grounds
must be connected together on the PC board layout at a
single point.
FP2 = FESR
1
R8 =
2π × C10 × FP2
1
Check if R8 >
gm
If R8 is too small, increase R7 and start from step 2.
7) Place second zero around the resonant frequency.
FZ2 = FLC
1
R6 =
- R8
2π × C10 × FZ2
8) Use equation (1) to calculate R5.
VREF
VOUT - VREF
R5 =
× R6
These design rules will give a crossover frequency ap-
proximately one-tenth of the switching frequency. The
higher the band width, the potentially faster the load tran-
sient speed. The gain margin will be large enough to
provide high DC-regulation accuracy (typically -5dB to -
12dB). The phase margin should be greater than 458 for
overall stability.
Figure 8 shows a suggested layout for the critical com-
ponents, based on the schematic on page 14.
PGnd
PGnd
C1
C2A, B
C7A, B
PGnd
L1
Vin
Vout
L2
IC Quiescent Power Dissipation
Power dissipation for IC controller is a function of ap-
plied voltage, gate driver loads and switching frequency.
The IC's maximum power dissipation occurs when the
IC operating with single 12V supply voltage (Vcc=12V
and Vc@24V) at 400KHz switching frequency and maxi-
mum gate loads.
Q1
3
Single Point
Analog Gnd
Connect to
D
3
D
2
D
1
C
5
5
4
Power Ground plane
U1
IRU3037
C4
6
3
PGnd
R4 C9
7
2
C3
Analog Gnd
Figures 9 and 10 show voltage vs. current, when the
gate drivers loaded with 470pF, 1150pF and 1540pF ca-
pacitors. The IC's power dissipation results to an exces-
sive temperature rise. This should be considered when
using IRU3037A for such application.
R5
R6
C8
8
1
Analog Gnd
Figure 8 - Suggested layout.
(Topside shown only)
Layout Consideration
The layout is very important when designing high fre-
quency switching converters. Layout will affect noise
pickup and can cause a good design to perform with
less than expected results.
Rev. 2.8
05/10/04
www.irf.com
10
IRU3037 / IRU3037A
TYPICAL PERFORMANCE CHARACTERISTICS
IRU3037A
Vcc vs. Icc
TA = 258C
@470PF, 1150PF and 1540PF Gate Load
14
12
10
8
CLOAD =1540pF
CLOAD =1150pF
6
CLOAD =470pF
4
2
0
0
2
4
6
8
10
12
14
Vcc (V)
Figure 9 - Vcc vs. Icc
IRU3037A
Vc vs. Ic
TA = 258C
@470PF, 1150PF and 1540PF Gate Load
30
25
20
15
10
5
CLOAD =1540pF
CLOAD =1150pF
CLOAD =470pF
0
0
2
4
6
8
10 12 14 16 18 20 22 24 26
Vc (V)
Figure 10 - Vc vs. Ic
Rev. 2.8
03/10/03
www.irf.com
11
IRU3037 / IRU3037A
TYPICAL PERFORMANCE CHARACTERISTICS
I R U 3 0 3 7
I R U 3 0 3 7
O u t p u t V o l t a g e
O u t p u t F r e q u e n c y
1.3
1.28
1.26
2 4 0
2 3 0
2 2 0
2 1 0
M a x
M a x
2 0 0
1 9 0
1.24
1.22
1.2
Min
Min
1 8 0
1 7 0
1 6 0
-40°C
0 ° C
Output Voltage
+50°C
Spec Max.
+100°C
Spec Min.
+ 1 5 0 ° C
-40°C
0°C
+50°C
+ 1 0 0 ° C
Spec Min.
+ 1 5 0 ° C
Oscillation Frequency
Spec Max.
Figure 11 - Output Voltage
Figure 12 - Output Frequency
IRU3037
MaximumDutyCycle
92.0%
90.0%
88.0%
86.0%
84.0%
82.0%
80.0%
-40°C
-25°C
0°C
+25°C
+50°C
+75°C +100°C +125°C +150°C
Max Duty Cycle
Figure 13 - Maximum Duty Cycle
www.irf.com
Rev. 2.8
05/10/04
12
IRU3037 / IRU3037A
TYPICAL PERFORMANCE CHARACTERISTICS
I R U 3 0 3 7 A
IRU3037A
Output Voltage
O u t p u t F r e q u e n c y
8 2 0
8 1 0
8 0 0
7 9 0
7 8 0
4 6 0
4 4 0
4 2 0
M a x
M a x
4 0 0
3 8 0
3 6 0
Min
Min
3 4 0
3 2 0
3 0 0
7 7 0
7 6 0
-40°C
-25°C
0°C
+25°C
+50°C
+75°C
+100°C +150°C
-40°C
-25°C
0°C
+25°C
+50°C
+75°C +100°C +150°C
Spec Min.
Output Voltage
Spec Max.
Spec Min.
Oscillation Frequency
Spec Max.
Figure 14 - Output Voltage
Figure 15 - Output Frequency
IRU3037 / IRU3037A
Transconductance ( GM )
IRU3037 / IRU3037A
Rise Time / Fall Time
CL=1500pF
1000
900
800
700
600
500
400
300
200
100
0
50
45
40
35
30
25
20
15
10
5
0
-40°C
-25°C
0°C
+25°C
Rise Time
+50°C
Fal time
+75°C
+100°C
-40°C
-25°C
0°C
+25°C
+50°C
+75°C
+100°C
Positive load GM
Negative load GM
Figure 16 - Transconductance
Figure 17 - Rise Time and Fall Time
Rev. 2.8
03/10/03
www.irf.com
13
IRU3037 / IRU3037A
TYPICAL APPLICATION
Single Supply 5V Input
5V
D1
1N4148
L1
D3
1N4148
1uH
D2
1N4148
C1
47uF
Tantalum
C2
2x 10TPB100ML,
100uF, 55m
C5
0.1uF
C3
1uF
C4
1uF
Ω
Vcc
Vc
HDrv
Q1
1/2 of IRF7301
L2
D05022P-103, 10uH, 4.3A
3.3V
@ 4A
SS/SD
U1
IRU3037
C8
0.1uF
Q2
C7
2x 6TPC150M,
150uF, 40m
LDrv
1/2 of IRF7301
Ω
R6
Comp
C9
680pF
Fb
1.65K, 1%
Gnd
R4
105K
R5
1K, 1%
Figure 18 - Typical application of IRU3037 in an on-board DC-DC converter
using a single 5V supply.
Rev. 2.8
05/10/04
www.irf.com
14
IRU3037 / IRU3037A
TYPICAL APPLICATION
Dual Supply, 5V Bus and 12V Bias Input
5V
L1
12V
1uH
C2
10TPB100M, 100uF,
55m , 1.5A rms
C1
47uF
C4
1uF
C1
1uF
Ω
1.8V/1A
IRU1206-18
C3
47uF
Vc
HDrv
Vcc
Q1
1/2 of IRF7752
2.5V/2A
L2
CTX5-2P, 3.5uH @ 2.5A
U1
SS/SD
C7
0.1uF
IRU3037
Q2
C6
6TPB150M, 150uF, 55m
LDrv
1/2 of IRF7752
Ω
R1
Comp
C8
2200pF
Fb
1K, 1%
Gnd
R3
1K
1%
R2
14K
L2
C6
6TPB150M, 150uF, 55m
Ω
Ω
(Qty 2)
(Qty 1)
CTX5-2P, 3.5uH @ 2.5A
CTX10-5P, 5.7uH @ 2.5A
6TPB150M, 150uF, 55m
C9
10TPB100M, 100uF,
55m , 1.5A rms
Ω
C10
1uF
C11
1uF
Vc
HDrv
Vcc
Q3
1/2 of IRF7752
3.3V/1.8A
L3
CTX5-1P, 3.4uH @ 2A
U2
SS/SD
C13
0.1uF
IRU3037
Q4
C12
6TPB150M, 150uF, 55m
LDrv
1/2 of IRF7752
Ω
R4
Comp
Fb
C14
2200pF
1.65K, 1%
Gnd
R6
1K, 1%
R5
14K
Figure 19 - Typical application of IRU3037 or IRU3037A in an on-board DC-DC converter providing the Core,
GTL+, and Clock supplies for the Pentium II microprocessor.
Rev. 2.8
03/10/03
www.irf.com
15
IRU3037 / IRU3037A
TYPICAL APPLICATION
1.8V to 7.5V / 0.5A Boost Converter
L1
Vpwr (1.5V Min)
Vc/Vcc
1uH (CoilTronics UP2B-1R0)
C1
2x 68uF
V
OUT
C5
1uF
D1
1N5817
(7.5V / 0.5A)
C9
2x 47uF
R1
20K
Q3
IRF7402
Q2
2N2222
R2
10K
C4
0.01uF
C10
100pF
C5
0.1uF
R4
25K
Q1
2N2222
Comp
HDrv
SS/SD
Vc
U1
R3
20K
IRU3037
Fb Vcc LDrv Gnd
C8
1uF
Gnd
R5
1K, 1%
R6
5K, 1%
Figure 20 - Typical application of IRU3037 as a boost converter.
Rev. 2.8
05/10/04
www.irf.com
16
IRU3037 / IRU3037A
DEMO-BOARD APPLICATION
5V or 12V to 3.3V @ 10A
L1
V
IN
1uH
D1
LL4148
5V or 12V
C2A
47uF
16V
C2B
47uF
16V
D4
C1
33uF
16V
LL4148
D2
Gnd
LL4148
C3
1uF
C19
1uF
C6
0.1uF
Vcc
Vc
HDrv
C8
1uF
Q1
IRF7457
L2
V
3.3V
@ 10A
OUT
SS/SD
3.3uH
U1
C5
0.1uF
C7
470pF
IRU3037
C13
1uF
C9B
150uF
6.3V
C9C
150uF
6.3V
Q2
R4
4.7
LDrv
IRF7460
Ω
Comp
Gnd
C4
R6
2200pF
Fb
Gnd
1.65K
R5
1K
R3
20K
Figure 21 - Demo-board application of IRU3037.
Application Parts List
Ref Desig
Description
MOSFET
MOSFET
Controller
Diode
Value
Qty
1
1
Part#
IRF7457
IRF7460
IRU3037
LL4148
D03316P-102HC
D05022P-332HC
ECS-T1CD336R
16TPB47M
Manuf
Q1
Q2
20V, 7mΩ, 15A
20V, 10mΩ, 12A
Synchronous PWM
Fast Switching
1µH, 10A
IR
IR
IR
U1
1
3
1
D1, D2, D4
L1
Inductor
Inductor
Coilcraft
L2
C1
3.3µH, 12A
1
1
2
Coilcraft
Panasonic
Sanyo
Capacitor, Tantalum 33µF, 16V
C2A, C2B
Capacitor, Poscap
Capacitor, Poscap
Capacitor, Ceramic
Capacitor, Ceramic
Capacitor, Ceramic
Capacitor, Ceramic
Capacitor, Ceramic
Resistor
47µF, 16V, 70mΩ
C9B, C9C
C5, C6
150µF, 6.3V, 40mΩ
0.1µF, Y5V, 25V
1µF, X7R, 25V
2200pF, X7R, 50V
470pF, X7R
1µF, Y5V, 16V
20K, 5%
4.7Ω, 5%
2
2
1
6TPC150M
Sanyo
ECJ-2VF1E104Z
ECJ-3YB1E105K
ECJ-2VB1H222K
ECJ-2VB2D471K
ECJ-2VF1C105Z
Panasonic
Panasonic
Panasonic
Panasonic
Panasonic
C3
C4
C7
1
1
3
C8, C13, C19
R3
R4
R5
R6
1
1
1
Resistor
Resistor
1K, 1%
Resistor
1.65K, 1%
1
Rev. 2.8
03/10/03
www.irf.com
17
IRU3037 / IRU3037A
DEMO-BOARD WAVEFORMS
IRU3037
VIN
IN
OUT
V =5.0V, V =3.3V
100
90
VOUT
80
70
0
1
2
3
4
5
6
7
8
9
10 11
Output Current (A)
Figure 22 - Efficiency for IRU3037 Evaluation Board.
Figure 23 - Start-up time @ IOUT=5A.
IRU3037
Vss
IRU3037
VOUT
IOUT = 5V
Figure 24 - Shutdown the output by
pulling down the soft-start.
Figure 25 - 3.3V output voltage ripple @ IOUT=5A.
IRU3037
IRU3037
2A
4A
0A
0A
Figure 26 - Transient response @ IOUT = 0 to 2A.
Figure 27 - Transient response @ IOUT = 0 to 4A.
Rev. 2.8
05/10/04
www.irf.com
18
IRU3037 / IRU3037A
(F) TSSOP Package
8-Pin
A
L
Q
R1
R
C
B
1.0 DIA
E
N
M
P
O
F
D
DETAIL A
PIN NUMBER 1
G
DETAIL A
J
H
K
8-PIN
NOM
0.65 BSC
4.40
SYMBOL
DESIG
A
MIN
4.30
0.19
MAX
4.50
0.30
B
C
6.40 BSC
---
D
E
1.00
F
1.00
G
H
2.90
---
3.00
3.10
1.10
0.95
0.15
---
J
0.85
0.05
0.90
K
---
L
128 REF
128 REF
---
M
N
08
88
O
P
1.00 REF
0.60
0.50
0.75
Q
R
0.20
0.09
0.09
---
---
---
R1
---
NOTE: ALL MEASUREMENTS ARE IN MILLIMETERS.
Rev. 2.8
03/10/03
www.irf.com
19
IRU3037 / IRU3037A
(S) SOIC Package
8-Pin Surface Mount, Narrow Body
H
A
B
C
E
DETAIL-A
L
D
PIN NO. 1
DETAIL-A
I
0.38±0.015 x 458
K
T
F
J
G
8-PIN
SYMBOL
MIN
MAX
A
B
C
D
E
F
G
H
I
4.80
4.98
1.27 BSC
0.53 REF
0.36
0.46
3.99
1.72
0.25
3.81
1.52
0.10
78 BSC
0.19
5.80
08
0.25
6.20
88
J
K
L
0.41
1.37
1.27
1.57
T
NOTE: ALL MEASUREMENTS ARE IN MILLIMETERS.
Rev. 2.8
05/10/04
www.irf.com
20
IRU3037 / IRU3037A
PACKAGE SHIPMENT METHOD
PKG
PACKAGE
PIN
PARTS
PARTS
T & R
DESIG
DESCRIPTION
COUNT
PER TUBE
PER REEL
Orientation
F
S
TSSOP Plastic
8
8
100
95
2500
2500
Fig A
Fig B
SOIC, Narrow Body
1
1
1
1
1
1
Feed Direction
Figure A
Feed Direction
Figure B
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information
Data and specifications subject to change without notice. 02/01
Rev. 2.8
03/10/03
www.irf.com
21
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