IRUH330125AKC [INFINEON]

Radiation Hardended Ultra Low Dropout Adjustable Positive Linear Regulator;
IRUH330125AKC
型号: IRUH330125AKC
厂家: Infineon    Infineon
描述:

Radiation Hardended Ultra Low Dropout Adjustable Positive Linear Regulator

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PD-97534C  
(5962F1023502K)  
IRUH3301A2AK  
IRUH3301A2AP  
Radiation Hardended Ultra Low Dropout  
Adjustable Positive Linear Regulator  
+5.0V to V  
@3.0A  
IN  
ADJ  
Product Summary  
I
V
V
OUT  
Part Number  
Dropout  
O
IN  
IRUH3301A2AK  
IRUH3301A2AP  
0.4V  
3.0A  
5.0V  
ADJ  
8-LEAD FLAT PACK  
Features  
Description  
n
Silicon On Insulator (SOI) CMOS Regulator  
IC, CMOS Latch-Up Immune,  
The IRUH3301A2 is a space qualified, ultra low dropout  
linear regulator designed specifically for applications  
requiring high reliability, low noise and radiation hardness.  
The output voltage can be adjusted to a low 0.8V with a  
droput voltage of 400mV at the full rated current of 3.0  
Amps.  
Inherently Rad Hard  
n
n
Total Dose Capability up to 300Krads(Si)  
(Condition A); Tested to 500Krad (Si)  
ELDRS up to 100Krad(Si) (Condition D)  
n
n
n
n
n
n
n
SEU Immune up to LET = 80 MeV*cm2/mg  
Space Level Screened  
Fast Transient Response  
Timed Latch-Off Over-Current Protection  
Internal Thermal Protection  
Adjustable Output as low as 0.8V  
On/Off Control via Shutdown Pin, Power  
Sequencing Easily Implemented  
Isolated Hermetic 8-Lead Flat Pack  
Ensures Higher Reliability  
n
n
This part is also available in MO-078 Package  
as IRUH3301A2BK / IRUH3301A2BP  
Absolute Maximum Ratings  
Parameter  
Symbol  
Min.  
Max.  
Units  
P
D
-
25  
W
Power Dissipation @ T = 125°C  
C
Maximum Output Current @ Maximum  
Power Dissipation with no Derating  
Non-Operating Input Voltage  
Operating Input Voltage  
I
-
See Fig 4  
A
O
V
V
-0.3  
2.9  
+8.0  
6.4  
IN  
IN  
V
Ground  
0.3  
GND  
-0.3  
-0.3  
Shutdown Pin Voltage  
V
V
V
+ 0.3  
+ 0.3  
SHDN  
IN  
V
Output Pin Voltage  
-0.3  
OUT  
IN  
Operating Case Temperature Range  
Storage Temperature Range  
Maximmum Junction Temperature  
Lead Temperature (Soldering 10sec)  
Pass Transistor Thermal Resistance, Junction to Case  
T
-55  
+140  
O
T
-65  
+150  
+150  
+300  
1.0  
S
°C  
T
T
-
-
-
J
L
R
°C/W  
THJC  
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1
05/18/12  
IRUH3301A2AK  
IRUH3301A2AP  
Electrical Characteristics  
Pre-Radiation @TC = 25°C, VIN = 5.0V (Unless Otherwise Specified)  
Parameter  
Test Conditions  
Symbol  
Min. Typ. Max. Units  
3.8V V 5.8V, 50mA I  
3.0A  
0.788 0.800 0.812  
IN  
OUT  
3.8V  
V
5.8V, 50mA  
I
3.0A,  
3.0A,  
IN  
OUT  
0.776 0.800 0.824  
V
Reference Voltage  
-55°C to +125°C  
V
OUT  
5.8V, 50mA  
3.8V  
Post -Rad  
= 3.0A, V  
V
IN  
I
(Measured @ ADJ Pin)  
OUT  
0.772 0.800 0.816  
I
O
= 4.4V, -55°C to +125°C,  
OUT  
Dropout Voltage  
Current Limit  
-
-
0.4  
-
V
A
V
DROP  
Post -Rad  
Over-Current Latching, -55°C to +125°C,  
Post -Rad  
3.5  
-
I
t
LATCH  
I
O
> I  
LATCH  
10  
-
-
-
-
-
Over-Current Time-to-Latch  
Maximum Shutdown Temp.  
-
125  
65  
40  
-
ms  
°C  
LATCH  
T
140  
-
LATCH  
F= 120Hz, I = 50mA, -55°C to +125°C  
O
Ripple Rejection  
PSRR  
dB  
F= 120Hz, I = 50mA, Post -Rad  
O
-
I
-55°C to +125°C  
1.6  
ADJ Pin Current  
Minimum SHDN Pin "On"  
Threshold Voltage  
mA  
V
ADJUST  
I
= 200µA, -55°C to +125°C  
SOURCE  
V
V
-
-
-
-
0.8  
-
SHDN  
SHDN  
Post -Rad  
= 200µA, -55°C to +125°C  
I
Maximum SHDN Pin "Off"  
Threshold Voltage  
SOURCE  
1.2  
-0.1  
V
V
Post -Rad  
= 36 Ohms, V  
R
= 3.3V  
SHDN  
LOAD  
Output Voltage at Shutdown  
SHDN Pin Leakage Current  
V
0.1  
OUT  
-55°C to +125°C, Post-Rad  
V
V
V
V
= 3.3V, -55°C to +125°C,Post-Rad  
I
-10  
-98  
-
-
-
-
10  
µ
A
SHDN  
SHDN  
SHDN  
SHDN  
SHDN  
= 0.4V  
-56  
-30  
-56  
= 0.4V, -55°C to +125°C  
= 0.4V, Post-Rad  
I
SHDN Pin Pull-Up Current  
-140  
-98  
µ
A
SHDN  
Power On Reset Threshold  
Quiescent Current  
Sweep V and Measure Output  
IN  
V
T-POR  
-
V
-
1.7  
15  
90  
No Load  
Full Load  
-
-
-
-
I
mA  
Q
Notes:  
 Connected as shown in Fig.1 and measured at the junction of VOUT and ADJ Pins.  
‚ Under normal closed-loop operation. Guaranteed by design. Not tested in production.  
2
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IRUH3301A2AK  
IRUH3301A2AP  
Radiation Performance Characteristics  
Test  
Conditions  
Min  
Typ  
Unit  
MIL-STD-883, Method 1019 (Condition A)  
Operating Bias applied during exposure  
Minimum Rated Load, Vin = 6.4V  
Total Ionizing Dose (Gamma)  
300  
500  
Krads (Si)  
MIL-STD-883, Method 1019 (Condition D)  
See  
Krads (Si)  
MeV*cm2/mg  
Neutrons/cm2  
Total Ionizing Dose (Gamma) (ELDRS) Operating Bias applied during  
exposure Minimum Rated Load, Vin = 6.4V  
100  
84  
Single Event effects  
Heavy Ions (LET)  
SEU, SEL, SEGR, SEB  
Operating Bias applied during exposure  
under varying operating conditions  
11  
Neutron Fluence  
MIL-STD-883, Method 1017  
1.0e  
Notes:  
 Tested to 500Krad (Si).  
‚ See Fig. 5.  
Space Level Screening Requirements  
TEST/INSPECTION  
SCREENING LEVEL  
MIL-STD-883  
METHOD  
SPACE  
Nondestructive Bond Pull  
Internal Visual  
Seal  
100%  
100%  
100%  
100%  
100%  
100%  
100%  
100%  
100%  
100%  
2023  
2017  
1014  
1010  
2001  
2002  
2020  
Temperature Cycle  
Constant Acceleration  
Mechanical Shock  
PIND  
Pre Burn-In-Electrical  
Burn-In  
1015  
Final Electrical  
Radiographic  
100%  
100%  
2012  
2009  
External Visual  
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3
IRUH3301A2AK  
IRUH3301A2AP  
Application Information  
Input  
Output  
Voltage  
VIN  
VOUT  
ADJ  
Voltage  
R1  
0.1uF and 1uF  
Ceramic;  
Two 100uF  
Low ESR  
0.1uF and 1uF  
Ceramic;  
Two 100uF  
Low ESR  
IRUH3301Axxx  
GND  
SHDN  
Tantalum  
Tantalum  
Fig. 1. Typical Regulator Circuit; Note the SHDN Pin is hardwired in the “ON” position.  
The ADJ Pin is connected as noted in the “General Layout Rules” section.  
Setting the Output Voltage  
Choose R1 based upon the desired output voltage using the formula below.  
VOUT  
R1 =  
1 * 499Ω  
0.800V  
Table 1 shows the closest nominal 0.1% tolerance R1 value to provide a given output voltage.  
Table 1- Values of R1 for a Given Output Voltage  
VOUT (V)  
0.9  
1.0  
1.2  
1.5  
1.8  
2.5  
3.3  
Nearest R1 Value (0.1%), (Ohms)  
61.9  
124  
249  
437  
619  
1060  
1560  
Over-Current & Over-Temperature Protection  
The IRUH3301 series provides over-current protection by means of a timed latch function. Drive  
current to the internal PNP pass transistor is limited by an internal resistor (Rb in Fig. 3) between  
the base of the transistor and the control IC drive FET. If an over-current condition forces the  
voltage across this resistor to exceed 0.5V (nom), the latch feature will be triggered. The time-to-  
latch (tLATCH) is nominally 10ms. If the over-current condition exists for less than tLATCH , the latch  
will not be set. If the latch is set the drive current to the PNP pass transistor will be disabled. The  
latch will remain set until one of the following actions occur:  
1. The SHDN Pin voltage is brought above 1.2V and then lowered below 0.8V.  
2. The VIN Pin voltage is lowered below 1.7V.  
If the junction temperature of the regulator IC exceeds 140°C nominal, the thermal shutdown circuit  
will set the internal latch and disable the drive current to the PNP pass transistor as described  
above. After the junction temperature falls below a nominal 125°C, the latch can be reset using  
either of the actions described above.  
Under-Voltage Lock-Out  
The under-voltage lock-out (UVLO) function prevents operation when VIN is less than 1.7V  
(nominal). There is a nominal 100mV hysteresis about this point.  
Input Voltage Range  
The device control functions fully when VIN is greater than 2.9V. The output current may need to be  
reduced to avoid the activation of over current protection at 2.9V < VIN < 3.8V. The IRUH3301A1 is  
recommended for performance optimization when 2.9V < VIN < 3.8V is required. The device enters  
into under-voltage lock-out when VIN < 1.7V (nominal). When 1.7V (nominal) < VIN < 2.9V, VOUT will  
track VIN and overshoot may occur. A larger output capacitor should be used to slow down the VOUT  
rise rate for slow VIN ramp applications.  
4
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IRUH3301A2AK  
IRUH3301A2AP  
Shutdown (SHDN)  
The regulator can be shutdown by applying a voltage of >1.2V to the SHDN Pin. The regulator will  
restart when the SHDN Pin is pulled below the shutdown threshold of 0.8V. If the remote shutdown  
feature is not required, the SHDN Pin should be connected to GND.  
Input Capacitance  
Input bypass capacitors: Two (0.1µF and 1µF) ceramics and two 100µF low ESR tantalums (AVX  
TPS or equivalent), placed very close to the VIN Pin are required for proper operation. When the  
input voltage supply capacitance is more than 4 inches from the device, additional input  
capacitance is recommended. Larger input capacitor values will improve ripple rejection further  
improving the integrity of the output voltage.  
Output Capacitance  
Output bypass capacitors: Two (0.1µF and 1µF) ceramics and two 100µF low ESR tantalums  
(AVX TPS or equivalent) are required for loop stability. Faster transient performance can be  
achieved with multiple additional 1µF ceramic capacitors. Ceramic capacitors greater than 1µF in  
value are not recommended as they can cause stability issues.  
Tantalum capacitor values larger than the suggested value are recommended to improve the  
transient response under large load current changes. The upper capacitance value limit is  
governed by the delayed over-current latch function of the regulator and can be as much as  
10,000µF without causing the device to latch-off during start-up.  
General Layout Rules  
Low impedance connections between the regulator output and load are essential. Solid power and  
ground planes are highly recommended. In those cases where the board impedances are not kept  
very small, oscillations can occur due to the effect of parasitic series resistance and inductance  
on loop bandwidth and phase margin.  
R1 must be directly conected to the VOUT Pin using as short a trace as possible with the  
connection inside the first bypass capacitor (see Fig. 2a). The trace from ADJ Pin to R1 should  
be as short as possible.  
Connect ceramic output capacitors directly across the VOUT and GND Pins with as wide a trace as  
design rules allow (see Fig. 2a). Avoid the use of vias for these capacitors and avoid loops. Fig.2  
shows the ceramic capacitors tied directly to the regulator output.  
The input capacitors should be connected as close a possible to the VIN Pin.  
Fig. 2a. Layer 1 conductor.  
Ground plane below layer 1  
Fig. 2b. Layer 1 silkscreen  
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5
IRUH3301A2AK  
IRUH3301A2AP  
ADJ  
VOUT  
VIN  
Input  
Undervoltage  
detect  
Rb  
SHDN  
Shutdown  
& Over  
Current  
Latch  
Disable  
Thermal  
Shutdown  
-
Error  
Amp  
+
Latch  
Timing  
capacitor  
VREF  
GND  
Fig. 3. Simplified Schematic Circuit  
Maximum Output Current (A) with no derating at Maximum Dissipation  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
100  
110  
120  
130  
140  
150  
160  
170  
Mounting Surface Temperature (’C)  
Fig. 4. Maximum Output Current versus Mounting Surface Temperaturewith no Derating at Maximum  
Dissipation  
6
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IRUH3301A2AK  
IRUH3301A2AP  
VOut  
0.500%  
0.250%  
0.000%  
-0.250%  
-0.500%  
ELDRS  
TID  
1
10  
100  
1000  
10000 100000  
Total Dose (Rad (Si))  
Fig. 5. Change in Output Voltage vs. Total Ionizing Dose Radiation Exposure at Both High and Low Dose Rates  
PSRR (Typical)  
105  
95  
85  
75  
65  
55  
45  
35  
25  
15  
5
-5  
0.1  
1
10  
100  
1000  
10000  
Freq (KHz)  
Recomended Layout and Capcitors, No IRUH  
Iout=100mA & 1.6A, 3.3Vout, 4.8Vin  
Fig. 6. Typical Power Supply Ripple Rejection at 100mA and 1.6A using recommended layout  
and capacitors. Results above 10KHz are influenced by testing setup and layout.  
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7
IRUH3301A2AK  
IRUH3301A2AP  
Fig 7. Case Outline and Dimensions - 8-Lead Flat Pack (Lead Form Down)  
Pin Assignment  
Pin #  
Pin Description  
1
2
GND  
GND  
3
4
SHUTDOWN  
V
ADJ  
V
5
6
7
8
OUT  
V
OUT  
V
IN  
VIN  
Note:  
1) All dimensions are in inches  
Warning: This Product contains BeO  
Fig 8. Case Outline and Dimensions - 8-Lead Flat Pack (Lead Trimmed)  
Pin Assignment  
Pin #  
Pin Description  
1
2
GND  
GND  
3
4
SHUTDOWN  
V
ADJ  
V
5
6
7
8
OUT  
V
OUT  
V
IN  
VIN  
Note:  
1) All dimensions are in inches  
Warning: This Product contains BeO  
8
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IRUH3301A2AK  
IRUH3301A2AP  
Part Numbering Nomenclature  
IR U H3 301 A2 A K  
Lead Form Options  
Blank = Lead Form Down (Fig. 7)  
B = Lead Form Up  
Linear Regulator  
U = Ultra Low Dropout Regulator  
C = Lead Trimmed (Fig. 8)  
Radiation Hardening  
H3 = 300 Krads  
Screening Level  
Device indicator  
301 = 3 Amp Positive Regulator  
P = Unscreened. 25°C  
Electrical Test Not for Qualification  
K = Class K per MIL-PRF-38534  
Output Voltage  
18 = 1.8V  
25 = 2.5V  
33 = 3.3V  
Package Type  
A = 8 Lead Flat Pack  
A1 = Adjustable Optimized for 3.3 V Input  
A2 = Adjustable Optimized for 5.0V Input  
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105  
IR LEOMINSTER : 205 Crawford St., Leominster, Massachusetts 01453, USA Tel: (978) 534-5776  
TAC Fax: (310) 252-7903  
Visit us at www.irf.com for sales contact information.  
Data and specifications subject to change without notice. 05/2012  
www.irf.com  
9

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