ITS42008-SB-D_技术文档

ITS42008-SB-D

Smart Octal High-Side NMOS-Power Switch

Data Sheet

Rev 1.01, 2014-05-19

Standard Power

Smart Octal High-Side NMOS-Power Switch

ITS42008-SB-D

1

Overview

Features

•

Programmable Input thresholds: CMOS or V_S/ 2

Switching all types of resistive, inductive and capacitive loads

Fast demagnetization of inductive loads

Very low standby current

Optimized Electromagnetic Compatibility (EMC)

Constant current source diagnostic output for overtemperature

Overload protection

Undervoltage shutdown with hysteresis

Current limitation

Short circuit protection

PG-DSO-36

Thermal shutdown with restart

Overvoltage protection (including load dump)

Reverse battery protection with external resistor

Loss of GND and loss of Vbb protection

Electrostatic Discharge Protection (ESD)

Green Product (RoHS compliant)

ITS42008-SB-D is not qualified and manufactured according to the requirements of Infineon Technologies with

regards to automotive and/or transportation applications.

Description

The ITS42008-SB-D is a protected 200mΩ Smart Octal High-Side NMOS-Power Switch in a PG-DSO-36 power

package with charge pump, CMOS or supply-rationmetric compatible input and constant current diagnostic

feedback indicating overtemperature of the device.

Product Summary

Overvoltage protection V_SAZmin= 47V

Operating voltage range: 11V < V_S< 45V

On-state resistance R_DSON= typ 150mΩ

Operating Temperature range: Tj = -25°C to 125°C

Application

•

All types of resistive, inductive and capacitive loads.

Driver for electromagnetic relays

Power switch for 12V, 24V and 42V DC applications with CMOS compatible or high voltage control interface

Micro controller or opto coupler compatible power switch with diagnosis feedback for overtemperature

Power managment for high-side-switching with low current consumption in OFF-mode

Type

Package

Marking

ITS42008-SB-D

PG-DSO-36

I2008D

Data Sheet

2

Rev 1.01, 2014-05-19

ITS42008-SB-D

Block Diagram and Terms

2

Block Diagram and Terms

TAB

GND

LS

ITS42008-SB-D

1

2

4

5

14

15

16

17

18

+V_S

19

+V_S

Channel 1

Biasing

Supervision

Logic

Input

Levelshifter

3

20

6

Protection

and

Gate-Control

ESD

Protection

ST

Overtemperature

Diagnosis

IN1

36 OUT1

35

Temperature

Sensor

R_IN1

IN2

IN3

IN4

IN5

IN6

34 OUT2

33

7

8

Channel2

Channel3

R_IN2

R_IN3

R_IN4

R_IN5

R_IN6

32 OUT3

31

30 OUT4

29

9

Channel4

Channel5

28 OUT5

27

10

11

26 OUT6

25

Channel6

Channel7

Channel8

IN7

IN8

24 OUT7

23

12

13

R_IN7

22 OUT8

21

R_IN8

Figure 1

Block diagram

Data Sheet

3

Rev 1.01, 2014-05-19

ITS42008-SB-D

Block Diagram and Terms

Voltage- and Current-Definitions:

I_S

TAB

ITS42008-SB-D

GND

1

2

4

5

+V_S

19

+V_S

Channel1

I_GND

Biasing

Supervision

GND

14

15

16

17

18

LS

Logic

ESD

Input

Levelshifter

3

20

6

Protection

and

Gate-Control

I_LS

ST

Protection

Overtemperature

Diagnosis

I_ST

IN1

36 OUT1

35

Temperature

Sensor

I_IN1

R_IN1

I_OUT1

I_L1

IN2

IN3

IN4

IN5

IN6

IN7

IN8

34 OUT2

33

7

8

Channel 2

Channel 3

R_IN2

R_IN3

R_IN4

R_IN5

R_IN6

32 OUT3

31

30 OUT4

29

GND

9

Channel 4

Channel 5

28 OUT5

27

10

11

12

13

GND

26 OUT6

25

Channel 6

Channel 7

Channel 8

24 OUT7

23

R_IN7

R_IN8

22 OUT8

21

Switching Times and Slew Rate Definitions:

V_IN

H

L

t

V_OUT

+V_S

V_DS

90%

70%

dV/t_OFF

40%

30%

dV/t_ON

10%

0

t_ON

t_OFF

t

I_L

OFF

ON

OFF

t

Figure 2

Terms - parameter definition

Data Sheet

4

Rev 1.01, 2014-05-19

ITS42008-SB-D

Pin Configuration

3

Pin Configuration

3.1

Pin Assignment

NC

LS

1

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

20

19

OUT1

OUT2

OUT3

OUT4

OUT5

OUT6

OUT7

OUT8

ST

2

3

4

NC

IN1

IN2

IN3

IN4

IN5

IN6

IN7

IN8

NC

5

6

7

8

9

10

11

12

13

14

15

16

17

18

GND

Figure 3

Pin configuration top view, PG-DSO-36

3.2

Pin Definitions and Functions

Symbol

NC

Function

1, 2, 4, 5

not connected

3

LS

Input level progamming pin; Level: CMOS if LS=L; VS/2 if LS=H

Input channel 1, controles the power switch; the powerswitch is ON when IN1=H

Input channel 2, controles the power switch; the powerswitch is ON when IN2=H

Input channel 3, controles the power switch; the powerswitch is ON when IN3=H

Input channel 4, controles the power switch; the powerswitch is ON when IN4=H

Input channel 5, controles the power switch; the powerswitch is ON when IN5=H

Input channel 6, controles the power switch; the powerswitch is ON when IN6=H

Input channel 7, controles the power switch; the powerswitch is ON when IN7=H

Input channel 8, controles the power switch; the powerswitch is ON when IN8=H

not connected

6

IN1

IN2

IN3

IN4

IN5

IN6

IN7

IN8

7

8

9

10

11

12

13

14, 15, 16, 17, 18 NC

19

20

GND

Logic ground

ST

Status output (common diagnostic output); current source on in case of

overtemperature; integrated pull down resistor to GND

21 and 22

23 and 24

25 and 26

27 and 28

OUT8

OUT7

OUT6

OUT5

Output to the load of channel 8 (source of the DMOS power switch)

Output to the load of channel 7 (source of the DMOS power switch)

Output to the load of channel 6 (source of the DMOS power switch)

Output to the load of channel 5 (source of the DMOS power switch)

Data Sheet

5

Rev 1.01, 2014-05-19

ITS42008-SB-D

Pin Configuration

Symbol

OUT4

OUT3

OUT2

OUT1

VS

Function

29 and 30

31 and 32

33 and 34

35 and 36

TAB

Output to the load of channel 4 (source of the DMOS power switch)

Output to the load of channel 3 (source of the DMOS power switch)

Output to the load of channel 2 (source of the DMOS power switch)

Output to the load of channel 1 (source of the DMOS power switch)

Supply voltage (design the wiring for the maximum short circuit current and also

for low thermal resistance)

Data Sheet

6

Rev 1.01, 2014-05-19

ITS42008-SB-D

General Product Characteristics

4

General Product Characteristics

4.1

Absolute Maximum Ratings

Table 1

Absolute maximum ratings ¹⁾at T_j= 25°C unless otherwise specified. Currents flowing into the

device unless otherwise specified in chapter “Block Diagram and Terms”

Parameter

Symbol

Values

Typ.

Unit Note /

Test Conditi

Number

Min.

Max.

on

Supply voltage VS

Voltage

V_S

45

V

4.1.1

4.1.2

Voltage for short circuit protection

Output stage OUTx

V_SSC

V_S

Output Current; (Short circuit current see I_OUTx

electrical characteristics)

- 2

A

self limited

4.1.3

4.1.4

Reverse current through GND

Current

I_RGND

1.6

Input INx (channel 1 to 8)

Voltage

V_INx

I_IN

- 10

- 5

V_S

V

4.1.5

4.1.6

Current

5

mA

Input level progamming LS

Voltage

V_LS

- 1

V_S

V

4.1.7

Status ST

Voltage

I_LS

- 0.3

V

self limited

4.1.8

4.1.9

Current

1

mA

Temperatures

Junction Temperature

Storage Temperature

Power dissipation

Ta = 25 °C²⁾

T_j

-40

-55

125

°C

4.1.10

4.1.11

T_stg

P _tot

3.3

W

4.1.12

Inductive load switch-off energy dissipation

Tj = 125 °C; IL= 625mA¹⁾; all channels

active

Tj = 125 °C; IL= 625mA¹⁾; one channel

active

E_AS

1

J

single pulse 4.1.13

single pulse 4.1.14

E_AS

10

ESD Susceptibility

ESD susceptibility (pins INx; LS and ST)

ESD susceptibility (all other pins)

V_ESD

-1

-5

1

5

kV

HBM³⁾

4.1.15

4.1.16

1) Not subject to production test, specified by design

2) Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6 cm2 (one layer, 70mm thick) copper area for Vbb connection. PCB

is vertical without blown air

3) ESD susceptibility HBM according to EIA/JESD 22-A 114.

Data Sheet

7

Rev 1.01, 2014-05-19

ITS42008-SB-D

General Product Characteristics

Note:Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Integrated protection functions are designed to prevent IC destruction under fault conditions described in the

data sheet. Fault conditions are considered as “outside” the normal operating range. Protection functions

are neither designed for continuous nor repetitive operation.

4.2

Functional Range

Table 2

Functional Range

Parameter

Symbol

Values

Typ.

Unit

Note /

Test Condition

Number

Min.

Max.

Nominal Operating Voltage

V_S

11

45

V

V_Sincreasing

4.2.1

Note:Within the functional range the IC operates as described in the circuit description. The electrical

characteristics are specified within the conditions given in the related electrical characteristics table.

4.3

Thermal Resistance

Note:This thermal data was generated in accordance with JEDEC JESD51 standards. For more information, go

to www.jedec.org.

Table 3

Thermal Resistance¹⁾

Symbol

Parameter

Values

Min. Typ. Max.

2.8

Unit Note /

Test Condition

Number

Thermal Resistance - Junction to R_thj-tab

tab

K/W

4.3.1

4.3.2

4.3.3

4.3.4

4.3.5

4.3.6

2)

3)

4)

5)

6)

Thermal Resistance - Junction to R_{thJA_1s0p}

Ambient - 1s0p, minimal footprint

44.1

26.5

23.8

19.9

18.8

Thermal Resistance - Junction to R_{thJA_1s0p_300mm}

Ambient - 1s0p, 300mm²

Thermal Resistance - Junction to R_{thJA_1s0p_600mm}

Ambient - 1s0p, 600mm²

Thermal Resistance - Junction to R_{thJA_2s2p}

Ambient - 2s2p

Thermal Resistance - Junction to R_{thJA_2s2ptv}

Ambient with thermal vias - 2s2p

1) Not subject to production test, specified by design

2) Specified R_thJAvalue is according to Jedec JESD51-3 at natural convection on FR4 1s0p board, footprint; the Product

(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 1x 70µm Cu.

3) Specified R_thJAvalue is according to Jedec JESD51-3 at natural convection on FR4 1s0p board, Cu, 300mm²; the Product

(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 1x 70µm Cu.

4) Specified R_thJAvalue is according to Jedec JESD51-3 at natural convection on FR4 1s0p board, 600mm²; the Product

(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 1x 70µm Cu.

5) Specified R_thJAvalue is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; the Product

(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu).

Data Sheet

8

Rev 1.01, 2014-05-19

ITS42008-SB-D

General Product Characteristics

6) Specified R_thJAvalue is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board with two thermal vias;

the Product (Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70µm Cu, 2

x 35µm Cu. The diameter of the two vias are equal 0.3mm and have a plating of 25um with a copper heatsink area of 3mm

x 2mm). JEDEC51-7: The two plated-through hole vias should have a solder land of no less than 1.25 mm diameter with a

drill hole of no less than 0.85 mm diameter.

Data Sheet

9

Rev 1.01, 2014-05-19

ITS42008-SB-D

Electrical Characteristics

5

Electrical Characteristics

Table 4

V_S= 15V to 30V; Tj = -25°C to 125°C; V_LS= 0V; all voltages with respect to ground, currents

flowing into the device unless otherwise specified in chapter “Block Diagram and Terms”.

Typical values at V_s= 13.5V, T_j= 25°C; index “x” means “number of channel 1 to 8”.

Parameter

Symbol

Values

Unit Note /

Test Condition

Number

Min.

Typ. Max.

Powerstages

NMOS ON Resistance

R_DSONx

150 200

270 320

mΩ

I

_OUTx= 0.5A;

5.0.1

5.0.2

T_j= 25°C;

V_LS=V_INx= V_S=15V

NMOS ON Resistance

R_DSONx

I_OUTx= 0.5A;

T_j= 125°C;

V_LS=V_INx= V_S=15V

Timings of Power Stages¹⁾

Turn ON Time(to 90% of V_outx);

L to H transition of V_INx

t_ONx

50

75

100

150

µs

V_S=15V; R_Lx= 47Ω

5.0.3

5.0.4

5.0.5

Turn OFF Time (to 10% of V_outx); t_OFFx

H to L transition of V_INx

ON-Slew Rate

(10 to 30% of V_outx);

L to H transition of V_INx

SR_ONx

1.0 2.0

V / µs V_S=15V; R_Lx= 47Ω

OFF-Slew Rate

SR_OFFx

5.0.6

(70 to 40% of V_outx);

H to L transition of V_INx

Under voltage lockout (charge pump start-stop-restart)

Supply undervoltage;

charge pump stop voltage

V_SUV

V_SSU

V_SUHY

7.0

10.5

11.0

V

V_Sdecreasing

V_Sincreasing

5.0.7

5.0.8

5.0.9

Supply startup voltage;

Charge pump restart voltage

Supply undervoltage hysteresis

Current consumption

Operating current

0.5

V

_SUHY= V_SSU- V_SUV

I_GND

5

12

mA

µA

V

_INx= V_LS= V_S=30V

5.0.10

5.0.11

Standby current

I_SSTB

50

150

_INx= 6.5V;

V_LS= V_S=15V;

V

_OUTx= 0V

Output leakage current

I_OUTLKx

5

10

µA

A

V

_INx= 6.5V;

5.0.12

5.0.13

V_LS=V_S=15V

_OUTx= 0V

V

Protection functions ²⁾

Initial peak short circuit current limit I_LSCPx

1.9

T_j= -25°C

V_LS=V_S=V_INx= 30V;

t

_mx= 700µs

Data Sheet

10

Rev 1.01, 2014-05-19

ITS42008-SB-D

Electrical Characteristics

Table 4

V_S= 15V to 30V; Tj = -25°C to 125°C; V_LS= 0V; all voltages with respect to ground, currents

flowing into the device unless otherwise specified in chapter “Block Diagram and Terms”.

Typical values at V_s= 13.5V, T_j= 25°C; index “x” means “number of channel 1 to 8”.

Parameter

Symbol

Values

Typ. Max.

1.4

Unit Note /

Test Condition

Number

Min.

Initial peak short circuit current limit I_LSCPx

A

T_j= 25°C

5.0.14

V_LS=V_S=V_INx= 30V;

t

_mx= 700µs

0.7

A

T_j= 125°C

5.0.15

V_LS=V_S=V_INx= 30V;

t

_mx= 700µs

Repetitive short circuit current

limitT_j= T_jTrip; see timing diagrams

I_LSCRx

1.1

A

V

_INx= 5.0V;

5.0.16

5.0.17

5.0.18

5.0.19

5.0.20

Output clamp at V_OUTx= V_S- V_DSCLxV_DSCLx47

(inductive load switch off)

53

60

V

I_OUTx= 4mA;

V_LS=30V

Overvoltage protection

V_SAZ

T_jTrip

T_HYS

47

V

I_S= 4mA

V_LS=30V

Thermal overload

trip temperature

135

°C

K

Thermal hysteresis

10

Reverse Battery³⁾

Continuous reverse battery voltage V_SREV

45

V

5.0.21

Forward voltage of the drain-

source reverse diode

V_FDSx

1.2

I

_FDS= 1.25A; V_IN= 0V 5.0.22

Input interface; pin INx

Input turn-ON threshold voltage

V_INONx

2.2

V

LS = L;

CMOS mode

5.0.23

5.0.24

5.0.25

5.0.26

Input turn-OFF threshold voltage V_INOFFx

Input turn-ON threshold voltage V_INONx

Input turn-OFF threshold voltage V_INOFFx

0.8

LS = L;

CMOS mode

V

_ST/ 2 + 1

LS = H or open;

ratiometric mode

V

_ST/ 2 - 1

LS = H or open;

ratiometric mode

Input threshold hysteresis

Off state input current

V_INHYSx

I_INOFFx

0.3

V

5.0.27

5.0.28

8

µA

LS = L;

CMOS mode

V

_INx= 0.8V

On state input current

Off state input current

On state input current

I_INONx

70

µA

µs

LS = L;

CMOS mode

5.0.29

5.0.30

5.0.31

5.0.32

V

_INx= 2.2V

I_INOFFx80

LS = H or open;

ratiometric mode

V_INx= V_ST/ 2 - 1

I_INONx

260

LS = H or open;

ratiometric mode

V_INx= V_ST/ 2 + 1

Input switch ON delay time

Data Sheet

t_dON

150

340

11

Rev 1.01, 2014-05-19

ITS42008-SB-D

Electrical Characteristics

Table 4

V_S= 15V to 30V; Tj = -25°C to 125°C; V_LS= 0V; all voltages with respect to ground, currents

flowing into the device unless otherwise specified in chapter “Block Diagram and Terms”.

Typical values at V_s= 13.5V, T_j= 25°C; index “x” means “number of channel 1 to 8”.

Parameter

Symbol

Values

Unit Note /

Test Condition

Number

Min.

Typ. Max.

Input resistance

R_INx

2

3

5

kΩ

5.0.33

Input interface; pin LS

Pull down resistance

R_LS

300

800

3

kΩ

V_LS=V_S=15V

5.0.34

Status output (current source); pin ST

Status output current

I_ST

2

4

mA

µA

V

_ST= 5V

V_LS=V_S=30V

V_ST= 0V;

5.0.35

5.0.36

Status leakage current

I_STLK

- 2

T_j< 135°C;

V_LS=V_S=30V

1) Timing values only with high slewrate input signal; otherwise slower.

2) Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet.

Fault conditions are considered as “outside” normal operating range. Protection functions are not designed for continuous

repetitive operation.

3) Requires a 150W resistor in GND connection. The reverse load current trough the intrinsic drain-source diode of the power-

M

Data Sheet

12

Rev 1.01, 2014-05-19

ITS42008-SB-D

Typical Performance Graphs

6

Typical Performance Graphs

Typical Characterisitics

Transient Thermal Impedance Z_thJAversus

Pulse Time t_p@ 6cm² heatsink area

Pulse Time t_p@ min footprint

D = t_p/ T

On-Resistance R_DSONxversus

Junction Temperature T_j

On-Resistance R_DSONxversus

Supply Voltage V_S

250

200

150

100

50

300

250

200

150

100

50

T_j=−40°C;I_L=0.5A

T_j=25°C;I_L=0.5A

T_j=125°C;I_L=0.5A

V_s=15V;V_INx=5V;V_LS=0V

0

−40 −25

0

10

0

25

50

T_j[°C]

75

100

125

20

30

V_s[V]

40

50

Data Sheet

13

Rev 1.01, 2014-05-19

ITS42008-SB-D

Typical Performance Graphs

Typical Characterisitics

Switch ON Time t_ONxversus

Junction Temperature T_j

Switch OFF Time t_OFFxversus

Junction Temperature T_j

80

70

60

50

40

30

20

10

0

100

90

80

70

60

50

40

30

20

10

0

V_s=15V;R_Lx=47Ω

75 100

V_s=15V;R_Lx=47Ω

75 100 125

−25

0

25

50

125

−25

0

25

50

T[°C]

j

ON Slewrate SR_ONxversus

Junction Temperature T_j

OFF Slewrate SR_OFFxversus

Junction Temperature T_j

1.4

1.2

1

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

0.8

0.6

0.4

0.2

V_s=15V;R_Lx=47Ω

75 100 125

V_s=15V;R_Lx=47Ω

0

−25

0

25

50

75

100

125

−25

0

25

50

T_j[°C]

Data Sheet

14

Rev 1.01, 2014-05-19

ITS42008-SB-D

Typical Performance Graphs

Typical Characterisitics

Standby Current I_SSTBversus

Junction Temperature T_j

Output Leakage current I_OUTLKxversus

Junction Temperature T_j

50

45

40

35

30

25

20

15

10

5

4

3.5

3

2.5

2

1.5

1

0.5

V_INx=0V;V_s=30V;V_outx=0V

V_s=30V;V_INx=0V;V_OUTx=0V

0

−25

0

−25

0

25

50

75

100

125

0

25

50

75

100

125

T_j[°C]

Initial Peak Short Circuit Current Limt I_LSCPxversus Initial Short Circuit Shutdown time t_dONversus

Junction Temperature T_j

2

1.8

1.6

1.4

1.2

1

500

450

400

350

300

250

200

150

100

50

0.8

0.6

0.4

0.2

0

V_s=24V

100

T_j=25°C

0

10

−25

0

25

50

75

125

20

30

40

50

T_j[°C]

V_s[V]

Data Sheet

15

Rev 1.01, 2014-05-19

ITS42008-SB-D

Typical Performance Graphs

Typical Characterisitics

Input Current Consumption I_INxversus

Junction Temperature T_j

Input Current Consumption I_INxversus

Input voltage V_IN

50

45

40

35

30

25

20

15

10

50

45

40

35

30

25

20

15

10

T_j=−25°C;V_s=15V

V

_INx≤0.7V;V_s=15V

_INx≥2.2V;V_s=15V

T_j=25°C;V_s=15V

T_j=125°C;V_s=15V

5

0

V

0

−25

0

25

50

75

100

125

0

5

10

15

T_j[°C]

V_INx[V]

Input Current Consumption I_INxversus

Junction Temperature T_j

Input Current Consumption I_INxversus

Input voltage V_IN

180

160

140

120

100

80

200

180

160

140

120

100

80

60

40

T_j=−25°C;V_LS=V_s=30V

20

V

_INx≤0.4 V_s;V_s=30V

_INx≥0.6 V_s;V_s=30V

T_j=25°C;V_LS=V_s=30V

T_j=125°C;V_LS=V_s=30V

20

0

V

0

−25

0

25

50

75

100

125

0

5

10

15

20

25

30

T_j[°C]

V_INx[V]

Data Sheet

16

Rev 1.01, 2014-05-19

ITS42008-SB-D

Typical Performance Graphs

Typical Characterisitics

Input Threshold voltage V_INH,Lxversus Junction

Temperature T_j

Input Threshold voltage V_INH,LxversusSupply

Voltage V_S

2

1.8

1.6

1.4

1.2

1

2

1.8

1.6

1.4

1.2

1

0.8

0.6

0.4

0.8

0.6

0.4

OFF;T_j=25°C

OFF;V_s=15V

ON;V_s=15V

0.2

0

0.2

ON;T_j=25°C

0

10

−25

0

25

50

75

100

125

20

30

40

50

T_j[°C]

V_s[V]

Input Threshold voltage V_INH,Lxversus Junction

Temperature T_j

Input Threshold voltage V_INH,LxversusSupply

Voltage V_S

16

15.5

15

25

20

15

14.5

14

13.5

13

10

12.5

OFF;T_j=25°C;V_LS=V_s

OFF;V_LS=V_s=30V

ON;V_LS=V_s=30V

ON;T_j=25°C;V_LS=V_s

12

−25

5

10

0

25

50

75 100

125

20

30

40

50

T_j[°C]

V_s[V]

Data Sheet

17

Rev 1.01, 2014-05-19

ITS42008-SB-D

Typical Performance Graphs

Typical Characterisitics

Max. allowable Load Inductance L versus Load

current I_Lx

Max. allowable Inductive single pulse Switch-off

Energy E_ASversus Load current I_Lx

45

3.5

All channels ON

T_jstart=125°C;V_s=24V;R_L=0Ω

T_jstart=125°C;V_s=24V

40

35

30

25

20

15

10

5

3

2.5

2

1.5

1

0.5

0

0.3

0

0.3

0.4

0.5

I_Lx[A]

0.6

0.7

0.4

0.5

I_Lx[A]

0.6

0.7

Status Output Current I_STversus

Supply Voltage V_S

Internal pull down Resistor R_LSat pin LS versus

Supply Voltage V_S

3

2.95

2.9

1.5

2.85

1

V_S=15V

V

_ST=5V

2.8

2.75

2.7

T_j=135°C

0.5

2.65

2.6

T_j=−25°C;V_LS=V_s=15V

T_j=25°C;V_LS=V_s=15V

2.55

V_s=15V;V_ST=5V;T=135°C

T_j=125°C;V_LS=V_s=15V

j

2.5

10

0

10

15

20

25

30

35

40

45

20

30

40

50

V_s[V]

V_S

Data Sheet

18

Rev 1.01, 2014-05-19

ITS42008-SB-D

Application Information

7

Application Information

7.1

Application Diagram

The following information is given as a hint for the implementation of the device only and shall not be regarded as

a description or warranty for a certain functionality, condition or quality of the device.

Electronic Control Unit

Wire

Harness

TAB

ITS42008-SB-D

GND

1

2

4

+V_S

19

+V_S

Channel 1

ECU

GND

C_S

GND3

Biasing

Supervision

5

14

15

16

17

18

220nF

LS

Logic

Input

Levelshifter

3

20

6

Protection

and

Gate -Control

ESD

Protection

ST

Overtemperature

Diagnosis

Wire

Harness

IN1

36 OUT1

35

Temperature

Sensor

R_IN1

C_OUT

1nF

Complex

LOAD

IN2

IN3

IN4

IN5

IN6

IN7

IN8

34 OUT2

33

7

8

Channel 2

Channel 3

R_IN2

R_IN3

R_IN4

R_IN5

R_IN6

32 OUT3

31

GND2

GND1

ECU

GND

30 OUT4

29

9

Channel 4

Channel 5

28 OUT5

27

10

11

12

13

26 OUT6

25

Channel 6

Channel 7

Channel 8

24 OUT7

23

R_IN7

R_IN8

22 OUT8

21

Figure 4

Application Diagram

The ITS42008-SB-D can be connected directly to the battery of a supply network. It is recommended to place a

ceramic capacitor (e.g. C_S= 220nF) between supply and GND of the ECU to avoid line disturbances. Wire harness

inductors/resistors are sketched in the application circuit above.

The complex load (resistive, capacitive or inductive) must be connected to the output pin OUT.

A built-in current limit protects the device against destruction.

The ITS42008-SB-D can be switched on and off with ground related standard logic signal at pin INx if the level

programming pin LS is set to L.

If LS is connected to the supply voltage V_Sthe input threshold is set to ~ 50% of V_S.

To achieve a higher robustness it is recommended to connect the LS pin to GND or Supply voltage.

If the pin LS is left open the thresholds are automatically set to CMOS level caused by an internal high ohmic pull

down resistor to GND.

In standby mode (all inputs INx=L) the ITS42008-SB-D is deactivated with very low current consumption.

The output voltage slope is controlled during on and off transistion to minimize emissions. Only a small ceramic

capacitor COUT=1nF is recommended to attenuate RF noise.

Data Sheet

19

Rev 1.01, 2014-05-19

ITS42008-SB-D

Application Information

In the following chapters the main features, some typical waverforms and the protection behaviour

of the ITS42008-SB-D is shown. For further details please refer to application notes on the Infineon homepage.

7.2

Diagnosis Description

For diagnostic purpose the device provides a digital output pin ST in order to indicate fault conditions.

The status output (ST) of the ITS42008-SB-D is a high voltage current source.

In “normal” operation mode (no overtemperature) the current source is switched OFF. An internal pull down

resistor pulls pin ST down to GND. In case of overtemperature the current source is activated. To limit the voltage

at pin ST an external zenerdiode to GND must be added.

The following truth table defines the status output.

Table 5

Truth Table of diagnosis feature

Device Operation

INx

OUTx current Comment

source

at ST

Normal Operation

Short circuit to GND

Undervoltage at V_S

Overtemperature

L

H

L

OFF

ON

H

L

H

L

H

L

H

toggeling with restart

Data Sheet

20

Rev 1.01, 2014-05-19

ITS42008-SB-D

Application Information

7.3

Special Feature Description

Supply over voltage:

Supply reverse voltage:

ITS42008-SB-D

V_S

Over

temp

Over

temp

I_Rev

I_ST

ST

20

X

20

X

ZD_SAZ

R_IN

V_Control

R_IN

INx

OUTx

R_LS

X

R_LS

X

ZD_IN

I_IN

Level

control

Level

control

I_Rev1

R_ST2

19

3

19

3

LS

GND

Z_L

R_GND

R_ST

R_GND

I_Rev2

If over-voltage is applied to the V_S-Pin:

Voltage is limited to V_ZDSAZ; current can be calculated:

I_ZDSAZ= (V_S– V_ZDSAZ) / R_GND

If reverse voltage is applied to the device:

1.) Current via load resistance RL:

I_Rev1= (V_Rev– V_FDS) / R_L

A typical value for RGND is 150Ω.

In case of ESD pulse on the input pin there is in both

2.) Current via Input pin IN and dignostic pin ST :

I_Rev2= I_ST+I_IN

To protect the control device the current must be limited

with the extrernal series resistors.

Both currents will sum up to:

polarities a peak current I_INpeak~ V_ESD/ R_IN

I_Rev= I_Rev1+ I_Rev2

Drain-Source power stage clamper V_DSCL

:

Energy calculation:

ITS42008-SB-D

V_S

Over

temp

Over

temp

I_ST

E_Batt

ST

20

X

20

X

ZD_SAZ

E_Load

R_IN

INx

OUTx

R_LS

X

R_LS

X

ZD_IN

I_IN

ZD_IN

I_IN

Level

control

I_L

E_L

E_R

L_L

R_L

19

3

19

3

LS

GND

L_L

R_GND

When an inductive load is switched off a current path must be

established until the current is sloped down to zero (all energy

removed from the inductive load). For that purpose the series

combination Z_DSCLis connected between Gate and Drain of the

power DMOS acting as an active clamp.

Energy stored in the load inductance is given by :

E_L= I_L²*L/2

While demagnetizing the load inductance the energy

dissipated by the Power-DMOS is:

E_AS= E_S+ E_L– E_R

When the device is switched off, the voltage at OUT turns

negative until V_DSCLis reached.

With an approximate solution for R_L=0Ω:

The voltage on the inductive load is the difference between

V_DSCLand V_S.

E_AS= ½ * L * I_L² * {(1- V_S/ (V_S- V_DSCL

)

Figure 5

Special feature description

Data Sheet

21

Rev 1.01, 2014-05-19

ITS42008-SB-D

Application Information

7.4

Typical Application Waveforms

General Input Output waveforms:

Waveforms switching a resistive load:

V_IN

H

L

t

V_S

V_OUT

+V_S

V_DS

90%

70%

SR_OFF= dV/dt

V_OUT

40%

30%

SR_ON= dV/dt

10%

0

t_ON

t_OFF

t_dON

t

I_L

0

t

I_ST

ON

I_ST

ON

OFF

ON

OFF

ON

OFF

ON

OFF

Waveforms switching a capacitive load:

Waveforms switching an inducitive load :

V_IN

H

L

t

V_OUT

~ V_S

0

t

I_L

I_LSC

I_L

0

t

I_ST

ON

I_ST

ON

OFF

t

OFF

ON

OFF

ON

OFF

ON

OFF

ON

Figure 6

Data Sheet

Typical application waveforms of the ITS42008-SB-D

22

Rev 1.01, 2014-05-19

ITS42008-SB-D

Application Information

7.5

Protection Behavior

Overtemperature concept:

Overtemperature behavior:

V_IN

H

L

T_jRestart

T_jTrip

t

V_OUT

ON

heating

up

0

t

T_J

T_jTrip

OFF

cooling

down

T_J

T_HYS

Device

Status

T_HYS

Normal

Toggling

Overtemperature

t

I_ST

ON

OFF

ON

OFF

ON

OFF

Waveforms turn on into a short circuit :

Waveforms short circuit during on state :

V_IN

H

V_IN

H

L

t

V_OUT

0

t

I_peak

I_L

I_LSCP

Controlled

by the

current limit

by the

current limit

I_LSCR

circuit

t_m

t_SCOFF

0

t

I_ST

ON

I_ST

ON

OFF

t

Normal

operation

OFF

OUT shorted to GND

Overloaded

Shut down by overtemperature and

restart by cooling (toggling)

Shut down by overtemperature and

restart by cooling (toggling)

Figure 7

Protective behaviour of the ITS42008-SB-D

Data Sheet

23

Rev 1.01, 2014-05-19

ITS42008-SB-D

Package outlines and footprint

8

Package outlines and footprint

Figure 8

PG-DSO-36 (Plastic Dual Small Outline Package, RoHS-Compliant)

To meet the world-wide customer requirements for environmentally friendly products and to be compliant with

government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-

free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020

Data Sheet

24

Rev 1.01, 2014-05-19

ITS42008-SB-D

Revision History

9

Revision History

Revision

Date

Changes

v 1.01

14-05-19

Datasheet release

Editorial Change on Page 11

Temperature conditions for lines 5.0.14 and 5.0.15 were corrected to 25°C and

125°C respectively

v 1.0

12-09-01

Datasheet release

Trademarks of Infineon Technologies AG

AURIX™, C166™, CanPAK™, CIPOS™, CIPURSE™, EconoPACK™, CoolMOS™, CoolSET™,

CORECONTROL™, CROSSAVE™, DAVE™, DI-POL™, EasyPIM™, EconoBRIDGE™, EconoDUAL™,

EconoPIM™, EconoPACK™, EiceDRIVER™, eupec™, FCOS™, HITFET™, HybridPACK™, I²RF™,

ISOFACE™, IsoPACK™, MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OptiMOS™, ORIGA™,

POWERCODE™; PRIMARION™, PrimePACK™, PrimeSTACK™, PRO-SIL™, PROFET™, RASIC™,

ReverSave™, SatRIC™, SIEGET™, SINDRION™, SIPMOS™, SmartLEWIS™, SOLID FLASH™, TEMPFET™,

thinQ!™, TRENCHSTOP™, TriCore™.

Other Trademarks

Advance Design System™ (ADS) of Agilent Technologies, AMBA™, ARM™, MULTI-ICE™, KEIL™,

PRIMECELL™, REALVIEW™, THUMB™, µVision™ of ARM Limited, UK. AUTOSAR™ is licensed by AUTOSAR

development partnership. Bluetooth™ of Bluetooth SIG Inc. CAT-iq™ of DECT Forum. COLOSSUS™,

FirstGPS™ of Trimble Navigation Ltd. EMV™ of EMVCo, LLC (Visa Holdings Inc.). EPCOS™ of Epcos AG.

FLEXGO™ of Microsoft Corporation. FlexRay™ is licensed by FlexRay Consortium. HYPERTERMINAL™ of

Hilgraeve Incorporated. IEC™ of Commission Electrotechnique Internationale. IrDA™ of Infrared Data

Association Corporation. ISO™ of INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLAB™ of

MathWorks, Inc. MAXIM™ of Maxim Integrated Products, Inc. MICROTEC™, NUCLEUS™ of Mentor Graphics

Corporation. MIPI™ of MIPI Alliance, Inc. MIPS™ of MIPS Technologies, Inc., USA. muRata™ of MURATA

MANUFACTURING CO., MICROWAVE OFFICE™ (MWO) of Applied Wave Research Inc., OmniVision™ of

OmniVision Technologies, Inc. Openwave™ Openwave Systems Inc. RED HAT™ Red Hat, Inc. RFMD™ RF

Micro Devices, Inc. SIRIUS™ of Sirius Satellite Radio Inc. SOLARIS™ of Sun Microsystems, Inc. SPANSION™

of Spansion LLC Ltd. Symbian™ of Symbian Software Limited. TAIYO YUDEN™ of Taiyo Yuden Co.

TEAKLITE™ of CEVA, Inc. TEKTRONIX™ of Tektronix Inc. TOKO™ of TOKO KABUSHIKI KAISHA TA. UNIX™

of X/Open Company Limited. VERILOG™, PALLADIUM™ of Cadence Design Systems, Inc. VLYNQ™ of Texas

Instruments Incorporated. VXWORKS™, WIND RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of Diodes

Zetex Limited.

Last Trademarks Update 2011-11-11

Data Sheet

25

Rev 1.01, 2014-05-19

Edition 2014-05-19

Published by

Infineon Technologies AG

81726 Munich, Germany

Legal Disclaimer

The information given in this document shall in no event be regarded as a guarantee of conditions or

characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any

information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties

and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights

of any third party.

Information

For further information on technology, delivery terms and conditions and prices, please contact the nearest

Infineon Technologies Office (www.infineon.com).

Warnings

Due to technical requirements, components may contain dangerous substances. For information on the types in

question, please contact the nearest Infineon Technologies Office.

The Infineon Technologies component described in this Data Sheet may be used in life-support devices or systems

and/or automotive, aviation and aerospace applications or systems only with the express written approval of

Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-

support automotive, aviation and aerospace device or system or to affect the safety or effectiveness of that device

or system. Life support devices or systems are intended to be implanted in the human body or to support and/or

maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user

or other persons may be endangered.


型号：	ITS42008-SB-D
厂家：	Infineon
描述：	高边功率开关，集成了垂直功率 FET，提供嵌入式保护和诊断功能。开关
文件：	总26页 (文件大小：2029K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

ITS42008-SB-D [INFINEON]

相关型号：

ITS42008SBDAUMA1

ITS4200S-ME-N

ITS4200S-ME-O

ITS4200S-SJ-D

ITS4200SMENHUMA1

ITS4200SMEOHUMA1

ITS4200SMEPHUMA1

ITS428L2

ITS428L2ATMA1

ITS428L2CUMA1

ITS428L2_08

ITS42K5D-LD-F