JAN2N7484 [INFINEON]
Power Field-Effect Transistor, N-Channel, Metal-oxide Semiconductor FET;
| 型号： | JAN2N7484 |
| 厂家： | 
Infineon |
| 描述： | Power Field-Effect Transistor, N-Channel, Metal-oxide Semiconductor FET |
| 文件： | 总22页 (文件大小：203K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
INCH-POUND
The documentation and process conversion
measures necessary to comply with this revision
shall be completed by 21 August 2010.
MIL-PRF-19500/702C
21 May 2010
SUPERSEDING
MIL-PRF-19500/702B
30 May 2007
PERFORMANCE SPECIFICATION SHEET
SEMICONDUCTOR DEVICE, FIELD EFFECT RADIATION HARDENED
(TOTAL DOSE AND SINGLE EVENT EFFECTS)
TRANSISTOR, N-CHANNEL, SILICON, TYPES 2N7482T3, 2N7483T3, AND 2N7484T3,
JANTXVR, F, G, AND H AND JANSR, F, G, AND H
This specification is approved for use by all Departments
and Agencies of the Department of Defense.
The requirements for acquiring the product described herein shall consist of
this specification sheet and MIL-PRF-19500.
1. SCOPE
1.1 Scope. This specification covers the performance requirements for an N-Channel, enhancement-mode,
MOSFET, radiation hardened (total dose and single event effects (SEE)), power transistor. Two levels of product
assurance are provided for each device type as specified in MIL-PRF-19500, with avalanche energy maximum rating
(EAS) and maximum avalanche current (IAS). See 6.5 for JANHC and JANKC die versions.
1.2 Physical dimensions. See figure 1, (TO-257AA, T3).
1.3 Maximum ratings. TA = +25°C, unless otherwise specified.
Type
PT (1)
TC =
+25°C
PT
TA =
+25°C
VDS
VDG
VGS
ID1 (3) (4) ID2 (3) (4)
IS
IDM (5)
A (pk)
TJ
and
TSTG
R θJC (2)
TC =
+100°C
TC = +25°C
W
W
V dc
V dc
V dc
A dc
A dc
A dc
°C/W
°C
2N7482T3
2N7483T3
2N7484T3
75
75
75
1.56
1.56
1.56
30
60
30
60
±20
±20
±20
18
18
18
18
18
14
18
18
18
72
72
72
1.67
1.67
1.67
-55
to
+150
100
100
(1) Derate linearly 0.6 W/°C for TC > +25°C.
(2) See figure 2, thermal impedance curves.
(3) The following formula derives the maximum theoretical ID specs. ID is limited to 18A by package
and device construction.
-
TJM TC
( on ) at
TJM
=
ID
(
)
x
(
)
RθJC
RDS
(4) See figure 3, maximum drain current graph.
(5) IDM = 4 X ID1, as defined in note (3).
* Comments, suggestions, or questions on this document should be addressed to Defense Supply Center,
Columbus, ATTN: DSCC-VAC, P.O. Box 3990, Columbus, OH 43218-3990, or emailed to
Semiconductor@dscc.dla.mil. Since contact information can change, you may want to verify the currency of
this address information using the ASSIST Online database at https://assist.daps.dla.mil/.
AMSC N/A
FSC 5961
MIL-PRF-19500/702C
1.4 Primary electrical characteristics at TC = +25°C.
Type
Min V(BR)DSS
VGS = 0
VGS(TH)1
VDS ≥ VGS
Max IDSS1
VGS = 0
VDS = 80 percent of
rated VDS
Max rDS(on)
VGS = 12V, ID = ID2
(1)
EAS
mJ
ID = 1.0 mA dc
ID = 1.0mA dc
TJ = +25°C TJ = +150°C
V dc
V dc
µA dc
Ω
Ω
Min
2.0
Max
4.0
2N7482T3
2N7483T3
2N7484T3
30
60
177
110
87
10
10
10
0.030
0.040
0.070
0.060
0.080
0.160
2.0
2.0
4.0
4.0
100
(1) Pulsed (see 4.5.1).
2. APPLICABLE DOCUMENTS
2.1 General. The documents listed in this section are specified in sections 3, 4, or 5 of this specification. This
section does not include documents cited in other sections of this specification or recommended for additional
information or as examples. While every effort has been made to ensure the completeness of this list, document
users are cautioned that they must meet all specified requirements of documents cited in sections 3, 4, or 5 of this
specification, whether or not they are listed.
2.2 Government documents.
2.2.1 Specifications, standards, and handbooks. The following specifications, standards, and handbooks form a
part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are
those cited in the solicitation or contract.
DEPARTMENT OF DEFENSE SPECIFICATIONS
MIL-PRF-19500
DEPARTMENT OF DEFENSE STANDARDS
MIL-STD-750 Test Methods for Semiconductor Devices.
-
Semiconductor Devices, General Specification for.
-
* (Copies of these documents are available online at https://assist.daps.dla.mil/quicksearch/ or
https://assist.daps.dla.mil/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D,
Philadelphia, PA 19111-5094.)
2.3 Order of precedence. Unless otherwise noted herein or in the contract, in the event of a conflict between the
text of this document and the references cited herein, the text of this document takes precedence. Nothing in this
document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained.
2
MIL-PRF-19500/702C
Dimensions
Inches Millimeters
Min Max
10.41 10.92
Symbol
Min
Max
.430
.200
.035
.625
BL
CH
LD
.410
.190
.025
.500
4.83
0.64
5.08
0.89
LL
12.70 15.88
3.05
TO-257
LO
.120
.100 BSC
LS
2.54
MHD
MHO
TL
.140
.150
.537
.665
.045
.420
3.56
3.81
.527
.645
.035
.410
13.39 13.64
16.38 16.89
*
TT
.889
10.41 10.67
Drain
1.14
TW
TERM
1
TERM
2
TERM
3
Source
Gate
NOTES:
1. Dimensions are in inches.
2. Millimeters are given for general information only.
3. All terminals are isolated from case.
4. In accordance with ASME Y14.5M, diameters are equivalent to φx symbology.
5. Protrusion thickness of ceramic eyelets included in dimension LL.
* FIGURE 1. Dimensions and configuration (TO-257AA, T3).
3
MIL-PRF-19500/702C
3. REQUIREMENTS
3.1 General. The individual item requirements shall be as specified in MIL-PRF-19500 and as modified herein.
3.2 Qualification. Devices furnished under this specification shall be products that are manufactured by a
manufacturer authorized by the qualifying activity for listing on the applicable qualified manufacturer's list (QML)
before contract award (see 4.2 and 6.3).
3.3 Abbreviations, symbols, and definitions. Abbreviations, symbols, and definitions used herein shall be as
specified in MIL-PRF-19500.
3.4 Interface and physical dimensions. The interface and physical dimensions shall be as specified in
MIL-PRF-19500 and on figure 1 (TO-257AA, T3) herein.
3.4.1 Lead finish. Unless otherwise specified, lead finish shall be solderable in accordance with
MIL-PRF-19500, MIL-STD-750, and herein. Where a choice of lead finish is desired, it shall be specified in the
acquisition document (see 6.2).
3.4.2 Internal construction. Multiple chip construction shall not be permitted.
3.5 Electrostatic discharge protection. The devices covered by this specification require electrostatic discharge
protection.
3.5.1 Handling. MOS devices must be handled with certain precautions to avoid damage due to the accumulation
of static charge. However, the following handling practices are recommended (see 3.5).
a. Devices should be handled on benches with conductive handling devices.
b. Ground test equipment, tools, and personnel handling devices.
c. Do not handle devices by the leads.
d. Store devices in conductive foam or carriers.
e. Avoid use of plastic, rubber, or silk in MOS areas.
f. Maintain relative humidity above 50 percent if practical.
g. Care should be exercised during test and troubleshooting to apply not more than maximum rated
voltage to any lead.
h. Gate must be terminated to source, R ≤ 100 kΩ, whenever bias voltage is to be applied drain to source.
3.6 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance
characteristics are as specified in 1.3, 1.4, and table I herein.
3.7 Electrical test requirements. The electrical test requirements shall be as specified in table I.
3.8 Marking. Marking shall be in accordance with MIL-PRF-19500.
3.9 Workmanship. Semiconductor devices shall be processed in such a manner as to be uniform in quality and
shall be free from other defects that will affect life, serviceability, or appearance.
4
MIL-PRF-19500/702C
4. VERIFICATION
4.1 Classification of inspections. The inspection requirements specified herein are classified as follows:
a. Qualification inspection (see 4.2).
b. Screening (see 4.3).
c. Conformance inspection (see 4.4, table I and II).
* 4.2 Qualification inspection. Qualification inspection shall be in accordance with MIL-PRF-19500 and as specified
herein.
4.2.1 Group E qualification. Group E inspection shall be performed for qualification or re-qualification only. In
case qualification was awarded to a prior revision of the specification sheet that did not request the performance of
table III tests, the tests specified in table III herein that were not performed in the prior revision shall be performed on
the first inspection lot of this revision to maintain qualification.
4.2.1.1 SEE. Design capability shall be tested on the initial qualification and thereafter whenever a major die
design or process change is introduced. See design safe operation area figures herein. End-point measurements
shall be in accordance with table III.
5
MIL-PRF-19500/702C
4.3 Screening (JANS and JANTXV). Screening shall be in accordance with table E-IV of MIL-PRF-19500, and as
specified herein. The following measurements shall be made in accordance with table I herein. Devices that exceed
the limits of table I herein shall not be acceptable.
Screen (see table E-IV
of MIL-PRF-19500)
(1) (2)
Measurement
JANS
JANTXV
(3)
(3)
Gate stress test (see 4.3.1)
Gate stress test (see 4.3.1)
Method 3470 of MIL-STD-750, EAS test
(see 4.3.2)
Method 3470 of MIL-STD-750, EAS test
(see 4.3.2)
(3) 3c
9
Method 3161 of MIL-STD-750, thermal
impedance (see 4.3.3)
Method 3161 of MIL-STD-750, thermal
impedance (see 4.3.3)
Subgroup 2 of table I herein
Not applicable
IDSS1, IGSSF1, and IGSSR1 as a minimum
10
11
Method 1042 of MIL-STD-750, test
condition B
Method 1042 of MIL-STD-750, test
condition B
IGSSF1, IGSSR1, IDSS1, rDS(ON)1, VGS(TH)1
subgroup 2 of table I herein.
,
IGSSF1, IGSSR1, IDSS1, rDS(ON)1, VGS(TH)1
subgroup 2 of table I herein.
,
∆IGSSF1 = ±20 nA dc or ±100 percent of
initial value, whichever is greater.
∆IGSSR1 = ±20 nA dc or ±100 percent of
initial value, whichever is greater.
∆IDSS1 = ±10 µA dc or ±100 percent of
initial value, whichever is greater.
12
13
Method 1042 of MIL-STD-750, test
condition A
Method 1042 of MIL-STD-750, test
condition A
Subgroups 2 and 3 of table I herein,
∆IGSSF1 = ±20 nA dc or ±100 percent of
initial value, whichever is greater.
∆IGSSR1 = ±20 nA dc or ±100 percent of
initial value, whichever is greater.
∆IDSS1 = ±10 µA dc or ±100 percent of
initial value, whichever is greater.
∆rDS(ON)1 = ±20 percent of initial value.
∆VGS(TH)1 = ±20 percent of initial value.
Subgroups 2 and 3 of table I herein,
∆IGSSF1 = ±20 nA dc or +100 percent of
initial value, whichever is greater.
∆IGSSR1 = ±20 nA dc or ±100 percent of
initial value, whichever is greater.
∆IDSS1 = ±10 µA dc or ±100 percent of
initial value, whichever is greater.
∆rDS(ON)1 = ±20 percent of initial value.
∆VGS(TH)1 = ±20 percent of initial value.
(1) At the end of the test program, IGSSF1, IGSSR1, and IDSS1 are measured.
(2) An out-of-family program to characterize IGSSF1, IGSSR1, IDSS1, and VGS(th)1 shall be invoked.
(3) Shall be performed anytime after temperature cycling, screen 3a; and does not need to be repeated in
screening requirements.
6
MIL-PRF-19500/702C
4.3.1 Gate stress test. Apply VGS = 24 V, minimum for t = 250 µS, minimum.
4.3.2 Single pulse avalanche energy (EAS).
a.
b.
Peak current.................................................................. IAS = ID1.
V
− V
Inductance..................................................................... L =
mH minimum.
DD
2EAS
BR
2
VBR
I
D1
c.
d.
Gate to source resistor RGS: ......................................... 25 Ω ≤ RGS ≤ 200 Ω.
Supply voltage............................................................... VDD = 25 V dc, except VDD = 50 V dc for
2N7484T3.
e.
f.
Initial case temperature................................................. TC = +25° C, -5° C, +10° C.
Gate voltage, ................................................................ VGS = 12 V dc.
Number of pulses to be applied: ................................... 1 pulse minimum.
g.
4.3.3 Thermal impedance. The thermal impedance measurements shall be performed in accordance with method
3161 of MIL-STD-750 using the guidelines in that method for determining IM, IH, tH, tSW, (and VH where appropriate).
Measurement delay time (tMD) = 70 µs max. See table III, group E, subgroup 4 herein.
4.4 Conformance inspection. Conformance inspection shall be in accordance with MIL-PRF-19500.
4.4.1 Group A inspection. Group A inspection shall be conducted in accordance with table E-V of
MIL-PRF-19500 and table I herein.
4.4.2 Group B inspection. Group B inspection shall be conducted in accordance with the conditions specified for
subgroup testing in table E-VIA (JANS) and table E-VIB (JANTXV) of MIL-PRF-19500, and as follows. Electrical
measurements (end-points) shall be in accordance with table I, subgroup 2 herein.
4.4.2.1 Group B inspection, table E-VIA (JANS) of MIL-PRF-19500.
Subgroup Method
Condition
B3
B3
B4
1051
2077
1042
Test condition G, 100 cycles.
SEM (scanning electron microscope).
Intermittent operation life, condition D, 2,000 cycles. No heat sink or forced-air
cooling on the device shall be permitted during the on cycle. ton = 30 seconds
minimum.
B5
B5
B5
1042
1042
2037
Accelerated steady-state gate bias, condition B, VGS = rated; TA = +175°C, t = 24
hours minimum; or TA = +150°C, t = 48 hours minimum.
Accelerated steady-state reverse bias, condition A, VDS = rated; TA = +175°C,
t = 120 hours minimum; or TA = +150°C, t = 240 hours minimum.
Bond strength, test condition A.
7
MIL-PRF-19500/702C
4.4.2.2 Group B inspection, table E-VIB (JANTXV) of MIL-PRF-19500.
Subgroup Method
Condition
B2
B3
1051
1042
Test condition G, 25 cycles.
Intermittent operation life, condition D, 2,000 cycles. No heat sink or forced-air
cooling on the device shall be permitted during the on cycle. t = 30 seconds
on
minimum.
4.4.2.3 Group C inspection. Group C inspection shall be conducted in accordance with the conditions specified for
subgroup testing in table E-VII of MIL-PRF-19500 and as follows. Electrical measurements (end-points) shall be in
accordance with table I, subgroup 2 herein.
Subgroup Method
Condition
C2
C5
2036
3161
Test condition A; weight = 10 pounds; t = 10 s.
Thermal resistance, see 4.3.3, R
θJC(max)
= 1.67°C/W.
C6
1042
Intermittent operation life, condition D, 6,000 cycles. No heat sink or forced-air
cooling on the device shall be permitted during the on cycle. t = 30 seconds
on
minimum.
4.4.3 Group D inspection. Group D inspection shall be conducted in accordance with table E-VIII of
MIL-PRF-19500 and table II herein.
4.4.4 Group E inspection. Group E inspection shall be conducted in accordance with the conditions specified for
subgroup testing in table E-IX of MIL-PRF-19500 and as specified in table III herein. Electrical measurements (end-
points) shall be in accordance with table I, subgroup 2 herein.
4.5 Methods of inspection. Methods of inspection shall be as specified in the appropriate tables and as follows.
4.5.1 Pulse measurements. Conditions for pulse measurement shall be as specified in section 4 of
MIL-STD-750.
8
MIL-PRF-19500/702C
TABLE I. Group A inspection.
MIL-STD-750
Inspection
1/
Limits
Symbol
Unit
Method
2071
Condition
Min
Max
Subgroup 1
Visual and
mechanical inspection
Subgroup 2
Thermal impedance
2/
3161
3407
See 4.3.3
Z θ
°C/W
JC
Breakdown voltage
drain to source
2N7482T3
VGS = 0, ID = 1 mA dc,
bias condition C
V (BR)DSS
30
60
100
V dc
V dc
V dc
2N7483T3
2N7484T3
Gate to source
voltage (threshold)
3403
3411
3411
3413
3421
VGS(TH)1
IGSSF1
IGSSR1
IDSS1
2.0
4.0
+100
-100
10
V dc
nA dc
nA dc
µA dc
VDS ≥ VGS
,
ID = 1 mA dc
Gate current
Gate current
Drain current
VGS = +20 V dc, bias condition C,
VDS = 0
VGS = -20 V dc, bias condition C,
VDS = 0
VGS = 0, bias condition C,
VDS = 80 percent of rated VDS
,
Static drain to source
on state resistance
2N7482T3
VGS = 12 V dc, condition A,
pulsed (see 4.5.1), ID = ID2
rDS(ON)1
0.030
0.040
0.070
Ω
Ω
Ω
2N7483T3
2N7484T3
Forward voltage
4011
VGS = 0, condition A, pulsed (see
4.5.1), ID = ID1
VSD
2N7482T3
2N7483T3
2N7484T3
1.2
1.2
1.2
V dc
V dc
V dc
See footnotes at end of table.
9
MIL-PRF-19500/702C
TABLE I. Group A inspection – Continued.
MIL-STD-750
Inspection 1/
Subgroup 3
Symbol
Limits
Min Max
Unit
Method
Condition
High temperature
operation
TC = TJ = +125°C
Gate current
Drain current
3411
3413
3421
VGS = ±20V dc, bias condition C,
VDS = 0
IGSS2
±200
nA dc
µA dc
VGS = 0, bias condition C,
VDS = 80 percent of rated VDS
IDSS2
25
Static drain to source on-
state resistance
2N7482T3
VGS = 12 V dc, condition A,
pulsed (see 4.5.1), ID = ID2
rDS(ON)3
0.050
0.070
0.140
Ω
Ω
Ω
2N7483T3
2N7484T3
Gate to source voltage
(threshold)
3403
VGS(TH)2
1.0
V dc
VDS ≥ VGS, ID = 1 mA dc
TC = TJ = -55°C
Low temperature
operation
Gate to source voltage
(threshold)
3403
3475
3472
VGS(TH)3
5.0
V dc
VDS ≥ VGS(TH)3, ID = 1 mA dc
Subgroup 4
Forward transconductance
2N7482T3
ID = ID2, VDD = 15 V dc (see 4.5.1)
gFS
16
16
13
S
S
S
2N7483T3
2N7484T3
Switching time test
Turn-on delay time
Rise time
ID = ID1, VGS = 12 V dc, RG = 7.5 Ω,
VDD = 50 percent of rated VDS
tD(on)
tr
tD(off)
tf
25
100
35
ns
ns
ns
ns
Turn-off delay time
Fall time
30
See footnotes at end of table.
10
MIL-PRF-19500/702C
TABLE I. Group A inspection – Continued.
Inspection
1/
MIL-STD-750
Symbol
Limits
Unit
Method
3474
Condition
Min
Max
Subgroup 5
Safe operating area
test (high voltage)
See figure 4,
tp = 10 ms min. VDS = 80
percent of max. rated VDS
Electrical
See table I, subgroup 2
measurements
Subgroup 6
Not applicable
Subgroup 7
Gate charge
3471
Condition B, ID = ID1, VGS = 12 V
dc, VDD = 50 percent of rated
VDS
On-state gate charge
2N7482T3
QG(ON)
65
45
50
nC
nC
nC
2N7483T3
2N7484T3
Gate to source
charge
QGS
2N7482T3
2N7483T3
2N7484T3
20
10
7.4
nC
nC
nC
Gate to drain charge
2N7482T3
QGD
10
15
20
nC
nC
nC
2N7483T3
2N7484T3
Reverse recovery
time
3473
trr
di/dt = -100 A/µs, VDD ≤ 50 V
ID = ID1
2N7482T3
2N7483T3
2N7484T3
102
99
250
ns
ns
ns
1/ For sampling plan, see MIL-PRF-19500.
2/ This test required for the following end-point measurements only:
Group B, subgroups 2 and 3 (JANTXV).
Group B, subgroups 3 and 4 (JANS).
Group C, subgroups 2 and 6.
Group E, subgroup 1.
11
MIL-PRF-19500/702C
TABLE II Group D inspection.
Inspection
1/ 2/ 3/
MIL-STD-750
Symbol
Pre-irradiation
limits
R, F, G and H
Post-irradiation limits
R, F and G H 4/
Max
Unit
Method
Conditions
Min
Max
Min
Max
Min
Subgroup 1
Not applicable
Subgroup 2
Steady-state total
TC = + 25°C
VGS = 12 V;
VDS = 0 V
1019
1019
dose irradiation (V
bias) 5/
GS
DS
Steady-state total
VGS = 0; VDS = 80
percent of rated
dose irradiation (V
bias) 5/
V
DS(preirradiation)
End-point electricals:
Breakdown voltage,
drain to source
2N7482T3
3407
VGS = 0; ID = 1 mA;
bias condition C
V(BR)DSS
30
60
30
60
30
60
V dc
V dc
V dc
2N7483T3
2N7484T3
100
100
100
Gate to source
voltage (threshold)
3403
3411
3411
3413
VGS(th)1
IGSSF1
IGSSR1
IDSS
2.0
4.0
100
-100
10
2.0
4.0
100
-100
10
1.5
4.0
100
-100
25
V dc
VDS ≥VGS
;
ID = 1 mA
Gate current
Gate current
Drain current
V
GS = +20 V; VDS = 0,
nA dc
nA dc
µA dc
bias condition C
VGS = -20 V; VDS = 0,
bias condition C
VGS = 0; VDS = 80
percent of rated VDS
(preirradiation),
bias condition C
Static drain to
source on-state
voltage
3405
4011
VGS = 12 V; ID = ID2
condition A,
pulsed (see 4.5.1)
;
VDS(on)
2N7482T3
0.540
0.720
0.980
0.540
0.720
0.980
0.630 V dc
0.864 V dc
1.190 V dc
2N7483T3
2N7484T3
Forward voltage
VGS = 0; ID = ID1
,
VSD
1.2
1.2
1.2
V dc
source drain diode
bias condition C
1/
2/
For sampling plan see MIL-PRF-19500.
Group D qualification may be performed prior to lot formation. Wafers qualified to these group D QCI
requirements may be used for any other specification sheet utilizing the same die design.
3/
At the manufacturer’s option, group D samples need not be subjected to the screening tests, and may be
assembled in its qualified package or in any qualified package that the manufacturer has data to correlate the
performance to the designated package.
4/
5/
The H designation represents devices which pass end-points at all R, F, and G designated total-ionizing-dose
(TID) levels.
Separate samples shall be pulled for each bias.
12
MIL-PRF-19500/702C
* TABLE III. Group E inspection (all quality levels) for qualification or re-qualification only.
Inspection
MIL-STD-750
Conditions
Sample
plan
Method
Subgroup 1
45 devices
c = 0
Temperature cycling
1051
1071
Test condition G, 500 cycles.
As applicable.
Hermetic seal
Fine leak
Gross leak
Electrical measurements
Subgroup 2 1/
Table I, subgroup 2 herein.
45 devices
c = 0
Steady-state gate bias
Electrical measurements
Steady-state reverse bias
Electrical measurements
Subgroup 4
1042
1042
Condition B, 1,000 hours.
Table I, subgroup 2 herein.
Condition A, 1,000 hours.
Table I, subgroup 2 herein.
Sample size
N/A
Thermal impedance curves
Subgroup 10
See MIL-PRF-19500.
22 devices
c = 0
Commutating diode for safe
operating area test procedure
for measuring dv/dt during
reverse recovery of power
MOSFET transistors or
insulated gate bipolar
transistors
3476
Test conditions shall be derived by the manufacturer.
See footnotes at end of table.
13
MIL-PRF-19500/702C
* TABLE III. Group E inspection (all quality levels) - for qualification or re-qualification only - Continued.
MIL-STD-750
Conditions
Sample
plan
Inspection
Method
1080
Subgroup 11
SEE 2/ 3/ 4/
3 devices
See figure 5.
, IGSSR1, and I
Electrical
measurements
5/
I
in accordance with table I, subgroup 2.
DSS1
GSSF1
SEE irradiation
Fluence = 3E5 ±20 percent ions/cm2,
flux = 2E3 to 2E4 ions/cm2/sec, temperature = 25 ±5°C.
Surface LET = 38 MeV-cm2/mg ±5%,
range = 38 µm ±7.5%, energy = 300 MeV ±7.5%.
2N7482T3
In situ bias conditions: V = 30 V and V = -10 V,
DS
DS
DS
GS
V
V
= 25 V and V = -15 V,
GS
= 15 V and V = -20 V,
GS
(nominal 3.86 MeV/Nucleon at Brookhaven National Lab
Accelerator).
2N7483T3
2N7484T3
In situ bias conditions: V = 60 V and V = -15 V,
DS
GS
V
= 30 V and V = -20 V,
GS
DS
(nominal 3.86 MeV/Nucleon at Brookhaven National Lab
Accelerator.
In situ bias conditions: V = 100 V and V = -20 V,
DS
GS
(nominal 3.86 MeV/Nucleon at Brookhaven National Lab
Accelerator).
Surface LET = 61 MeV-cm2/mg ±5%,
range = 31 µm ±10%, energy = 330 MeV ±7.5%,
2N7482T3
2N7483T3
In situ bias conditions: V = 30 V and V = -10 V,
DS
DS
DS
GS
V
= 22.5 V and V = -15 V,
GS
V
= 15 V and V = -20 V,
GS
(nominal 2.92 MeV/Nucleon at Brookhaven National Lab
Accelerator).
In situ bias conditions: V = 46 V and V = -5 V,
DS
DS
DS
DS
GS
V
V
V
= 30 V and V = -10 V,
GS
= 25 V and V = -15 V,
GS
= 15 V and V = -20 V,
GS
(nominal 2.92 MeV/Nucleon at Brookhaven National Lab
Accelerator).
See footnotes at end of table.
14
MIL-PRF-19500/702C
* TABLE III. Group E inspection (all quality levels) - for qualification or re-qualification only - Continued.
MIL-STD-750
Conditions
Sample
plan
Inspection
Method
Subgroup 11-
continued
3 devices
2N7484T3
In situ bias conditions: V = 100 V and V = -10 V,
DS
DS
DS
GS
V
= 35 V and V = -15 V,
GS
V
= 25 V and V = -20 V,
GS
(nominal 2.92 MeV/Nucleon at Brookhaven National Lab
Accelerator).
Surface LET = 84 MeV-cm2/mg ±5%,
range = 28 µm ±7.5%, energy = 350 MeV ±7.5%.
In situ bias conditions: VDS = 25 V and VGS = -5 V,
VDS = 20 V and VGS = -10 V,
(nominal 1.98 MeV/Nucleon at Brookhaven National Lab
Accelerator).
2N7482T3
2N7483T3
In situ bias conditions: V = 35 V and V = -5 V,
DS
DS
DS
DS
GS
V
V
V
= 25 V and V = -10 V,
GS
= 15 V and V = -15 V,
GS
= 10 V and V = -20 V,
GS
(nominal 1.98 MeV/Nucleon at Brookhaven National Lab
Accelerator).
2N7484T3
In situ bias conditions: V = 100 V and V = -5 V,
DS
DS
DS
GS
V
= 80 V and V = -10 V,
GS
V
= 25 V and V = -15 V,
GS
(nominal 1.98 MeV/Nucleon at Brookhaven National Lab
Accelerator).
Electrical
measurements 5/
I
, IGSSR1, and I
GSSF1
in accordance with table I, subgroup 2.
DSS1
1/ A separate sample for each test shall be pulled.
2/ Group E qualification of SEE testing may be performed prior to lot formation. Qualification may be extended
to other specification sheets utilizing the same structurally identical die design.
3/ Device qualification to a higher level LET is sufficient to qualify all lower level LETs.
4/ The sampling plan applies to each bias condition.
5/ Examine IGSSF1, IGSSR1, and IDSS1 before and following SEE irradiation to determine acceptability for each
bias condition. Other test conditions in accordance with table I, subgroup 2, may be performed at the
manufacturer’s option.
15
MIL-PRF-19500/702C
10
1
D = 0.50
0.20
0.10
0.05
P
DM
0.1
t
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
1
t
2
Notes:
1. Duty factor D = t / t
1
2
2. Peak T =P
x Z
+ T
thJC C
J
DM
0.01
0.00001
0.0001
0.001
0.01
0.1
1
t , Rectangular Pulse Duration (sec)
1
FIGURE 2. Thermal impedance curve.
16
MIL-PRF-19500/702C
2N7482T3
2N7483T3
Maximum Current Rating
Maximum Current Rating
40
35
30
25
20
15
10
5
35
30
25
20
15
10
5
0
0
25
50
75
100
125
150
25
50
75
100
125
150
TC, Case Temperature (ºC)
TC, Case Temperature (ºC)
2N7484T3
Maximum Current Rating
25
20
15
10
5
0
25
50
75
100
125
150
TC, Case Temperature (ºC)
FIGURE 3. Maximum drain current versus case temperature graphs.
17
MIL-PRF-19500/702C
2N7482T3
Operation in this area limited by RDS(on)
100.0
10.0
1.0
100µs
1ms
TC = 25oC
TJ = 150oC
10ms
DC
Single Pulse
1
10
100
VDS, Drain-to-Source Voltage (V)
2N7483T3
Operation in this area limited by RDS(on)
100
10
1
100µs
1ms
10ms
DC
TC = 25oC
TJ = 150oC
Single Pulse
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
FIGURE 4. Safe operating area graph.
18
MIL-PRF-19500/702C
2N7484T3
Operation in this area limited by RDS(on)
100.0
10.0
1.0
100µs
1ms
TC = 25oC
TJ = 150oC
10ms
DC
Single Pulse
0.1
1
10
100
V
DS, Drain-to-Source Voltage (V)
FIGURE 4. Safe operating area graph - Continued.
19
MIL-PRF-19500/702C
Single-Event-Effects RESPONSE
35
30
25
20
15
10
5
LET=38±5%;
38µm±7.5%;
300MeV±7.5%
LET=61±5%;
31µm±10%;
330MeV±7.5%
LET=84±5%;
28µm±7.5%;
350MeV±10%
0
0
-5
-10
-15
-20
Bias VGS (Volts)
2N7482T3
Single-Event-Effects RESPONSE
70
60
50
40
30
20
10
0
LET=38±5%;
38µm±7.5%;
300MeV±7.5%
LET=61±5%;
31µm±10%;
330MeV±7.5%
LET=84±5%;
28µm±7.5%;
350MeV±10%
0
-5
-10
-15
-20
Bias VGS (Volts)
2N7483T3
Single-Event-Effects RESPONSE
120
100
80
60
40
20
0
LET=38±5%;
38µm±7.5%;
300MeV±7.5%
LET=61±5%;
31µm±10%;
330MeV±7.5%
LET=84±5%;
28µm±7.5%;
350MeV±10%
0
-5
-10
-15
-20
Bias VGS (Volts)
2N7484T3
* FIGURE 5. Typical SEE safe operating area graph.
20
MIL-PRF-19500/702C
5. PACKAGING
5.1 Packaging. For acquisition purposes, the packaging requirements shall be as specified in the contract or order
(see 6.2). When packaging of materiel is to be performed by DoD or in-house contractor personnel, these personnel
need to contact the responsible packaging activity to ascertain packaging requirements. Packaging requirements are
maintained by the Inventory Control Point's packaging activities within the Military Service or Defense Agency, or
within the Military Service’s system commands. Packaging data retrieval is available from the managing Military
Department's or Defense Agency's automated packaging files, CD-ROM products, or by contacting the responsible
packaging activity.
6. NOTES
(This section contains information of a general or explanatory nature that may be helpful, but is not mandatory.
The notes specified in MIL-PRF-19500 are applicable to this specification.)
6.1 Intended use. Semiconductors conforming to this specification are intended for original equipment design
applications and logistic support of existing equipment.
6.2 Acquisition requirements. Acquisition documents should specify the following:
a. Title, number, and date of this specification.
b. Packaging requirements (see 5.1).
c. Lead finish (see 3.4.1).
d. Product assurance level and type designator.
* 6.3 Qualification. With respect to products requiring qualification, awards will be made only for products which are,
at the time of award of contract, qualified for inclusion in Qualified Manufacturers List (QML 19500) whether or not
such products have actually been so listed by that date. The attention of the contractors is called to these
requirements, and manufacturers are urged to arrange to have the products that they propose to offer to the Federal
Government tested for qualification in order that they may be eligible to be awarded contracts or orders for the
products covered by this specification. Information pertaining to qualification of products may be obtained from
Defense Supply Center, Columbus, ATTN: DSCC/VQE, P.O. Box 3990, Columbus, OH 43218-3990 or e-mail
vqe.chief@dla.mil. An online listing of products qualified to this specification may be found in the Qualified Products
Database (QPD) at https://assist.daps.dla.mil .
6.4 Cross-reference list. The following information shows the generic P/N and its associated military P/N (without
JAN and RHA prefix).
Generic P/N
Military P/N
IRHY57Z30CM
IRHY57034CM
IRHY57130CM
2N7482T3
2N7483T3
2N7484T3
6.5 JANC die versions. The JANHC and JANKC die versions of these devices are covered under specification
sheet MIL-PRF-19500/657.
21
MIL-PRF-19500/702C
* 6.6 Changes from previous issue. The margins of this specification are marked with asterisks to indicate where
changes from the previous issue were made. This was done as a convenience only and the Government assumes
no liability whatsoever for any inaccuracies in these notations. Bidders and contractors are cautioned to evaluate the
requirements of this document based on the entire content irrespective of the marginal notations and relationship to
the last previous issue.
Custodians:
Army - CR
Navy - EC
Air Force - 85
NASA - NA
DLA - CC
Preparing activity:
DLA - CC
(Project 5961-2010-042)
Review activity:
Air Force - 99
*
NOTE: The activities listed above were interested in this document as of the date of this document. Since
organizations and responsibilities can change, you should verify the currency of the information above using the
ASSIST Online database at https://assist.daps.dla.mil/ .
22
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