JANTX2N6800U [INFINEON]
REPETITIVE AVALANCHE AND dv/dt RATED; 重复性雪崩和dv / dt评分
| 型号： | JANTX2N6800U |
| 厂家： | 
Infineon |
| 描述： | REPETITIVE AVALANCHE AND dv/dt RATED |
| 文件： | 总8页 (文件大小：131K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 9.1718A
IRFE330
REPETITIVE AVALANCHE AND dv/dt RATED JANTX2N6800U
HEXFET® TRANSISTOR
JANTXV2N6800U
[REF:MIL-PRF-19500/557]
N-CHANNEL
Product Summary
400Volt, 1.0Ω, HEXFET
The leadless chip carrier (LCC) package represents
the logical next step in the continual evolution of
surface mount technology. The LCC provides
designers the extra flexibility they need to increase
circuit board density. International Rectifier has
engineered the LCC package to meet the specific
needs of the power market by increasing the size of
the bottom source pad, thereby enhancing the
thermal and electrical performance. The lid of the
package is grounded to the source to reduce RF
interference.
Part Number
BVDSS
RDS(on)
ID
IRFE330
400V
1.0Ω
3.0A
Features:
n Hermetically Sealed
n Simple Drive Requirements
n Ease of Paralleling
n Small footprint
n Surface Mount
n Lightweight
HEXFET transistors also feature all of the well-es-
tablished advantages of MOSFETs, such as volt-
age control, very fast switching, ease of paralleling
and electrical parameter temperature stability.They
are well-suited for applications such as switching
power supplies, motor controls, inverters, choppers,
audio amplifiers and high-energy pulse circuits, and
virtually any application where high reliability is re-
quired.
Absolute Maximum Ratings
Parameter
IRFE330, JANTX-, JANTXV-, 2N6800U Units
I
D
@ V
= -10V, T = 25°C Continuous Drain Current
3.0
GS
C
A
I
D
@ V
= -10V, T = 100°C Continuous Drain Current
2.0
12
GS
C
I
Pulsed Drain Current ➀
Max. Power Dissipation
Linear Derating Factor
DM
@ T = 25°C
P
25
W
W/K ➄
V
D
C
0.20
±20
V
Gate-to-Source Voltage
Single Pulse Avalanche Energy ➁
Peak Diode Recovery dv/dt ➂
Operating Junction
GS
E
AS
dv/dt
0.51
8.4
mJ
V/ns
T
-55 to 150
J
oC
g
T
Storage Temperature Range
STG
300 ( for 5 seconds)
0.42 (typical)
Surface Temperature
Weight
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1
3/25/98
IRFE330, JANTX-, JANTXV-, 2N6800U Device
Electrical Characteristics @ Tj = 25°C (Unless Otherwise Specified)
Parameter
Min Typ Max Units
Test Conditions
BV
Drain-to-Source Breakdown Voltage
400
—
—
—
—
V
V
=0 V, I = 1.0mA
D
DSS
GS
V/°C Reference to 25°C, I = 1.0mA
∆BV
/∆T Temperature Coefficient of Breakdown
0.35
DSS
J
D
Voltage
R
Static Drain-to-Source
On-State Resistance
Gate Threshold Voltage
Forward Transconductance
Zero Gate Voltage Drain Current
—
—
—
—
—
—
—
—
1.0
1.15
4.0
—
V
V
= 10V, I = 2.0A
D
DS(on)
GS
GS
➃
Ω
= 10V, I = 3.0A
D
V
2.0
2.4
—
V
V
= V , I = 250µA
GS(th)
fs
DS
GS
D
Ω
g
S ( )
V
> 15V, I
= 2.0A ➃
DS
DS
I
25
V
= 0.8 x Max Rating,V =0V
DS GS
DSS
µA
—
250
V
= 0.8 x Max Rating
DS
V
= 0V, T = 125°C
GS
J
I
I
Gate-to-Source Leakage Forward
Gate-to-Source Leakage Reverse
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain (‘Miller’) Charge
Turn-On Delay Time
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
1.8
100
-100
33
5.8
17
V
= 20 V
= -20V
GSS
GS
nA
nC
V
GSS
GS
Q
Q
Q
V
= 10V, I = 3.0A
GS D
V = Max Rating x 0.5
DS
g
gs
gd
d(on)
r
t
t
t
t
30
35
V
= 200V, I = 3.0A,
DD D
Rise Time
R
= 7.5Ω
G
ns
Turn-Off Delay Time
55
d(off)
f
Fall Time
Internal Drain Inductance
35
—
symbol show-
Measured from drain pad to
die.
Modified MOSFET
ing the internal inductances.
L
D
nH
Measured from center of
source pad to the end of
source bonding wire.
L
S
Internal Source Inductance
—
4.3
—
C
C
C
Input Capacitance
Output Capacitance
—
—
—
660
190
68
—
—
—
V
= 0V, V
= 25 V
f = 1.0MHz
iss
oss
rss
GS DS
pF
Reverse Transfer Capacitance
Source-Drain Diode Ratings and Characteristics
Parameter
Min Typ Max Units
Test Conditions
I
I
Continuous Source Current (Body Diode)
Pulse Source Current (Body Diode) ➀
—
—
—
—
3.0
12
S
Modified MOSFET symbol
showing the integral reverse
p-n junction rectifier.
A
SM
V
t
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
—
—
—
—
—
—
1.4
700
6.2
V
ns
µC
T = 25°C, I = 3.0A, V
= 0V ➃
j
SD
rr
S
GS
T = 25°C, I = 3.0A, di/dt ≤ 100A/µs
j
F
V
Q
≤ 50V ➃
DD
RR
t
Forward Turn-On Time
Intrinsic turn-on time is negligible.Turn-on speed is substantially controlled by L + L .
S D
on
Thermal Resistance
Parameter
Min Typ Max Units
Test Conditions
R
thJC
Junction-to-Case
—
—
5.0
K/W ➄
R
Junction-to-PC Board
—
—
19
Soldered to a copper clad PC board
www.irf.com
thJPCB
Details of notes through ꢀare on the last page
2
IRFE330, JANTX-, JANTXV-, 2N6800U Device
100
100
10
1
VGS
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
TOP
15V
TOP
10V
8.0V
7.0V
6.0V
5.5V
5.0V
10
1
BOTTOM 4.5V
BOTTOM 4.5V
4.5V
4.5V
0.1
20µs PULSE WIDTH
°
20µs PULSE WIDTH
°
T = 150 C
J
T = 25 C
J
0.1
0.1
0.01
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
100
3.5
3.0A
=
I
D
3.0
2.5
2.0
1.5
1.0
0.5
0.0
°
T = 150 C
10
J
°
T = 25 C
J
1
V
= 50V
20µs PULSE WIDTH
DS
V
= 10V
GS
0.1
4
5
6 7
-60 -40 -20
0
20 40 60 80 100 120 140 160
°
V
, Gate-to-Source Voltage (V)
T , Junction Temperature( C)
J
GS
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
Vs. Temperature
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3
IRFE330, JANTX-, JANTXV-, 2N6800U Device
1500
20
16
12
8
V
= 0V,
f = 1MHz
C
I
D
= 3.0 A
GS
C
= C + C
SHORTED
ds
iss
gs
gd ,
gd
V
V
V
= 320V
= 200V
= 80V
DS
DS
DS
C
= C
gd
rss
C
= C + C
1200
900
600
300
0
oss ds
C
iss
C
C
oss
4
rss
FOR TEST CIRCUIT
SEE FIGURE 13
0
0
10
20
30 40
1
10
100
Q
, Total Gate Charge (nC)
V
, Drain-to-Source Voltage (V)
G
DS
Fig 6. Typical Gate Charge Vs.
Fig 5. Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
100
10
1
100
10
1
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
°
10us
T = 150 C
J
°
T = 25 C
J
100us
1ms
°
T = 25 C
10ms
C
°
T = 150 C
Single Pulse
J
V
= 0 V
GS
0.1
0.1
0.0
1
10
100
1000
0.2
0.4
0.6
0.8
1.0
1.2
V
, Drain-to-Source Voltage (V)
V
,Source-to-Drain Voltage (V)
DS
SD
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
www.irf.com
IRFE330, JANTX-, JANTXV-, 2N6800U Device
RD
VDS
3.0
VGS
10V
D.U.T.
RG
+VDD
-
2.0
1.0
0.0
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
25
50
T
75
100
125
150
°
, Case Temperature ( C)
C
10%
V
GS
t
t
r
t
t
f
d(on)
d(off)
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10b. Switching Time Waveforms
10
D = 0.50
0.20
1
0.10
0.05
0.02
P
DM
0.01
0.1
SINGLE PULSE
(THERMAL RESPONSE)
t
1
t
2
Notes:
1. Duty factor D = t / t
1
2
2. Peak T =P
x Z
+ T
C
J
DM
thJC
0.01
0.00001
0.0001
0.001
0.01
0.1
1
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFE330, JANTX-, JANTXV-, 2N6800U Device
1.50
1.00
0.50
0.00
I
D
TOP
1.3A
1.9A
BOTTOM 3.0A
15V
DRIVER
L
V
D S
D .U.T
R
+
G
V
D D
-
I
A
AS
1
20V
0.01
Ω
t
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR )D SS
25
50
75
100
125
150
°
Starting T , Junction Temperature ( C)
t
p
J
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I
AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
0
.3µF
Q
G
+
10 V
V
DS
D.U.T.
-
Q
Q
GD
GS
V
GS
V
G
3mA
I
I
D
G
Current Sampling Resistors
Charge
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
6
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IRFE330, JANTX-, JANTXV-, 2N6800U Device
Peak Diode Recovery dv/dt Test Circuit
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T
-
+
-
-
+
RG
• dv/dt controlled by RG
+
-
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VDD
Driver Gate Drive
P.W.
P.W.
Period
Period
D =
V
=10V
*
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
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7
IRFE330, JANTX-, JANTXV-, 2N6800U Device
Notes:
➂ I
SD
≤ 3.0A, di/dt ≤ 63 A/µs,
≤ BV , T ≤ 150°C
➀ Repetitive Rating; Pulse width limited by
maximum junction temperature.
➁ @ V
= 50 V, Starting T = 25°C,
J
DD
= [0.5
E
L
(I 2) ]
V
AS
*
*
L
DD
DSS
J
Refer to current HEXFET reliability report.
Peak I = 3.0A, V
L
= 10 V, 25 ≤ R ≤ 200Ω
G
Suggested RG = 2.35Ω
GS
➃ Pulse width ≤ 300 µs; Duty Cycle ≤ 2%
➄ K/W = °C/W
Case Outline and Dimensions — Leadless Chip Carrier (LCC) Package
IR Case Style Leadless Chip Carrier (LCC)
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086
IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371
http://www.irf.com/
Data and specifications subject to change without notice.
3/98
8
www.irf.com
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