OPTIGA? TPM SLM 9670 [INFINEON]
The OPTIGA™ TPM SLM 9670 is a member of the OPTIGA™ TPM family. It addresses the requirements of industrial and other demanding applications where an extended temperature range, an extended lifetime and industrial-grade quality are key.;
| 型号： | OPTIGA? TPM SLM 9670 |
| 厂家： | 
Infineon |
| 描述： | The OPTIGA™ TPM SLM 9670 is a member of the OPTIGA™ TPM family. It addresses the requirements of industrial and other demanding applications where an extended temperature range, an extended lifetime and industrial-grade quality are key. |
| 文件： | 总24页 (文件大小：536K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
OPTIGA™ TPM SLM 9670 TPM2.0
Trusted Platform Module
Data Sheet
Devices
•
SLM 9670AQ2.0
TPM Key Features
•
•
•
•
•
•
•
•
Random Number Generator (RNG) according to NIST SP800-90A
TPM FW update functionality installed
6962 Bytes of free NV memory
Full personalization with Endorsement Key (EK) and EK certificate
Up to 3 keys in the volatile memory
Up to 7 keys in the NV memory
Up to 8 NV counters
Support of various cryptographic algorithms
–
–
–
–
RSA-1024 and RSA-2048
SHA-1 and SHA-256
ECC NIST P256
ECC BN256
Hardware Features
•
•
•
•
•
•
•
•
Qualified for industrial applications (JEDEC JESD-47)
Highly reliable flash technology with hardening extension for industrial applications
Enhanced industrial temperature range (-40..+105°C)
SPI interface up to 43 MHz
Low standby power consumption (typ. 110µA)
Supply voltage 1.8V or 3.3V
PG-VQFN-32-13 package
Pin compatible to OPTIGATM TPM SLB9670 TPM1.2
Data Sheet
www.infineon.com
Please read the Important Notice and Warnings at the end of this document
Revision 1.0
2019-04-08
OPTIGA™ TPM SLM 9670 TPM2.0
Trusted Platform Module
Compliance and Security Features
•
•
•
•
•
•
•
Compliant to TPM Main Specification, Family “2.0”, Level 00, Revision 1.38
Certification according Common Criteria EAL4+
TPM2.0 compliant according to TCG test suites
Sophisticated cryptographic hardware modules (crypto processor and cryptographic engines)
Internal memory and bus encryption
Tamper-resistant secure MCU
Shielding and sensors against physical and logical attacks
About this document
Scope and purpose
This data sheet describes the OPTIGA™ TPM SLM 9670 TPM2.0 Trusted Platform Module together with its
features, functionality and programming interface.
Intended audience
This data sheet is primarily intended for system developers.
Data Sheet
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Revision1.0
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OPTIGA™ TPM SLM 9670 TPM2.0
Trusted Platform Module
Table of contents
Table of contents
1
General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Security Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Main Features and Customer Benefits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Applications and Use Cases . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.1
1.2
1.3
1.4
1.5
2
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.1
Typical Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4
TPM Properties . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Functional Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
5.1
5.2
5.3
5.4
5.5
5.6
6
Package Dimensions (VQFN) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Packing Type . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Recommended Footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Chip Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6.1
6.2
6.3
Data Sheet
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OPTIGA™ TPM SLM 9670 TPM2.0
Trusted Platform Module
List of figures
List of figures
Figure 1
Figure 2
Figure 3
Figure 4
Figure 5
Figure 6
Figure 7
Figure 8
Block Diagram of OPTIGA™ TPM SLM 9670 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Pinout of the OPTIGA™ TPM SLM 9670 (PG-VQFN-32-13 Package, Top View) . . . . . . . . . . . . . . . . . . . . . 9
Typical Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
RST# Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Package Dimensions PG-VQFN-32-13 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Tape & Reel Dimensions PG-VQFN-32-13 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Recommended Footprint PG-VQFN-32-13 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Chip Marking PG-VQFN-32-13 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Data Sheet
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OPTIGA™ TPM SLM 9670 TPM2.0
Trusted Platform Module
List of tables
List of tables
Table 1
Table 2
Table 3
Table 4
Table 5
Table 6
Table 7
Table 8
Table 9
Table 10
Table 11
Table 12
Table 13
Buffer Types . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
I/O Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Not Connected . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Infineon Specific Property Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Functional Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Current Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
DC Characteristics of SPI Interface Pins (SCLK, CS#, MISO, MOSI, RST#, PIRQ#) . . . . . . . . . . . . . . . . . 14
DC Characteristics of GPIO and PP Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Device Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
AC Characteristics of SPI Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Data Sheet
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OPTIGA™ TPM SLM 9670 TPM2.0
Trusted Platform Module
General Description
1
General Description
This chapter gives a high-level overview of the OPTIGA™ TPM SLM 9670 Trusted Platform Module and its features.
1.1
Overview
The OPTIGA™ TPM SLM 9670 (Trusted Platform Module) is a standardized security controller that protects the
integrity and authenticity of devices in industrial systems. Built on proven technologies and supporting the latest
TPM 2.0 standard, the OPTIGA™ TPM SLM 9670 features include secured storage for keys, certificates and
passwords as well as dedicated key management. For details about the TCG specification, please refer to
www.trustedcomputinggroup.org.
To simplify system integration into hardware, the OPTIGA™ TPM SLM 9670 uses an SPI interface according to the
TCG specification (see [2]). Infineon provides driver software for a simple adaptation to any standard
microcontroller SPI interface.
The TPM is a secure controller with added cryptographic functionality:
•
High-end security controller with advanced cryptographic algorithms implemented in hardware (for instance,
RSA-2048, ECC-256, SHA-256)
•
•
•
•
•
Common criteria (EAL4+) security certification
Flexible integration with SPI interface support
Extended temperature range (-40 to +105°C) for a variety of applications
Easy to integrate with wide range open source support
Unique key that identifies each TPM
The OPTIGA™ TPM SLM 9670 is a quality-hardened Trusted Platform Module (TPM) for special use in industrial
applications and based on a tamper-resistant secure microcontroller (MCU) using advanced hardware security
technology.
As a turn-key solution, it is flashed with a securely coded firmware according to the latest TCG family 2.0
specifications (see [1] and [2]) offering a rich feature set of security functions.
The device is qualified according to the industrial JEDEC JESD-47 standard. It is targeting industrial applications
requiring a higher level of security like components of industrial automation and control systems.
The OPTIGA™ TPM SLM 9670 is security certified according to Common Criteria EAL4+. It is available in a PG-
VQFN-32-13 package.
1.2
Security Features
The security logic consists of sophisticated features, including error detection units, a set of sensors, regulators
and filters along with an enhanced signal shield to detect faults as well as electrical and physical conditions, and
initiate alarms to indicate security breaches.
1.3
Main Features and Customer Benefits
Main features and customer benefits of the industrial OPTIGA™ TPM SLM 9670:
•
•
•
•
•
Reduced risk based on proven technology
Fast time to market through concept reuse
Flexibility thanks to wide range of security functions as well as dedicated key management
Easy integration into all platform architectures and operating systems
Tamper resistant hardware architecture with performant core and peripheral set (crypto coprocessors, RNG
etc.) based on market leading security expertise
Data Sheet
6
Revision1.0
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OPTIGA™ TPM SLM 9670 TPM2.0
Trusted Platform Module
General Description
•
Standardized and market approved turn-key security solution, preprogrammed with rich security functions
(TCG standard TPM 2.0)
•
•
•
•
Highly reliable NVM technology
Industrial qualification according to JEDEC JESD-47
Security certification according Common Criteria EAL4+
Secured key store: secured personalization (key injection in secured environment), additional keys generated
on chip
•
Plug-and-play security solution: easy and cost efficient system integration through available open source
complex drivers
The listed features support demanding customers to cope with increasing security requirements of today’s and
future complex industrial systems. The OPTIGA™ TPM SLM 9670 as plug-and play security solution helps
tremendously to increase systems security level with very limited additional effort in software development and
system integration and thus helps to reduce the total cost of ownership of the complete system.
1.4
Applications and Use Cases
The OPTIGA™ TPM SLM 9670, a member of the OPTIGA™ family, is a turn-key high security solution offering
tamper resistance and strong functional security protection to industrial applications, which due to their
functionality have an enhanced demand for security.
The industrial OPTIGA™ TPM SLM 9670 provides an outstanding level of security, from hardware as well as from
software point of view. The standardized TPM 2.0 OPTIGA™ TPM SLM 9670 provides more than 90 commands
according the TCG Specification [1] like
•
•
•
•
•
•
•
key generation
life cycle key management (key duplication back-up and refurbishment)
authentication
signature functions (signing / verifying)
encryption / decryption
secured logging
secured time
The OPTIGA™ TPM SLM 9670 offers ready-to-use security to complex industrial systems and supports industrial
security use cases like
•
•
•
•
•
•
•
secured key store and management
remote attestation
device identity
protection of software and configuration data
privacy protection
protection of secrets and intellectual property
diagnostic and remote access
The OPTIGA™ TPM SLM 9670 can be used in various host platforms and host operating systems.
1.5
Power Management
In the OPTIGA™ TPM SLM 9670, power management is handled internally; no explicit power-down or standby
mode is available. The device automatically enters a low-power state after each successful command/response
transaction. If a transaction is started on the SPI bus from the host platform, the device wakes up immediately
and returns to the low-power mode after the transaction has been finished.
Data Sheet
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OPTIGA™ TPM SLM 9670 TPM2.0
Trusted Platform Module
Block Diagram
2
Block Diagram
Figure 1 show a high-level block diagram of the OPTIGA™ TPM SLM 9670.
VDD
SHA-1
SHA-256
RSA-2048
ECC-256
SOLID
Security Peripherals
AES-128
FLASHTM
GND
RST#
Coprocessors
Memory
GPIO
PP
Cache
CPU
MED
PIRQ#
MMU
SCLK
CS#
Peripherals
Timer
Memory
ROM RAM
MOSI
MISO
GPIO
SPI
RNG
Counter
Blockdiagram_SLM9670.vsdx
Figure 1
Block Diagram of OPTIGA™ TPM SLM 9670
Data Sheet
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OPTIGA™ TPM SLM 9670 TPM2.0
Trusted Platform Module
Pin Description
3
Pin Description
30
26
1
NCI/VDD
GND
NCI
MISO
GND
VDD
22
TPM
SLM 9670AQ2.0
NCI
MOSI
CS#
NCI
GPIO
PP
SCLK
PIRQ#
RST#
PG-VQFN-32
7
18
VDD
10
15
Figure 2
Pinout of the OPTIGA™ TPM SLM 9670 (PG-VQFN-32-13 Package, Top View)
Table 1
Buffer Types
Description
Buffer Type
TS
ST
OD
Tri-State pin
Schmitt-Trigger pin
Open-Drain pin
Table 2
I/O Signals
Pin Number
PG-VQFN-32-13
20
Name
Pin
Type
Buffer
Type
Function
CS#
I
ST
Chip Select
The SPI chip select signal (active low).
19
SCLK
I
ST
SPI Clock
The SPI clock signal. Only SPI mode 0 is supported by the
device.
21
24
18
MOSI
MISO
PIRQ#
I
ST
TS
OD
Master Out Slave In (SPI Data)
SPI data which is received from the master.
O
O
Master In Slave Out (SPI Data)
SPI data which is sent to the SPI bus master.
Interrupt Request
Interrupt request signal to the host. The pin has no internal
pull-up resistor. The interrupt is active low.
Data Sheet
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OPTIGA™ TPM SLM 9670 TPM2.0
Trusted Platform Module
Pin Description
Table 2
I/O Signals (continued)
Pin Number
PG-VQFN-32-13
17
Name
Pin
Type
Buffer
Type
Function
RST#
I
ST
Reset
External reset signal. Asserting this pin unconditionally
resets the device. The signal is active low and is typically
connected to the PCIRST# signal of the host.
This pin has a weak internal pull-up resistor.
6
7
GPIO
PP
I/O
I
TS
ST
GPIO-Express-00 Signal
The TPM 2.0 device does not use this functionality.
This pin may be left unconnected; it has an internal pull-up
resistor.
Physical Presence
The TPM2.0 device does not use this functionality.
This pin may be left unconnected; it has an internal pulldown
resistor.
Table 3
Power Supply
Name
Pin Number
Pin
Type
Buffer
Type
Function
PG-VQFN-32-13
8, 22
VDD
GND
PWR
—
Power Supply
All VDD pins must be connected externally and should be
bypassed to GND via 100 nF capacitors.
2, 9, 23, 32
GND
—
Ground
All GND pins must be connected externally.
Table 4
Not Connected
Name
Pin Number
Pin
Type
Buffer
Type
Function
PG-VQFN-32-13
29, 30
NC
NU
—
—
—
No Connect
All pins must not be connected externally (must be left
floating).
3 - 5, 10 - 13, 15, NCI
25 - 28, 31
—
Not Connected Internally
All pins are not connected internally (can be connected
externally).
1
NCI/VDD
—
Not Connected Internally/VDD
This pin is not connected internally (can be connected
externally).
Note that pin 1 is defined as VDD in the TCG specification [2].
To be compliant, VDD can be connected to this pin.
Data Sheet
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OPTIGA™ TPM SLM 9670 TPM2.0
Trusted Platform Module
Pin Description
Table 4
Not Connected (continued)
Pin Number
PG-VQFN-32-13
14
Name
Pin
Type
Buffer
Type
Function
NCI/VDD
—
—
Not Connected Internally/VDD
This pin is not connected internally (can be connected
externally).
Note that pin 14 is defined as VDD in the TCG specification [2].
To be compliant and to ensure upwards compatibility to
future TPMs, VDD must be connected to this pin.
16
NCI/GND
—
—
Not Connected Internally/GND
This pin is not connected internally (can be connected
externally).
Note that pin 16 is defined as GND in the TCG specification
[2]. To be compliant, GND can be connected to this pins.
3.1
Typical Schematic
Figure 3 shows the typical schematic for the OPTIGA™ TPM SLM 9670. The power supply pins should be bypassed
to GND with capacitors located close to the device.
3.3V (1.8V)
SCLK
TPM_CS#
MISO
SCLK
CS#
VDD
GND
1 µF
MISO
MOSI
MOSI
2x 100 nF (place close to
device VDD/GND pins)
PIRQ#
PIRQ#
RST#
RESET#
GPIO
PP
NC/NCI
SLM 9670
Schematic_SLM9670.vsd
Figure 3
Typical Schematic
Data Sheet
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OPTIGA™ TPM SLM 9670 TPM2.0
Trusted Platform Module
TPM Properties
4
TPM Properties
All properties defined within the TPM can be read with the command TPM2_GetCapability (capability =
TPM_CAP_TPM_PROPERTIES). The values are vendor dependent or determined by a platform-specific
specification. The following properties are returned by the Infineon OPTIGA™ TPM SLM 9670:
Table 5
Infineon Specific Property Values
TPM_PT_MANUFACTURER
“IFX”
TPM_PT_VENDOR_STRING_1
TPM_PT_VENDOR_STRING_2
TPM_PT_VENDOR_STRING_3
TPM_PT_VENDOR_STRING_4
TPM_PT_FIRMWARE_VERSION_1
“SLM9”
“670”
NULL
NULL
Major and minor version (for instance, 0x00070055
indicates V7.85)
TPM_PT_FIRMWARE_VERSION_2
Build number and Common Criteria certification state (for
instance, 0x0011CB00 or 0x0011CB02)
Byte 1: reserved for future use (0x00)
Byte 2 and 3: Build number (for instance, 0x11CB)
Byte 4: Common Criteria certification state, 0x00 means
TPM is CC certified, 0x02 means TPM is not certified
TPM_PT_MODES
Bit 0 (FIPS_140_2) = 1
Bits 1..31 = 0
Reading these properties returns the current version and state of the firmware. This implies that the values read
back might differ from the ones shown in Table 5 above.
Data Sheet
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OPTIGA™ TPM SLM 9670 TPM2.0
Trusted Platform Module
Electrical Characteristics
5
Electrical Characteristics
This chapter lists the maximum and operating ranges for various electrical and timing parameters.
5.1
Absolute Maximum Ratings
Table 6
Absolute Maximum Ratings
Symbol
Parameter
Values
Min. Typ. Max.
Unit
Note or Test Condition
Supply Voltage
VDD
-0.3
-0.3
-0.5
–
–
–
5.0
V
V
V
–
–
Voltage on any pin
Vmax
VDD+0.3
VDD+0.5
VDD = 3.3V ± 10%; pins MISO, MOSI,
SCLK and CS#
Ambient temperature
Storage temperature
TA
-40
-40
–
–
–
–
105
°C
°C
V
–
TS
125
–
ESD robustness HBM:
VESD,HBM
2000
According to EIA/JESD22-A114-B
1.5 kΩ, 100 pF
ESD robustness
VESD,CDM
–
–
500
100
V
According to ESD Association
Standard STM5.3.1 - 1999
Latchup immunity
Ilatch
mA
According to EIA/JESD78
Attention: Stresses above the max. values listed here may cause permanent damage to the device. Exposure
to absolute maximum rating conditions for extended periods may affect device reliability.
Maximum ratings are absolute ratings; exceeding only one of these values may cause irreversible
damage to the integrated circuit.
5.2
Functional Operating Range
Table 7
Functional Operating Range
Symbol
Parameter
Values
Min. Typ. Max.
Unit
Note or Test Condition
Supply Voltage
VDD
3.0
1.65
-40
–
3.3
1.8
–
3.6
V
–
1.95
105
110
20
V
–
Ambient temperature
Junction temperature
Useful lifetime
TA
Tj
°C
°C
y
–
–
see Section 5.3 below
–
–
–
Data Sheet
13
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OPTIGA™ TPM SLM 9670 TPM2.0
Trusted Platform Module
Electrical Characteristics
5.3
Thermal Resistance
Table 8
Thermal Resistance
Symbol
Parameter
Values
Unit
Note or Test Condition
Min. Typ. Max.
Junction to case
Rth(JC)
Rth(JA)
35
K/W
K/W
to exposed pad (bottom)1)
1) 2)
Junction to ambient
179
1) not subject to production test, specified by design
2) according to JEDEC JESD 51-5, JESD 51-7 at free convection and radiation on FR4 2s2p board. Board size 76.2mm x
114.3mm x 1.5mm, 2 inner copper layers (35µm), thermal via array under the exposed pad connected to the first inner
copper layer. Also refer to http://www.infineon.com/cms/en/product/technology/packages/PG-VQFN
As shown in Table 7, a maximum junction temperature of 110°C must not be exceeded. Thermal simulations
(done using the FEM software ANSYS®) show that this temperature limit is not reached at an ambient temperature
of 105°C when the device is mounted on a PCB according to JEDEC 2s2p (JESD 51-7, JESD 51-5).
If the device is mounted on a PCB compliant to JEDEC 1s0p (JESD 51-3), the simulation shows that due to self-
heating of the device, the maximum junction temperature is exceeded at an ambient temperature of 105°C.
5.4
DC Characteristics
TA = 25°C, VDD = 3.3V ± 0.3V or VDD = 1.8V ± 0.15V unless otherwise noted.
Table 9
Current Consumption
Symbol
Parameter
Values
Min. Typ. Max.
25
Unit
Note or Test Condition
Current Consumption in IVDD_Active
Active Mode
mA
µA
–
Current Consumption in IVDD_Sleep
Sleep Mode
110
Pin PP = GND, pins GPIO, RST# and
PIRQ# = VDD, CS# inactive (= VDD),
MOSI, MISOand SCLK don't care
Note:
Note:
Current consumption does not include any currents flowing through resistive loads on output pins!
Device sleep mode will be entered after 50 milliseconds of inactivity after the last TPM command was
executed.
Table 10 DC Characteristics of SPI Interface Pins (SCLK, CS#, MISO, MOSI, RST#, PIRQ#)
Parameter
Symbol
Values
Typ.
Unit Note or Test Condition
Min.
Max.
Input voltage high
VIH
0.7 VDD
VDD+0.5
V
VDD,typ = 3.3V, only pins SCLK,
MISO, MOSI and CS#
0.7 VDD
0.7 VDD
VDD+0.3
VDD+0.3
V
V
VDD,typ = 3.3V, pin RST#
VDD,typ = 1.8V
Data Sheet
14
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OPTIGA™ TPM SLM 9670 TPM2.0
Trusted Platform Module
Electrical Characteristics
Table 10 DC Characteristics of SPI Interface Pins (SCLK, CS#, MISO, MOSI, RST#, PIRQ#) (continued)
Parameter
Symbol
Values
Typ.
Unit Note or Test Condition
Min.
Max.
Input voltage low
VIL
-0.5
0.3 VDD
V
VDD,typ = 3.3V, only pins SCLK,
MISO, MOSI and CS#
-0.3
-0.3
-20
0.3 VDD
0.3 VDD
20
V
VDD,typ = 3.3V, pin RST#
VDD,typ = 1.8V
V
Input leakage current
ILEAK
µA
µA
0V < VIN < VDD
-150
150
Pins SCLK, CS#, MISO, MOSI
-0.5V < VIN < VDD+0.5V
VDD,typ = 3.3V
-150
150
150
µA
µA
Pin RST#
-0.5V < VIN < VDD+0.3V
V
DD,typ = 3.3V
-0.3V < VIN < VDD+0.3V
DD,typ = 1.8V
-150
V
Output high voltage
Output low voltage
Pad input capacitance
VOH
VOL
CIN
0.9 VDD
V
IOH = -100µA
0.1 VDD
10
V
IOL = 1.5mA
pF
pF
–
–
Output load capacitance CLOAD
40
Table 11 DC Characteristics of GPIO and PP Pins
Parameter
Symbol
Values
Typ. Max.
VDD+0.3
Unit
Note or Test Condition
Min.
0.7 VDD
-0.3
Input voltage high
Input voltage low
Input leakage current
VIH
V
Pins GPIO and PP
Pins GPIO and PP
0V < VIN < VDD
VIL
0.2 VDD
20
V
ILEAK
-20
µA
µA
V
-150
150
-0.3V < VIN < VDD + 0.3V
IOH = -1mA, pin GPIO
IOL < 1mA, pin GPIO
Pins GPIO and PP
Output high voltage
Output low voltage
Pad input capacitance
VOH
VOL
CIN
0.7 VDD
0.3
10
V
pF
5.5
AC Characteristics
TA = 25°C, VDD = 3.3V ± 0.3V or VDD = 1.8V ± 0.15V unless otherwise noted.
Table 12 Device Reset
Parameter
Symbol
Values
Typ.
Unit Note or Test Condition
Min.
80
Max.
Cold (Power-On) Reset
Warm Reset
tPOR
µs
µs
ms
see Section 5.6
see Section 5.6
see Section 5.6
tWRST
tRSTIN
2
Reset Inactive Time
60
Data Sheet
15
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OPTIGA™ TPM SLM 9670 TPM2.0
Trusted Platform Module
Electrical Characteristics
tPOR
VDD
tRSTIN
tWRST
tRSTIN
tWRST
tRSTIN
TPM commands
RST#
RST_Timing.vsdx
Figure 4
RST# Timing
Table 13 AC Characteristics of SPI Interface
Parameter
Symbol
Values
Typ.
Unit Note or Test Condition
Min.
Max.
SCLK frequency
fCLK
43
MHz VDD,typ = 3.3V, tSLEW ≥ 1V/ns
22.5
38
MHz
MHz
V
DD,typ = 1.8V, tSLEW ≥ 1V/ns
DD,typ = 3.3V, tSLEW < 1V/ns
V
18.5
MHz VDD,typ = 1.8V, tSLEW < 1V/ns
SCLK period
tCLK
1/fCLK
5%
-
1/fCLK
1/fCLK
5%
+
µs
µs
µs
Rising edge to rising edge,
measured at VIN = 0.5 VDD
SCLK low time
SCLK high time
tCLKL
tCLKH
tSLEW
tCS
0.45 tCLK
0.45 tCLK
0.216
Falling edge to rising edge,
measured at VIN = 0.5 VDD
Rising edge to falling edge,
measured at VIN = 0.5 VDD
SCLK slew rate
(rising/falling)
4
V/ns between 0.2 VDD and 0.6 VDD
CS# high time
50
60
ns
ns
Rising edge to falling edge
DD,typ = 1.8V and tSLEW < 1V/ns,
V
rising edge to falling edge, TPM
protocol abort only
CS# setup time
tCSS
5
7
5
2
3
0
ns
ns
ns
ns
ns
ns
CS# falling edge to SCLK rising
edge
VDD,typ = 1.8V and tSLEW < 1V/ns, CS#
falling edge to SCLK rising edge
CS# hold time
MOSI setup time
MOSI hold time
MISO hold time
tCSH
tSU
tH
SCLK falling edge to CS# rising
edge
Data setup time to SCLK rising
edge
Data hold time from SCLK rising
edge
tHO
Output hold time from SCLK
falling edge
Data Sheet
16
Revision1.0
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OPTIGA™ TPM SLM 9670 TPM2.0
Trusted Platform Module
Electrical Characteristics
Table 13 AC Characteristics of SPI Interface (continued)
Parameter
Symbol
Values
Typ.
Unit Note or Test Condition
Min.
Max.
MISO valid delay time
MISO active time
tV
0
0.7 tCLKL ns
Output valid delay from SCLK
falling edge
tDRV
0
ns
Delay from chip select assertion to
driving of MISO
5.6
Timing
Some pads are disabled after deassertion of the reset signal for up to 500 µs.
The OPTIGA™ TPM SLM 9670 features a sophisticated protection mechanism against dictionary attacks on TPM-
based authorization data. Basically, the device counts the number of failed authorization attempts in a counter
which is located in the non-volatile memory. An attacker who has physical access to the device could try to
cirumvent that mechanism by resetting the device after the authorization attempt but before the updated failure
counter has been written into the NVM.
Certain countermeasures have been added to the OPTIGA™ TPM SLM 9670. In certain time windows during
power-on or warm boot of the device, such reset events might influence the dictionary attack counters and
trigger other security mechanisms as well. In worst case, this might trigger special security defense modes from
which a recovery is very complex or even not possible.
To avoid that the OPTIGA™ TPM SLM 9670 reaches such a security defense state, the RST# signal must not be
asserted in certain time windows. After the deassertion of the RST# signal, the system should wait for a minimum
time of tRSTIN before asserting RST# again (see Figure 4 and Table 12).
TPM commands should only be started after tRSTIN has expired (see Figure 4 again). If a TPM command is running,
RST# should not be asserted; otherwise, this might also trigger some security functions. When the TPM shall be
reset, the command TPM2_Shutdown should be issued before the assertion of the RST# signal.
Data Sheet
17
Revision1.0
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OPTIGA™ TPM SLM 9670 TPM2.0
Trusted Platform Module
Package Dimensions (VQFN)
6
Package Dimensions (VQFN)
All dimensions are given in millimeters (mm) unless otherwise noted. The packages are “green” and RoHS
compliant.
7 x 0.5 = 3.5
0.5
5
A
0.9 MAX.
0.1
2x
A
B
17
24
32x
0.05 C
25
16
9
0.1 C
32
8
1
Index Marking
0.1
2x
B
Index Marking
+0.05
-0.07
32x
0.25
M
0.1
A B C
C
0.1
3.6
M
0.05
C
(0.2)
0.05 MAX.
0.05
(4.2)
0.4
PG-VQFN-32-13-PO V01
Figure 5
Package Dimensions PG-VQFN-32-13
6.1
Packing Type
PG-VQFN-32-13: Tape & Reel (reel diameter 330mm), 5000 pcs. per reel
0.3
8
5.25
1.1
Index Marking
PG-VQFN-32-13-TP V01
Figure 6
Tape & Reel Dimensions PG-VQFN-32-13
6.2
Recommended Footprint
Figure 7 shows the recommended footprint for the PG-VQFN-32-13 package. The exposed pad of the package is
internally connected to GND. It shall be connected to GND externally as well.
4.1
3.6
Package outline 5 x 5
0.5
0.25
PG-VQFN-32-13-FP V01
Figure 7
Recommended Footprint PG-VQFN-32-13
Data Sheet
18
Revision1.0
2019-04-08
OPTIGA™ TPM SLM 9670 TPM2.0
Trusted Platform Module
Package Dimensions (VQFN)
6.3
Chip Marking
Line 1: SLM9670
Line 2: AQ20 yy, the <yy> is an internal FW indication (only at manufacturing due to field upgrade option)
Line 3: <Lot number> H <datecode>
Infineon
1234567
AQ20 YY
Softwarecode
XXH
Lot Code
ChipMarking_VQFN.vsd
Figure 8
Chip Marking PG-VQFN-32-13
For details and recommendations regarding assembly of packages on PCBs, please refer to
http://www.infineon.com/cms/en/product/technology/packages/PG-VQFN
Data Sheet
19
Revision1.0
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OPTIGA™ TPM SLM 9670 TPM2.0
Trusted Platform Module
References
References
[1] —, “Trusted Platform Module Library (Part 1-4)”, Family 2.0, Level 00, Rev. 01.38, 2016-09-29, TCG
[2] —, “TCG PC Client Platform TPM Profile (PTP) Specification”, Family 2.0, Level 00, Rev. 01.03 v22, May 22,
2017, TCG
Data Sheet
20
Revision1.0
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OPTIGA™ TPM SLM 9670 TPM2.0
Trusted Platform Module
Terminology
Terminology
ESW
HMAC
PCR
Embedded Software
Hashed Message Authentication Code
Platform Configuration Register
Public Endorsement Key
PUBEK
SPI
Serial Peripheral Interface (bus)
Trusted Computing Group
Trusted Platform Module
TCG Software Stack
TCG
TPM
TSS
Data Sheet
21
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OPTIGA™ TPM SLM 9670 TPM2.0
Trusted Platform Module
Licenses and Notices
Licenses and Notices
The following License and Notice Statements are reproduced from [1].
Licenses and Notices
1. Copyright Licenses:
Trusted Computing Group (TCG) grants to the user of the source code in this specification (the "Source Code") a
worldwide, irrevocable, nonexclusive, royalty free, copyright license to reproduce, create derivative works,
distribute, display and perform the Source Code and derivative works thereof, and to grant others the rights
granted herein.The TCG grants to the user of the other parts of the specification (other than the Source Code) the
rights to reproduce, distribute, display, and perform the specification solely for the purpose of developing
products based on such documents.
2. Source Code Distribution Conditions:
Redistributions of Source Code must retain the above copyright licenses, this list of conditions and the following
disclaimers.
Redistributions in binary form must reproduce the above copyright licenses, this list of conditions and the
following disclaimers in the documentation and/or other materials provided with the distribution.
3. Disclaimers:
THE COPYRIGHT LICENSES SET FORTH ABOVE DO NOT REPRESENT ANY FORM OF LICENSE OR WAIVER, EXPRESS
OR IMPLIED, BY ESTOPPEL OR OTHERWISE, WITH RESPECT TO PATENT RIGHTS HELD BY TCG MEMBERS (OR
OTHER THIRD PARTIES) THAT MAY BE NECESSARY TO IMPLEMENT THIS SPECIFICATION OR OTHERWISE. Contact
TCG Administration (admin@trustedcomputinggroup.org) for information on specification licensing rights
available through TCG membership agreements.
THIS SPECIFICATION IS PROVIDED "AS IS" WITH NO EXPRESS OR IMPLIED WARRANTIES WHATSOEVER,
INCLUDING ANY WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, ACCURACY,
COMPLETENESS, OR NONINFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS, OR ANY WARRANTY OTHERWISE
ARISING OUT OF ANY PROPOSAL, SPECIFICATION OR SAMPLE.
Without limitation, TCG and its members and licensors disclaim all liability, including liability for infringement of
any proprietary rights, relating to use of information in this specification and to the implementation of this
specification, and TCG disclaims all liability for cost of procurement of substitute goods or services, lost profits,
loss of use, loss of data or any incidental, consequential, direct, indirect, or special damages, whether under
contract, tort, warranty or otherwise, arising in any way out of use or reliance upon this specification or any
information herein.
Any marks and brands contained herein are the property of their respective owners.
Data Sheet
22
Revision1.0
2019-04-08
OPTIGA™ TPM SLM 9670 TPM2.0
Trusted Platform Module
Revision History
Revision History
Reference
Revision 1.0, 2019-04-08
Initial revision.
Description
Data Sheet
23
Revision1.0
2019-04-08
Please read the Important Notice and Warnings at the end of this document
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IMPORTANT NOTICE
The information given in this document shall in no For further information on technology, delivery terms
Edition 2019-04-08
Published by
Infineon Technologies AG
81726 Munich, Germany
event be regarded as a guarantee of conditions or and conditions and prices, please contact the nearest
characteristics ("Beschaffenheitsgarantie").
Infineon Technologies Office (www.infineon.com).
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hereby disclaims any and all warranties and liabilities
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