Q67060-S6307-A5 [INFINEON]
Smart Sense High-Side Power Switch; 智能检测高侧电源开关型号: | Q67060-S6307-A5 |
厂家: | Infineon |
描述: | Smart Sense High-Side Power Switch |
文件: | 总15页 (文件大小:240K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
®
PROFET BTS 640 S2
Smart Sense High-Side
Power Switch
Features
Product Summary
Vbb(on)
RON
IL(ISO)
IL(SCr)
5.0 ... 34
30
V
mΩ
A
Operating voltage
On-state resistance
Load current (ISO)
Current limitation
•
•
•
•
•
•
•
Short circuit protection
12.6
24
Current limitation
Proportional load current sense
CMOS compatible input
Open drain diagnostic output
Fast demagnetization of inductive loads
Undervoltage and overvoltage shutdown with
auto-restart and hysteresis
Overload protection
A
Package
TO220-7-11
TO263-7-2
TO220-7-12
•
•
•
1
1
1
Thermal shutdown
Standard (staggered)
SMD
Straight
Overvoltage protection including load dump (with
external GND-resistor)
•
•
•
Reverse battery protection (with external GND-resistor)
Loss of ground and loss of V protection
bb
Electrostatic discharge (ESD) protection
Application
•
•
•
µC compatible power switch with diagnostic feedback for 12 V and 24 V DC grounded loads
All types of resistive, inductive and capacitve loads
Replaces electromechanical relays, fuses and discrete circuits
General Description
N channel vertical power FET with charge pump, ground referenced CMOS compatible input and diagnostic
feedback, proportional sense of load current, monolithically integrated in Smart SIPMOS technology.
Providing embedded protective functions.
Block Diagram
4
+ V
bb
Voltage
source
Gate
protection
Overvoltage
protection
Current
limit
V
Logic
6, 7
OUT
Limit for
Charge pump
Level shifter
Voltage
sensor
unclamped
ind. loads
I
L
Current
Sense
Rectifier
IN
3
1
Output
Voltage
detection
Load
Logic
ESD
ST
R
O
Temperature
sensor
GND
IS
5
I
IS
PROFET
GND
R
IS
Load GND
2
Signal GND
Semiconductor Group
Page 1 of 15
2003-Oct-01
BTS 640 S2
Pin
1
Symbol
ST
Function
Diagnostic feedback: open drain, invers to input level
2
GND
IN
Logic ground
3
Input, activates the power switch in case of logical high signal
Positive power supply voltage, the tab is shorted to this pin
4
V
bb
Sense current output, proportional to the load current, zero in
the case of current limitation of load current
5
IS
6 & 7
OUT
(Load, L)
Output, protected high-side power output to the load.
Both output pins have to be connected in parallel for operation
according this spec (e.g. kILIS).
Design the wiring for the max. short circuit current
Maximum Ratings at Tj = 25 °C unless otherwise specified
Parameter
Symbol
Values
Unit
V
Supply voltage (overvoltage protection see page 4)
Vbb
Vbb
43
34
Supply voltage for full short circuit protection
V
T
=-40 ...+150°C
j Start
3)
Load dump protection1)
V
= V + V , V = 13.5V
VLoad dump
60
V
LoadDump
A
s
A
2)
R
= 2 Ω, R = 1 Ω, t = 200 ms, IN= low or high
L d
I
Load current (Short circuit current, see page 5)
IL
self-limited
A
Operating temperature range
Storage temperature range
Tj
Tstg
-40 ...+150
-55 ...+150
°C
Power dissipation (DC), T ≤ 25 °C
Ptot
85
W
C
Inductive load switch-off energy dissipation, single pulse
V
= 12V, T = 150°C, T = 150°C const.
j,start C
bb
IL = 12.6 A, ZL = 4,2mH, 0 Ω: EAS
IL = 4 A, ZL = 330mH, 0 Ω: EAS
0,41
3,5
J
Electrostatic discharge capability (ESD)
IN: VESD
ST, IS:
1.0
4.0
8.0
kV
(Human Body Model)
out to all other pins shorted:
acc. MIL-STD883D, method 3015.7 and ESD assn. std. S5.1-1993
R=1.5kΩ; C=100pF
Input voltage (DC)
VIN
-10 ... +16
V
Current through input pin (DC)
Current through status pin (DC)
Current through current sense pin (DC)
see internal circuit diagrams page 8
IIN
IST
IIS
±2.0
±5.0
±14
mA
1)
Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins (a 150 Ω
resistor in the GND connection is recommended).
2)
3)
R = internal resistance of the load dump test pulse generator
I
VLoad dump is setup without the DUT connected to the generator according to ISO 7637-1 and DIN 40839
Semiconductor Group
Page 2
2003-Oct-01
BTS 640 S2
Thermal Characteristics
Parameter and Conditions
Symbol
chip - case: RthJC
Values
typ
-- 1.47
Unit
min
--
max
Thermal resistance
K/W
junction - ambient (free air): RthJA
SMD version, device on PCB4):
--
--
--
33
75
--
Electrical Characteristics
Parameter and Conditions
Symbol
Values
Unit
at Tj = 25 °C, V = 12 V unless otherwise specified
bb
min
typ
max
Load Switching Capabilities and Characteristics
On-state resistance (pin 4 to 6&7)
I = 5 A
T=25 °C: RON
T=150 °C:
j
--
--
27
54
30
60
mΩ
L
j
Output voltage drop limitation at small load
currents (pin 4 to 6&7), see page 14
I = 0.5 A
L
VON(NL)
50
--
--
mV
A
T =-40...+150°C:
j
Nominal load current, ISO Norm (pin 4 to 6&7)
V
= 0.5 V, T = 85 °C
IL(ISO)
11.4 12.6
ON
C
Nominal load current, device on PCB4)
T = 85 °C, T ≤ 150 °C V
ON
≤ 0.5 V,
IL(NOM)
4.0
--
4.5
--
--
8
A
A
j
Output current (pin 6&7) while GND disconnected
IL(GNDhigh)
mA
or GND pulled up, V =30 V, V = 0, see diagram page
bb
IN
9; not subject to production test, specified by design
Turn-on time
Turn-off time
IN
IN
to 90% V
to 10% V
: ton
: toff
25
25
70
80
150
200
µs
OUT
OUT
R = 12 Ω, T =-40...+150°C
L
j
Slew rate on
dV /dton
-dV/dtoff
0.1
0.1
--
--
1 V/µs
1 V/µs
10 to 30% V
OUT
, R = 12 Ω, T =-40...+150°C
L j
Slew rate off
70 to 40% V
OUT
, R = 12 Ω, T =-40...+150°C
L j
Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70µm thick) copper area for V
connection. PCB is vertical without blown air.
4)
bb
Semiconductor Group
Page 3
2003-Oct-01
BTS 640 S2
Parameter and Conditions
Symbol
Values
typ max
Unit
at Tj = 25 °C, V = 12 V unless otherwise specified
bb
min
Operating Parameters
Operating voltage 5)
Undervoltage shutdown
Undervoltage restart
T =-40...+150°C: Vbb(on)
5.0
3.2
--
--
--
34
V
V
V
j
T =-40...+150°C: Vbb(under)
j
5.0
T =-40...+25°C: Vbb(u rst)
4.5
5.5
6.0
j
T =+150°C:
j
Undervoltage restart of charge pump
see diagram page 13
T =-40...+25°C: Vbb(ucp)
--
--
4.7
--
6.5
7.0
V
V
j
T =25...150°C:
j
Undervoltage hysteresis
∆Vbb(under)
--
0.5
--
∆V
bb(under)
= V
- V
bb(u rst) bb(under)
Overvoltage shutdown
Overvoltage restart
T =-40...+150°C: Vbb(over)
34
33
--
--
--
1
43
--
V
V
V
V
j
T =-40...+150°C: Vbb(o rst)
j
Overvoltage hysteresis
Overvoltage protection6)
T =-40...+150°C: ∆Vbb(over)
j
--
T =-40°C: Vbb(AZ)
41
43
--
47
--
52
j
I =40 mA
bb
T =+25...+150°C
j
Standby current (pin 4)
V
=0
Tj=-40...+25°C: Ibb(off)
Tj= 150°C:
--
--
4
12
15 µA
25
IN
IL(off)
--
--
10 µA
Off state output current (included in Ibb(off)
)
,
=-40...+150°C
:
VIN=0
Tj
7)
IGND
--
1.2
3
mA
Operating current (Pin 2) , V =5 V
IN
5)
At supply voltage increase up to V = 4.7 V typ without charge pump, V
≈V - 2 V
bb
bb
OUT
6)
Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins (a 150 Ω
resistor in the GND connection is recommended). See also V
in table of protection functions and
ON(CL)
circuit diagram page 9.
7)
Add I , if I > 0, add I , if V >5.5 V
ST
ST
IN
IN
Semiconductor Group
Page 4
2003-Oct-01
BTS 640 S2
Parameter and Conditions
Symbol
Values
Unit
at Tj = 25 °C, V = 12 V unless otherwise specified
bb
min
typ
max
Protection Functions8)
Initial peak short circuit current limit (pin 4 to 6&7)
IL(SCp)
Tj =-40°C:
48
40
31
56
50
37
65
58
45
A
Tj =25°C:
Tj =+150°C:
Repetitive short circuit shutdown current limit
IL(SCr)
T = T (see timing diagrams, page 12)
jt
--
24
--
A
V
j
Output clamp (inductive load switch off)
at V = V - V ; I = 40 mA,
T =-40°C: VON(CL)
41
43
--
47
--
52
OUT bb ON(CL) L
j
Tj =+25..+150°C:
Thermal overload trip temperature
Thermal hysteresis
Tjt
150
--
--
10
--
--
--
°C
K
∆Tjt
-Vbb
9)
Reverse battery (pin 4 to 2)
--
32
V
Reverse battery voltage drop (V
L
> V )
bb
out
I = -5 A
T=150 °C: -VON(rev)
--
600
--
mV
j
Diagnostic Characteristics
Current sense ratio10), static on-condition,
11)
= 6.5 ...27V,
bb(on)
V
k
= 0...5 V, V
= I / I
IS
Tj = -40°C, IL = 5 A:
kILIS
4550 5000 6000
3300 5000 8000
ILIS
L
IS
Tj= -40°C, IL= 0.5 A:
Tj= 25...+150°C, IL= 5 A:
Tj= 25...+150°C, IL = 0.5 A:
4550 5000 5550
4000 5000 6500
,
Current sense output voltage limitation
T = -40 ...+150°C
I
= 0, I = 5 A:
j
IS L
VIS(lim)
5.4
6.1
6.9
V
Current sense leakage/offset current
T = -40 ...+150°C
V =0, V = 0, I = 0:
j
IN IS
L
IIS(LL)
IIS(LH)
IIS(SH)
0
0
0
--
--
--
1
15
10
µA
V =5 V, V = 0, I = 0:
IN IS
L
12 )
V =5 V, V = 0, V
IN IS
= 0 (short circuit):
OUT
8)
9)
Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not
designed for continuous repetitive operation.
Requires 150 Ω resistor in GND connection. The reverse load current through the intrinsic drain-source
diode has to be limited by the connected load. Note that the power dissipation is higher compared to normal
operating conditions due to the voltage drop across the intrinsic drain-source diode. The temperature
protection is not active during reverse current operation! Input and Status currents have to be limited (see
max. ratings page 2 and circuit page 9).
10)
This range for the current sense ratio refers to all devices. The accuracy of the kILIS can be raised at least by
a factor of two by matching the value of kILIS for every single device.
In the case of current limitation the sense current IIS is zero and the diagnostic feedback potential VST is
High. See figure 2b, page 11.
11)
12)
Valid if Vbb(u rst) was exceeded before.
not subject to production test, specified by design
Semiconductor Group
Page 5
2003-Oct-01
BTS 640 S2
Parameter and Conditions
Symbol
Values
Unit
at Tj = 25 °C, V = 12 V unless otherwise specified
bb
min
--
typ
max
300
Current sense settling time to IIS static±10% after
positive input slope13) , I = 0
j
5 A,
tson(IS)
--
µs
µs
L
T = -40...+150°C
Current sense settling time to 10% of IIS static after
negative input slope13) , I = 5
0 A ,
tsoff(IS)
--
30
100
L
T = -40...+150°C
j
Current sense rise time (60% to 90%) after change
of load current13) , I = 2.5
5 A
tslc(IS)
--
2
10
3
--
4
µs
L
Open load detection voltage14) (off-condition)
VOUT(OL)
V
T =-40..150°C:
j
Internal output pull down
(pin 6 to 2), V
OUT
=5 V, T =-40..150°C
RO
5
15
40
kΩ
j
Input and Status Feedback15)
Input resistance
see circuit page 8
RI
3,0
4,5
7,0
kΩ
Input turn-on threshold voltage
Input turn-off threshold voltage
Input threshold hysteresis
T =-40..+150°C: VIN(T+)
--
1.5
--
--
--
3.5
--
V
V
V
j
T =-40..+150°C: VIN(T-)
j
∆ VIN(T)
0.5
--
Off state input current (pin 3), V = 0.4 V
IN
IIN(off)
1
--
50
90
µA
µA
T =-40..+150°C
j
On state input current (pin 3), V = 5 V
IN
IIN(on)
20
50
T =-40..+150°C
j
Delay time for status with open load
after Input neg. slope (see diagram page 13)
td(ST OL3)
tdon(ST)
tdoff(ST)
--
--
--
400
13
1
--
--
--
µs
µs
µs
V
Status delay after positive input slope13)
T =-40 ... +150°C:
j
13)
Status delay after negative input slope
T =-40 ... +150°C:
j
Status output (open drain)
Zener limit voltage T =-40...+150°C, IST = +1.6 mA: VST(high)
5.4
6.1
6.9
j
--
--
--
--
0.4
0.7
ST low voltage
T =-40...+25°C, IST = +1.6 mA: VST(low)
j
T = +150°C, IST = +1.6 mA:
j
Status leakage current, V = 5 V,
T =25 ... +150°C: IST(high)
j
--
--
2
µA
ST
13)
not subject to production test, specified by design
14)
15)
External pull up resistor required for open load detection in off state.
If a ground resistor R
is used, add the voltage drop across this resistor.
GND
Semiconductor Group
Page 6
2003-Oct-01
BTS 640 S2
Truth Table
Input
level
Output
level
Status
level
Current
Sense
I
IS
Normal
L
H
L
H
L
L
H
L
H
L
H
L
H
H
H
H
0
operation
Current-
limitation
Short circuit to
GND
nominal
0
0
0
0
16
H
)
L
Over-
temperature
Short circuit to
L
H
L
L
L
H
H
H
H
0
0
0
17)
L
18)
V
bb
H
L
<nominal
19
20)
Open load
L
H
0
0
)
L
H (L
L
)
H
L
L
L
L
L
Undervoltage
Overvoltage
L
H
L
H
L
H
L
H
L
0
0
0
0
0
Negative output
voltage clamp
H
L = "Low" Level
H = "High" Level
X = don't care
Z = high impedance, potential depends on external circuit
Status signal after the time delay shown in the diagrams (see fig 5. page 12...13)
16)
The voltage drop over the power transistor is Vbb-VOUT>typ.3V. Under this condition the sense current IIS is
zero
17)
An external short of output to Vbb, in the off state, causes an internal current from output to ground. If RGND
is used, an offset voltage at the GND and ST pins will occur and the VST low signal may be errorious.
18)
19)
20)
Low ohmic short to Vbb may reduce the output current IL and therefore also the sense current IIS.
Power Transistor off, high impedance
with external resistor between pin 4 and pin 6&7
Semiconductor Group
Page 7
2003-Oct-01
BTS 640 S2
Status output
Terms
+5V
ST
I
bb
V
V
4
bb
ON
RST(ON)
I
IN
I
V
3
bb
I
L
IN
6
7
OUT
OUT
ST
PROFET
ST
1
5
ESD-
ZD
I
IS
IS
V
V
GND
2
ST
IN
GND
V
V
IS
OUT
I
GND
R
ESD-Zener diode: 6.1 V typ., max 5 mA;
< 440 Ω at 1.6 mA, The use of ESD zener
GND
R
ST(ON)
diodes as voltage clamp at DC conditions is not
recommended.
Input circuit (ESD protection)
R
Current sense output
I
IN
V
IS
IS
ESD-ZDI
I
I
I
IS
GND
R
IS
ESD-ZD
GND
The use of ESD zener diodes as voltage clamp at DC
conditions is not recommended.
ESD-Zener diode: 6.1 V typ., max 14 mA;
= 1 kΩ nominal
R
IS
Inductive and overvoltage output clamp
+ V
bb
V
Z
VON
OUT
PROFET
GND
V
ON
clamped to 47 V typ.
Semiconductor Group
Page 8
2003-Oct-01
BTS 640 S2
Overvoltage protection of logic part
GND disconnect
+ 5V
+ V
I
bb
bb
V
4
bb
R
ST
V
V
3
bb
Z2
R
IN
I
6
IN
OUT
OUT
1
ST
PROFET
ST
Logic
7
IS
5
IS
R
V
GND
2
V
Z1
R
V
V
V
V
IS
IN
ST
GND
IS
GND
R
GND
Any kind of load. In case of Input=high is VOUT ≈ VIN - VIN(T+)
.
Signal GND
Due to VGND >0, no VST = low signal available.
V
R
= 6.1 V typ., V = 47 V typ., R = 4 kΩ typ,
Z2 I
Z1
GND disconnect with GND pull up
= 150 Ω, R = 15 kΩ, R = 1 kΩ, R = 15 kΩ,
GND
ST
IS
V
4
V
3
1
5
bb
Reverse battery protection
IN
ST
IS
6
7
+ 5V
OUT
OUT
PROFET
V
-
bb
RST
GND
2
RI
Logic
VZ1
IN
ST
IS
OUT
V
V
V
V
ST
IN
IS
GND
Power
Inverse
Diode
V
RV
RIS
bb
Any kind of load. If VGND > VIN - VIN(T+) device stays off
Due to VGND >0, no VST = low signal available.
GND
RL
RGND
V
disconnect with energized inductive
bb
load
Power GND
Signal GND
The load R is inverse on, temperature protection is
not active
L
4
V
high
3
1
bb
R
= 150 Ω, R = 4 kΩ typ, R ≥ 500 Ω, R ≥ 200 Ω,
GND
IN
ST
IS
I
ST
IS
6
7
OUT
OUT
R ≥ 500 Ω,
V
PROFET
5
GND
2
Open-load detection
OFF-state diagnostic condition: VOUT > 3 V typ.; IN low
V
V
bb
bb
R
Normal load current can be handled by the PROFET
itself.
EXT
OFF
V
Out
OUT
ST
Logic
R
O
Signal GND
Semiconductor Group
Page 9
2003-Oct-01
BTS 640 S2
V
disconnect with charged external
bb
inductive load
4
V
high
3
1
bb
IN
ST
IS
6
7
OUT
OUT
PROFET
D
5
GND
2
R
L
L
V
bb
If other external inductive loads L are connected to the PROFET,
additional elements like D are necessary.
Inductive Load switch-off energy
dissipation
E
bb
E
AS
4
E
E
Load
L
V
bb
3
IN
6
7
OUT
OUT
1
5
ST
IS
PROFET
=
V
GND
2
bb
E
R
Energy stored in load inductance:
2
L
1
E = / ·L·I
L
2
While demagnetizing load inductance, the energy
dissipated in PROFET is
EAS= Ebb + EL - ER= VON(CL)·iL(t) dt,
with an approximate solution for RL > 0Ω:
IL·L
2·RL
IL·RL
|VOUT(CL)|
E =
AS
·(Vbb +|VOUT(CL)|)· ln (1+
)
Semiconductor Group
Page 10
2003-Oct-01
BTS 640 S2
Figure 2a: Switching a lamp
Timing diagrams
IN
Figure 1a: Switching a resistive load,
change of load current in on-condition:
ST
IN
V
OUT
ST
t
don(ST)
t
doff(ST)
V
OUT
I
L
t
on
t
off
t
t
I
slc(IS)
slc(IS)
L
I
IS
t
Load 1
Load 2
I
IS
Figure 2b: Switching a lamp with current limit:
t
son(IS)
t
t
soff(IS)
The sense signal is not valid during settling time after turn or
change of load current.
IN
ST
Figure 1b: V turn on:
bb
IN
V
OUT
V
bb
I
I
L
I
L
IS
t
I
IS
ST
t
proper turn on under all conditions
Semiconductor Group
Page 11
2003-Oct-01
BTS 640 S2
Figure 4a: Overtemperature:
Figure 2c: Switching an inductive load:
Reset if T <T
j
jt
IN
IN
ST
ST
V
OUT
I
L
I
I
IS
L
T
I
J
IS
t
t
Figure 3a: Short circuit:
shut down by overtempertature, reset by cooling
Figure 5a: Open load: detection in ON-state,
open load occurs in on-state
IN
IN
I
I
L(SCp)
L
ST
I
L(SCr)
V
OUT
I
IS
I
L
normal
open
normal
ST
t
I
IS
t
Heating up may require several milliseconds, depending on
external conditions
I
L(SCp) = 50 A typ. increases with decreasing temperature.
Semiconductor Group
Page 12
2003-Oct-01
BTS 640 S2
Figure 6b: Undervoltage restart of charge pump
Figure 5b: Open load: detection in ON- and OFF-state
V
(with R
), turn on/off to open load
ON(CL)
EXT
V
on
IN
t
d(ST OL3)
ST
V
V
bb(over)
OUT
V
V
bb(o rst)
bb(u rst)
V
bb(u cp)
I
L
V
open load
bb(under)
V
bb
I
IS
charge pump starts at Vbb(ucp) =4.7 V typ.
t
Figure 7a: Overvoltage:
Figure 6a: Undervoltage:
IN
IN
ST
not defined
ST
V
V
V
ON(CL)
V
bb
bb(over)
bb(o rst)
V
bb
V
bb(u cp)
V
bb(under)
V
I
bb(u rst)
L
I
L
I
IS
I
t
IS
t
Semiconductor Group
Page 13
2003-Oct-01
BTS 640 S2
21
Figure 8b: Current sense ratio :
Figure 8a: Current sense versus load current:
15000
k
ILIS
1.3
[mA]
1.2
I
IS
1.1
1
10000
5000
0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
I
[A]
L
I
L
0 1 2 3 4 5 6 7 8 9 10 11 12 13
[A]
6
0
1
2
3
4
5
Figure 9a: Output voltage drop versus load current:
V
[V]
ON
0.2
R
ON
0.1
0.0
V
ON(NL)
I
L
[A]
0
1
2
3
4
5
6
7
8
21
This range for the current sense ratio refers to all
devices. The accuracy of the kILIS can be raised at
least by a factor of two by matching the value of
k
ILIS for every single device.
Semiconductor Group
Page 14
2003-Oct-01
BTS 640 S2
Package and Ordering Code
All dimensions in mm
Standard (=staggered): P-TO220-7-11
Straight: P-TO220-7-12
Sales Code
Sales code
BTS640S2
BTS640S2 S
Ordering code
Q67060-S6307-A5
Ordering code
Q67060-S6307-A7
±0.2
10
±0.2
10
A
A
±0.15
9.8
±0.15
9.8
B
8.51)
4.4
8.51)
4.4
3.7-0.15
3.7-0.15
1.27±0.1
0.05
1.27±0.1
0.05
C
C
±0.1
0.5
0.5±0.1
0...0.15
7x
2.4
0.6 ±0.1
0...0.15
1.27
2.4
7x
0.6 ±0.1
1.27
3.9±0.4
M
0.25
A B C
8.4±0.4
M
0.25
A C
1)
Typical
All metal surfaces tin plated, except area of cut.
1)
Typical
All metal surfaces tin plated, except area of cut.
Published by
Infineon Technologies AG,
St.-Martin-Strasse 53,
D-81669 München
© Infineon Technologies AG 2001
All Rights Reserved.
SMD: P-TO263-7-2 (tape&reel)
Sales code
BTS640S2 G
Ordering code
Q67060-S6307-A6
Attention please!
The information herein is given to describe certain components and
shall not be considered as a guarantee of characteristics.
±0.2
10
4.4
±0.15
9.8
±0.1
1.27
Terms of delivery and rights to technical change reserved.
A
B
8.5 1)
0.1
0.05
We hereby disclaim any and all warranties, including but not limited
to warranties of non-infringement, regarding circuits, descriptions
and charts stated herein.
2.4
Infineon Technologies is an approved CECC manufacturer.
Information
For further information on technology, delivery terms and conditions
and prices please contact your nearest Infineon Technologies Office
in Germany or our Infineon Technologies Representatives
worldwide (see address list).
0...0.15
6x1.27
7x0.6±0.1
0.5±0.1
8˚ max.
0.1
M
0.25
A B
Warnings
1)
Due to technical requirements components may contain dangerous
substances. For information on the types in question please contact
your nearest Infineon Technologies Office.
Typical
All metal surfaces tin plated, except area of cut.
Ordering code
Q67060-S6307-A6
Infineon Technologies Components may only be used in life-support
devices or systems with the express written approval of Infineon
Technologies, if a failure of such components can reasonably be
expected to cause the failure of that life-support device or system,
or to affect the safety or effectiveness of that device or system. Life
support devices or systems are intended to be implanted in the
human body, or to support and/or maintain and sustain and/or
protect human life. If they fail, it is reasonable to assume that the
health of the user or other persons may be endangered.
Semiconductor Group
Page 15
2003-Oct-01
相关型号:
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