RIC7S113L4_15 [INFINEON]
RADIATION HARDENED HIGH AND LOW SIDE GATE DRIVER;
| 型号： | RIC7S113L4_15 |
| 厂家： | 
Infineon |
| 描述： | RADIATION HARDENED HIGH AND LOW SIDE GATE DRIVER 栅极驱动 |
| 文件： | 总9页 (文件大小：226K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD-97828
RIC7S113L4
RADIATION HARDENED HIGH AND LOW SIDE GATE DRIVER
Product Summary
Features
n Total dose capability to 100 kRads(Si)
n Floating channel designed for bootstrap operation
n Fully operational to +400V
V
400V max.
2A / 2A
OFFSET
I +/-
O
n Tolerant to negative transient voltage
n dV/dt immune
n Gate drive supply range from 10 to 20V
n Undervoltage lockout for both channels
n Separate logic supply range from 5 to 20V
Logic and power ground ±5V offset
V
10 - 20V
120 & 100 ns
5 ns
OUT
(typ.)
t
on/off
Delay Matching(typ.)
Description
The RIC7S113L4 is a high voltage, high speed power
MOSFET and IGBT driver with independent high and low
side referenced output channels. Proprietary HVIC and
latch immune CMOS technologies enable ruggedized
monolithic construction. Logic inputs are compatible with
standard CMOS or LSTTL outputs. The output drivers
feature a high pulse current buffer stage designed for
minimum driver cross-conduction. Propagation delays are
matched to simplify use in high frequency applications.
The floating channel can be used to drive an N-channel
power MOSFET or IGBT in the high side configuration
which operates up to 400 volts.
n CMOS Schmitt-triggered inputs with pull-down
n Cycle by cycle edge-triggered shutdown logic
n Matched propagation delay for both channels
n Outputs in phase with inputs
n Hermetically Sealed
n Lightweight
Absolute Maximum Ratings
Absolute Maximum Ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are
absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured under board
mounted and still air conditions.
Symbol
Parameter
High Side Floating Supply Voltage
High Side Floating Supply Offset Voltage
High Side Floating Output Voltage
Low Side Fixed Supply Voltage
Low Side Output Voltage
Min.
-0.5
Max.
Units
V
V
V + 20
S
B
S
400
V + 0.5
B
V
V
V
- 0.5
HO
CC
S
-0.5
-0.5
-0.5
20
+ 0.5
V
LO
V
DD
V
SS
V
V
CC
Logic Supply Voltage
V
+ 20
+ 0.5
+ 0.5
SS
Logic Supply Offset Voltage
V
- 20
V
V
CC
SS
CC
DD
V
Logic Input Voltage (HIN, LIN & SD)
Allowable Offset Supply Voltage Transient (Figure 2)
V
- 0.5
IN
dV /dt
50
V/ns
W
s
P
D
Package Power Dissipation @ T
≤ +25°C
1.0
16.4
LEAD
R
thJC
Thermal Resistance, Junction to Case
13 (Typ)
120 (Typ)
24 (Typ)
-55
R
Thermal Resistance, Junction to Lead *
Thermal Resistance, Junction to Lid *
Junction Temperature
°C/W
thJ-LEAD
R
thJ-LID
T
J
125
150
300
T
S
Storage Temperature
-55
°C
g
T
L
Lead Temperature (Soldering, 10 seconds)
Weight
1.3(typical)
* Guaranteed by design, not tested
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1
08/14/15
Pre-Irradiation
RIC7S113L4
Recommended Operating Conditions
The Input/Output logic timing diagram is shown in Figure 1. The V and V
S
offset ratings are tested
SS
with all supplies biased at 15V differential.
Symbol
Parameter
High Side Floating SupplyAbsolute Voltage
High Side Floating Supply Offset Voltage
High Side Floating Output Voltage
Low Side Fixed Supply Voltage
Low Side Output Voltage
Min.
Max.
Units
V
B
V
S
V
+ 10
V + 20
S
400
S
-4
V
V
V
V
B
20
HO
S
10
V
CC
V
LO
0
V
CC
+ 20
V
DD
Logic Supply Voltage
V
+ 5
SS
-5
V
SS
V
SS
Logic Supply Offset Voltage
5
V
IN
Logic Input Voltage (HIN, LIN & SD)
V
SS
V
DD
Dynamic Electrical Characteristics
V
(V , V , V ) = 15V, and V
= COM unless otherwise specified. The dynamic electrical
SS
BIAS CC BS DD
characteristics are measured using the test circuit shown in Figure 3.
Tj = 25°C
Tj =
-55 to 125°C
Symbol
Parameter
Turn-On Propagation Delay
Turn-Off Propagation Delay
Shutdown Propagation Delay
Turn-On Rise Time
Min. Typ. Max. Min. Max. Units Test Conditions
t
on
120
100
110
25
150
125
140
35
260
220
235
50
V
= 0V
S
t
V
V
= 400V
= 400V
off
S
S
ns
t
sd
t
r
t
f
C
= 1000pf
= 1000pf
L
L
Turn-Off Fall Time
17
25
40
C
H
L
H
L
MT
Delay Matching, HS & LS Turn-On/Off
5
20
| t - t | or| t - t |
on on off off
Typical Connection
up to 40V
HO
VB
VDD
HIN
SD
VDD
HIN
SD
VS
TO
LOAD
LIN
VSS
VCC
COM
LO
LIN
VSS
VCC
2
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Pre-Irradiation
RIC7S113L4
Static Electrical Characteristics
V
(V , V , V ) = 15V, unless otherwise specified. The V , V
and I parameters are refer-
IN
BIAS CC BS DD
IN TH
and are applicable to all three logic input pins: HIN, LIN and SD. The V and I parameters
enced to V
SS
O
O
are referenced to COM or V and are applicable to the respective output pins: HO or LO.
S
Tj = 25°C
Tj =
-55 to 125°C
Symbol
Parameter
Min.
3.1
Max.
Min.
Max. Units Test Conditions
V
Logic 1 Input Voltage
3.3
V
= 5V
= 10V
= 15V
= 20V
= 5V
IH
DD
6.4
6.8
10
13.3
V
DD
V
DD
V
DD
V
V
9.5
12.5
1.6
3.8
6.0
8.3
1.2
0.1
50
V
Logic 0 Input Voltage
1.6
3.6
5.7
7.9
1.5
0.1
250
500
600
60
V
IL
DD
DD
DD
DD
V
V
V
= 10V
= 15V
= 20V
V
High Level Output Voltage, V
- V
O
V
V
=V
=V
I
I
= 0A
= 0A
OH
BIAS
IN
IN
IH,
IH,
O
V
Low Level Output Voltage, V
OL
O
O
I
LK
Offset Supply Leakage Current
V
= V = 400V
B
IN
IN
IN
S
I
Quiescent V
Quiescent V
Quiescent V
Supply Current
Supply Current
Supply Current
230
340
30
µA
V
=0V or V
DD
QBS
QCC
QDD
BS
CC
DD
I
I
V
V
=0V or V
,
DD
DD
=0V or V
,
I
Logic 1 Input Bias Current
Logic 0 Input Bias Current
40
70
V
= V
IN DD
IN+
I
1.0
9.7
10
V
= 0V
IN
IN-
V
V
BS
Supply Undervoltage Positive
7.5
BSUV+
Going Threshold
Supply Undervoltage Negative
V
V
BS
7.0
7.4
7.0
2.0
2.0
9.4
9.6
9.4
BSUV-
Going Threshold
Supply Undervoltage Positive
V
V
CC
V
A
CCUV+
Going Threshold
V Supply Undervoltage Negative
CC
Going Threshold
Output High Short Circuit Pulsed
Current *
Output Low Short Circuit Pulsed
Current *
V
CCUV-
I
V
O
= 0V, V = V
PW < 10 µs
O+
IN
DD
I
O-
V
O
= 15V, V = 0V
IN
PW < 10 µs
* Guaranteed by design, not tested
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3
RIC7S113L4
Radiation characteristics
Radiation Performance
International Rectifier Radiation Hardened gate drivers are tested to verify their hardness capability. The
hardness assurance program at International rectifier uses a Cobalt-60 (60 Co) source and heavy ion
irradiation.
Every wafer shall be tested per MIL-STD-883, Method 1019, test condition A “Ionizing Radiation
(Total Dose) Test Procedure”.
Both pre- and post- irradiation performances are tested and specified using the same drive circuitry and test
conditions to provide a direct comparison.
For Static Irradiation Test Conditions refer to Figure 7.
Static Electrical Characteristics
Symbol Parameter
Tj = 25°C
100K Rads (Si)
Units
Test Conditions
Min
Max
VIH
Logic “1” Input Voltage
3.1
6.4
9.5
12.5
—
—
—
—
VDD = 5V
VDD = 10V
VDD = 15V
VDD = 20V
VDD = 5V
VDD = 10V
VDD = 15V
VDD = 20V
V
—
VIL
Logic “0” Input Voltage
1.6
3.8
6.0
8.3
—
V
—
V
High Level Output Voltage, V
- V
—
7.5
1.2
0.1
50
V
=V
=V
I
= 0A
= 0A
OH
BIAS
O
IN
IH, O
V
I
Low Level Output Voltage, V
V
IN
I
OL
O
IH, O
Offset Supply Leakage Current
VB =VS = 400V
LK
I
Quiescent V
Quiescent V
Quiescent V
Supply Current
Supply Current
Supply Current
230
340
30
VIN =0V or VDD
VIN =0V or VDD
VIN =0V or VDD
VIN =VDD
QBS
BS
CC
DD
I
QCC
QDD
µA
I
I
Logic 1 Input Bias Current
Logic 0 Input Bias Current
40
IN+
I
1.0
9.7
VIN =0V
IN-
V
V
Supply Undervoltage Positive
BS
BSUV+
Going Threshold
Supply Undervoltage Negative
V
V
BS
7.0
7.4
7.0
2.0
2.0
9.4
9.9
9.6
BSUV-
Going Threshold
V Supply Undervoltage Positive
CC
Going Threshold
V Supply Undervoltage Negative
CC
V
V
CCUV+
V
CCUV-
Going Threshold
I
Output High Short Circuit Pulsed
Current *
VO =0V, VIN =VDD
PW < 10 µs
O+
A
I
O-
Output Low Short Circuit Pulsed
VO =15V, VIN =0V
PW < 10 µs
Current *
* Guaranteed by design, not tested
4
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Radiation characteristics
RIC7S113L4
International Rectifier radiation hardened Gate Drivers have been characterized in heavy ion environment
for Single Event Effects (SEE). Single Event Effects characterization data is illustrated in Table and Curve
below. For Static Bias Test Conditions refer to Figure 8.
Single Event Effect Safe Operating Area
VS (V)
Ion
LET
(MeV/(mg/cm2))
27.2
Energy
Range
V
CC/VDD
(MeV)
(µm)
B
B B
V = 15V V = 17.5V
V = 10V
Kr
1089
1618
143
20V
20V
400
300
400
175
375
125
Xe
50.4
128.7
Static Bias
450
400
350
300
250
200
150
100
50
Kr
Xe
0
7.5
10
12.5
15
17.5
20
B
Bias V (V)
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5
RIC7S113L4
HV=10to400V
RIC7113
IRF820A
Figure 1. Input/Output Logic
Timing Diagram
Figure 2. Floating Supply Voltage Transient Test Circuit
50%
50%
HIN
LIN
(0to400V)
RIC7113
t
t
t
t
f
on
r
off
90%
90%
HO
LO
10%
10%
Figure 3. Switching Time Test Circuit
Figure 4. Switching Time Waveform Definition
50%
50%
HIN
LIN
SD
LO
HO
50%
10%
t
sd
MT
MT
HO
LO
90%
90%
LO
HO
Figure 5. Shutdown Waveform Definitions
Figure 6. Delay Matching Waveform Definitions
6
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RIC7S113L4
RIC7113
4K
4K
VB
VDD
HIN
1 nF
20V
HO
VS
20V
Logic
VCC
2.4K
1 nF
LIN
SD
LO
50
400V
COM
VSS
4K
Figure 7. Static Bias Conditions for Total Ionizing DoseTest
Figure 8. Static Bias Conditions for Single Event Effect Test
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7
RIC7S113L4
Functional Block Diagram
V
B
UV
DETECT
VDD
R
R
S
Q
HV
LEVEL
SHIFT
PULSE
FILTER
HO
R
Q
S
V
/V
DD
HIN
SD
LEVECLC
SHIFT
PULSE
GEN
VS
VCC
UV
DETECT
VDD /VCC
LEVE L
SHIFT
LIN
VSS
LO
S
R
Q
DELAY
COM
Lead Definitions
Symbol Description
V
DD
Logic supply
HIN
SD
Logic input for high side gate driver output (HO), in phase
Logic input for shutdown
LIN
Logic input for low side gate driver output (LO), in phase
Logic ground
V
SS
V
B
High side floating supply
HO
High side gate drive output
High side floating supply return
Low side supply
V
S
V
CC
LO
Low side gate drive output
COM
Low side return
8
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RIC7S113L4
Case Outline and Dimensions — MO-036AB Package
IRWORLDHEADQUARTERS:101N.SepulvedaBlvd., ElSegundo,California90245,USATel:(310)252-7105
IRLEOMINSTER:205CrawfordSt., Leominster,Massachusetts01453,USATel:(978)534-5776
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.
Data and specifications subject to change without notice. 08/2015
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