SCE5745P [INFINEON]
Smart/Normal 5 X 7 Dot Matrix LED Display, 4-Character, 4.6mm;
| 型号： | SCE5745P |
| 厂家： | 
Infineon |
| 描述： | Smart/Normal 5 X 7 Dot Matrix LED Display, 4-Character, 4.6mm |
| 文件： | 总15页 (文件大小：589K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
STANDARD RED SCE5740
YELLOW SCE5741
HIGH EFFICIENCY RED SCE5742
GREEN SCE5743
HIGH EFFICIENCY GREEN SCE5744
ORANGE SCE5745
0.180" 4-Character 5 x 7 Dot Matrix
Serial Input Dot Addressable
Intelligent Display® Devices
Dimensions in Inches (mm)
0.180
(4.57)
0.400 .015
(10.16 .38)
0.784 (19.91)
ALSO AVAILABLE WITH OPTIONS
(see pages 14 and 15)
DESCRIPTION
The SCE574x is a four digit, dot addressable 5 x 7 dot matrix, serial
input, alphanumeric Intelligent Display device. The four digits are
packaged in a rugged, high quality, optically transparent, plastic 14 pin
DIP with 0.1" pin spacing.
• SCE574xP-SIP
• SCE574xQ-SIP with right angle bends
FEATURES
The SCE574xP is a SIP version of SCE574x. The SCE574xQ is also a
SIP version of the SCE574x but the leads are at right angles to the
package so that the part can be mounted vertically. The SIP version
parts have only 7 pins. The SIP parts do not have the option of using
an external clock. All the electrical descriptions for the SCE574x apply
to the SIP versions except the allusions to the external clock.
• Four 0.180" (4.57 mm) 5 x 7 Dot Matrix Characters
in Red, Yellow, High Efficiency Red, Green, High
Efficiency Green, Orange
• Optimum Display Surface Efficiency
(display area to package ratio)
• High Speed Data Input Rate: 5.0 MHz
• ROMless Serial Input, Dot Addressable Display
Ideal for User Defined Characters
• Built-in Decoders, Multiplexers and LED Drivers
• Wide Viewing Angle, X Axis 55°, Y Axis 55°
The on-Board CMOS has a 140 bit RAM, one bit associated with one
LED, each to generate User Defined Characters. In Power Down
Mode, quiescent current is <50 µA.
The SCE574x is designed for work with the serial port of most com-
mon microprocessors. Data is transferred into the display through the
Serial Data Input (DATA), clocked by the Serial Data Clock (SDCLK),
and enabled by the Load Input (LOAD).
ATTRIBUTES
– 140 Bit RAM for User Defined Characters
– Eight Dimming Levels plus eight fine dimming
levels.
– Power Down Model (<250 mW)
– Hardware/Software Clear Functions
– External Clock-SCE574x only
The SCE574x Clock I/O (Clk I/O) and Clock Select (CLKSEL) pins offer
the user the capability to supply a high speed external multiplex clock.
This feature can minimize audio in-band interference for portable com-
munication equipment or eliminate the visual synchronization effects
found in high vibration environments such as avionic equipment.
(Description continued on next page)
2000 Infineon Technologies Corp. • Optoelectronics Division • San Jose, CA
www.infineon.com/opto • 1-888-Infineon (1-888-463-4636)
OSRAM Opto Semiconductors GmbH & Co. OHG • Regensburg, Germany
www.osram-os.com • +49-941-202-7178
1
March 28, 2000-10
DESCRIPTION (continued)
A divide by 16 prescalar is built into the part and can be
accessed by software to reduce the multiplex frequency if a
high speed external clock is used.
Maximum Ratings
DC Supply Voltage............................................–0.5 to +7.0 Vdc
Input Voltage Levels Relative
to Ground............................................... –0.5 to V +0.5 Vdc
CC
Operating Temperature .....................................–40°C to +85°C
Storage Temperature.......................................–40°C to +100°C
Maximum Solder Temperature 0.063"
below Seating Plane, t<5.0 s........................................ 260°C
Relative Humidity at 85°C ...................................................85%
Maximum Number of LEDs at 100% Brightness................... 64
Maximum Power Dissipation ............................................0.6 W
ESD (100 pF, 1.5 kW)........................................................ 2.0 kV
Maximum Input Current .................................................130 mA
Electrical Characteristics (over operating temperature)
Parameter
Min.
4.5
—
Typ.
5.0
—
Max.
5.5
Units
V
Conditions
V
—
CC
(1)(2)
I
I
(Power Down)
50
µA
V
=5.0 V, all inputs=0 V or V
CC
CC
CC
(3)
4 digits 20 dots/character
90
115
130
mA
V
=5.0 V, “#” displayed in all 4 digits
CC
CC
at 100% brightness at 25°C
I
I
Input current
Input current
—
—
–10
10
µA
µA
V
V
V
V
V
=5.0 V, V =0 (all inputs)
IN
IL
CC
CC
CC
CC
—
=V =5.0 V (all inputs)
IH
—
IN
V
V
3.5
—
—
=4.5 V to 5.5 V
=4.5 V to 5.5 V
IH
IL
—
—
1.5
1086
45
V
Row Multiplex Rate
375
—
768
—
Hz
°C/W
—
—
θ
JC-pin
Notes:
1)
Unused inputs must be tied high.
2)
3)
External oscillator must be stopped.
5
Peak current /3 x I
CC.
Electrical Characteristics for SCE574x only
Parameter
Min.
—
Typ.
–28
23
—
Max.
—
Units
mA
mA
MHz
kHz
pF
Conditions
I
(CLK I/O)
(CLK I/O)
V
V
V
V
=4.5 V, V =2.4 V
OH
OH
OL
CC
CC
CC
CC
I
—
—
=4.5 V, V =0.4 V
OL
F
F
External Clock Input Frequency 120
Internal Clock Input Frequency 120
3
=5.0 V, CLKSEL=0
=5.0 V, CLKSEL=1
ext
—
347
240
500
500
osc
Clock I/O Bus Loading
Clock Out Rise Time
Clock Out Fall Time
—
—
—
—
—
—
ns
V
=4.5 V, V =2.4 V
OH
CC
CC
—
ns
V
=4.5 V, V =0.4 V
OH
2000 Infineon Technologies Corp. • Optoelectronics Division • San Jose, CA
www.infineon.com/opto • 1-888-Infineon (1-888-463-4636)
OSRAM Opto Semiconductors GmbH & Co. OHG • Regensburg, Germany
www.osram-os.com • +49-941-202-7178
SCE5740/1/2/3/4/5
March 28, 2000-10
2
Switching Specifications
(over operating temperature range and V =4.5 V to 5.5 V)
Optical Characteristics at 25°C
(V =5.0 V at 100% brightness level, viewing angle:
CC
CC
X axis ±55°, Y axis ±±5°)
Symbol
Description
Min.
600
50
Units
ns
T
T
T
T
T
T
T
T
T
Reset Active Time
Load Setup Time
Data Setup Time
Clock Period
RC
Red SCE5740
ns
Description
Sym. Min.
Typ.
60
Units
µcd/dot
nm
LDS
DS
50
ns
Luminous Intensity
Peak Wavelength
Dominant Wavelength
I
30
—
—
V
200
70
ns
λ
λ
655
639
SDCLK
SDCW
LDH
DH
peak
dom
Clock Width
ns
nm
Load Hold Time
Data Hold Time
Total Write Time
Time Between Loads
0
ns
Yellow SCE5741
Description
25
ns
Sym. Min.
Typ.
150
583
585
Units
µcd/dot
nm
2.2
600
µs
WR
Luminous Intensity
Peak Wavelength
Dominant Wavelength
I
60
—
—
V
ns
BL
λ
λ
peak
dom
Note:
nm
T
is the minimum time the SDCLK may be low or high.
SDCW
The SDCLK period must be a minimum of 200 ns.
High Efficiency Red SCE5742
Description
Sym. Min.
Typ.
150
630
620
Units
µcd/dot
nm
Luminous Intensity
Peak Wavelength
Dominant Wavelength
I
60
—
—
V
λ
λ
peak
dom
nm
Green SCE5743
Description
Sym. Min.
Typ.
150
565
573
Units
µcd/dot
nm
Luminous Intensity
Peak Wavelength
Dominant Wavelength
I
60
—
—
V
λ
λ
peak
dom
nm
High Efficiency Green SCE5744
Description
Sym. Min.
Typ.
180
568
574
Units
µcd/dot
nm
Luminous Intensity
Peak Wavelength
Dominant Wavelength
I
80
—
—
V
λ
λ
peak
dom
nm
Orange SCE5745
Description
Sym. Min.
Typ.
150
605
610
Units
µcd/dot
nm
Luminous Intensity
Peak Wavelength
Dominant Wavelength
I
60
—
—
V
λ
λ
peak
dom
nm
Notes:
1. Dot to dot intensity matching at 100% brightness is 1.8:1.
2. Displays within a given intensity category have an intensity match-
ing of 1.5:1 (max.)
2000 Infineon Technologies Corp. • Optoelectronics Division • San Jose, CA
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www.osram-os.com • +49-941-202-7178
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3
Figure 1. Timing Diagram—Data Write Cycle
T
LDS
LOAD
T
T
DS
LDH
DATA
D0
D7
T
DH
SDCLK
T
SDCW
T
SDCLK
Figure 2. Timing Diagram—Instruction Cycle
T
WR
T
BL
LOAD
SDCLK
DATA
LOAD
SDCLK
DATA
D2
D5
D1
D0
D3
D4
D7
D0
D6
OR
D2
D5
D1
D0
D3
D4
D7
D0
D6
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www.osram-os.com • +49-941-202-7178
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4
Display Column and Row Format
Pin Assignment
C0
1
C1
1
C2
1
C3
1
C4
1
Pin
Function
Pin
Function
Row 0
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
1
V
RESET
6
CC
0
0
1
0
0
2
3
4
5
Load
7
GROUND
CLK I/O
0
0
1
0
0
Data
8
0
0
1
0
0
no connection
SDCLK
9 –13
14
No Pins
0
0
1
0
0
CLK SELECT
0
0
1
0
0
Figure 6. Dot Matrix Format
0
0
1
0
0
0.175
(4.45)
0.043
(1.09)
typ.
Column Data Ranges
Row 0
Row 1
Row 2
Row 3
00H to 1FH
00H to LFH
00H to LFH
00H to LFH
Row 4
00H to LFH
00H to LFH
00H to LFH
C1 C2 C3 C4 C5
R0
R1
R2
R3
R4
R5
Row 5
Row 6
0.270
(6.86)
Input/Output Circuits
Figures 3 and 4 show the input and output resistor/diode
networks used for ESD protection and to eliminate substrate
latch-up caused by input voltage over/under shoot.
0.009
(0.23)
typ.
R6
0.045
(1.14) typ.
Figure 3. Inputs
Dimensions in inches (mm)
Tolerance:.XXX .010 (.25)
V
CC
input
Pin Definitions
Pin
1
Function
Definitions
1 kΩ
V
Power supply
CC
2
LOAD
Low input enables data clocking
into 8-bit serial shift register.
When load goes high, the con-
tents of 8-bit serial shift register
will be decoded.
GND
Figure 4. Clock I/O (SCE574x only).
V
CC
3
4
5
DATA
N/C
Serial input data
input/output
—
SDCLK
For loading data into the 8-bit
serial data register
1 kΩ
6
RST
Asynchronous input, when low
clears the multiplex counter,
address register, control word reg-
ister, user RAM and data register.
Control word register is set to
100% brightness. The display will
be blank.
GND
Figure 5. Top View
14
8
Pins
7
8
GND
Supply ground
CLK I/O
Outputs Master Clock or inputs
External Clock
9–13
No Pins
CLKSEL
—
Digit 0
1
Digit1
Digit 2
Pins
Digit 3
14
High=Internal Clock (Master)
Low=External Clock (Slave)
7
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Figure 7. Block Diagram
RST
CLK I/O
CLKSEL
– 7
Counter
– 64
Counter
Row Control Logic
and Row Drivers
OSC
Mux
Rate
Rows
0 to 6
Data
SDCLK
Display
Column
Drivers
Digit
User RAM
Memory
Load
Columns
0 to 20
0 to 4
0
1
2
3
7x20 Bits
X Address Decode
3 Bit Address Register
6 Bit Control
Word Register
Control Word Logic
Operation of the SCE574x
The SCE574x display consists of a CMOS IC containing control
logic and drivers for four 5 x 7 characters. These components
are assembled in a compact plastic package.
The following explains how to format the serial data to be
loaded into the display. The user supplies a string of bit mapped
decoded characters. The contents of this string is shown in Fig-
ure 8a. Figure 8b shows that each character consist of eight 8
bit words. The first word encodes the display character location
and the succeeding seven bytes are row data. The row data
represents the status (On, Off) of individual column LEDs. Fig-
ure 8c shows that each 8 bit word is formatted to represent
Character Address, or Column Data.
Individual LED dot addressability allows the user great freedom
in creating special characters or mini-icons.
The serial data interface provides a highly efficient interconnec-
tion between the display and the mother board. The SCE574x
requires only three lines as compared to 14 lines for an equiva-
lent four character parallel input part.
Figure 8d shows the sequence for loading the bytes of data.
Bringing the LOAD line low enables the serial register to accept
data. The shift action occurs on the low to high transition of the
serial data clock (SDCLK). The least significant bit (D0) is loaded
first. After eight clock pulses the LOAD line is brought high.
With this transition the OPCODE is decoded. The decoded
OPCODE directs D4–D0 to be latched in the Character Address
register, stored in the RAM as Column data, or latched in the
Control Word register. The control IC requires a minimum 600
ns delay between successive byte loads.
The on-board CMOS IC is the electronic heart of the display.
The IC accepts decoded serial data, which is stored in the inter-
nal RAM. Asynchronously the RAM is read by the character
multiplexer at a strobe rate that results in a flicker free display.
Figure 7 shows the three functional areas of the IC. These
include: the input serial data register and control logic, a 140
bits two port RAM, and an internal multiplexer/display driver.
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www.osram-os.com • +49-941-202-7178
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6
Figure 8. Loading Serial Character Data
Example: Serial Clock=5.0 MHz, Clock Period=200 ns
352 Clock Cycles, 70.4 µs
Character 0 Character 1 Character 2 Character 3
a.
b.
88 Clock Cycles, 17.6 µs
Character 0
Address
Row 0
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
Column Data Column Data Column Data Column Data Column Data Column Data Column Data
11 Clock Cycles, 2.2 µs
11 Clock Cycles, 2.2 µs
Time
Between
Loads
Time
Between
Loads
Column Data
Character Address
D0 D1 D2 D3 D4 D5 D6 D7
OPCODE
OPCODE
c.
D0 D1 D2 D3 D4 D5 D6 D7
0
0
0
0
0
1
0
1
D
D
D
D
D
0
0
0
600ns(min)
600ns(min)
LOAD
Clock
Serial
Clock
Period
DATA
d.
D0
0
D1
D2
D3
D4
D5
D6
D7
Time between Loads
t
Table 1 shows the Row Address for the example character
Figure 9. Row and Column Locations for a Character “D”
“D.” Column data is written and read asynchronously from the
140 bit RAM. Once loaded the internal oscillator and character
multiplexer reads the data from the RAM. These characters are
row strobed with column data as shown in Figures 9 and 10.
The character strobe rate is determined by the internal or user
supplied external MUX Clock, the IC’s counter and the pres-
caler.
off LED
on LED
Row 0
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
Table 1. Character “D”
Op code
D 7 D 6 D 5
Column Data
D4 D3 D2 D1 D0
C0 C1 C2 C3 C4
Hex
0
1 2 3 4
Columns
Row 0
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
1
1
0
0
0
0
0
1
1
0
0
0
0
0
1
0
1
1
1
1
1
0
1E
11
11
11
11
11
1E
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7
Figure 10. Row Strobing
ROW LOAD
LOAD ROW 0
LOAD ROW 1
LOAD ROW 2
LOAD ROW 3
LOAD ROW 4
LOAD ROW 5
LOAD ROW 6
Row 0
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
Row 0
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
Row 0
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
Row 0
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
Row 0
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
Row 0
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
Row 0
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
0
1
2
3
4
0
1
2
3
4
0
1
2
3
4
0
1
2
3
4
0
1
2
3
4
0
1
2
3
4
0 1 2 3 4
Columns
Columns
Columns
Columns
Columns
Columns
Columns
Multiplexer and Display Driver
The four characters are row multiplexed with RAM resident col-
umn data. The strobe rate is established by the internal or
external MUX Clock rate. The MUX Clock frequency is divided
by a 448 counter chain. This results in a typical strobe rate of
768 Hz. By pulling the Clock SEL line low, the display can be
operated from an external MUX Clock. The external clock is
attached to the CLK I/O connection (pin 8). The maximum
external MUX Clock frequency should be limited to 3 MHz.
When a high speed external clock is used the frequency can be
further divided down by 16 by using the built in prescaler. In the
control word format data bit D4 is set high (D4=1). It is not rec-
ommended to use the prescaler with the internal clock.
An asynchronous hardware Reset (pin 6) is also provided.
Bringing this pin low will clear the Character Address Register,
Control Word Register, RAM, and blanks the display. This
action leaves the display set at Character Address 0, and the
Brightness Level set at 100%.
The user can activate four Control functions. These include: LED
Brightness Level, IC Power Down, Prescaler, or Display Clear.
OPCODEs and six bit words are used to initiate these functions.
The OPCODEs and Control Words for the Character Address
and Loading Column Data are shown in Tables 2 and 3.
Basic Instruction Set
Instruction
Opcode
Address/Data
Comments
LCD
000
101
110
111
D4
X
D3
X
D2
A2
B2
B2
D1
A1
B1
B1
D0
A0
B0
B0
Load Column Data
Load Digit Address
Software Clear
LDA
SCL
PS
PS
B3
B3
LCWD
Load Control Word Data
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Control Word Register:
The Control Word is a 5 bit write only register which controls
the display attributes. Below are the truth tables which defines
each bit in the Control Word Register and a description of their
functions.
Control Word Format
D7
1
D6
1
D5
1
D4
PS
D3
B3
D2
B2
D1
B1
D0
B0
Pre-Scalar
PS=1
B2 B1 B0 Brightness
MUX Clock/16
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
100%
53%
40%
27%
20%
13%
6.6%
=0
No divide
by 16
Blank Display &
Power Down
0
1
Full Peak Current
Reduce Peak Current to 12.5%
Table 2. Load Character Address
Op code
D 7 D 6 D 5
Character Address
D4 D3 D2 D1 D0
Hex Operation
Load
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
1
0
1
A0
A1
A2
A3
Character 0
Character 1
Character 2
Character 3
Table 3. Load Column Data
Op code
Column Data
Operation Load
D 7 D 6 D 5
D4 D3 D2 D1 D0
C0 C1 C2 C3 C4
C0 C1 C2 C3 C4
C0 C1 C2 C3 C4
C0 C1 C2 C3 C4
C0 C1 C2 C3 C4
C0 C1 C2 C3 C4
C0 C1 C2 C3 C4
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Row 0
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
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9
The user can select eight specific LED brightness levels (Table
4) by changing the peak current driving the LEDs. The peak cur-
rent is varied by varying the ON time of the row drivers. Note
that data line 3 is low (logic 0).
The SCE574x offers a unique Display Power Down feature which
reduces I to less than 50 µA. When EF is loaded (Table 6) the
display is set to 0% brightness. When in the Power Down mode
data may still be written into the RAM. The display is reactivated by
loading a new brightness Level Control Word into the display.
CC
HEX
If dimming is required with finer control between 12.5% bright-
ness and 0.0% brightness, data line 3 can be set high (logic 1).
The 12.5% peak current is now the brightness reference
(100%-E8) for further dimming and as shown in Table 5 eight
levels of dimming are provided. For example the hex code EC
in Table 5 will provide a brightness level 29% lower than the
12.5% brightness level.
Table 6. Power Down
Op code
D7 D6 D5
Control Word
D4 D3 D2 D1 D0
Hex Operation
Level
1
1
1
0
1
1
1
1
EF
0%
brightness
Table 4. Display Brightness
The Software Clear (C0
), given in Table 7, clears the
HEX
Op code
Control Word
Hex Brightness
Level
Address Register and the RAM. The display is blanked and the
Character Address Register will be set to Character 0. The
internal counter and the Control Word Register are unaffected.
The Software Clear will remain active until the next data input
cycle is initiated.
D7 D6 D5 D4 D3 D2 D1 D0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
E0
E1
E2
E3
E4
E5
E6
E7
100%
53%
40%
27%
20%
13%
6.6%
0.0%
Table 7. Software Clear
Op code
Control Word
Hex Operation
D7 D6 D5
D4 D3 D2 D1 D0
1
1
0
0
0
0
0
0
C0
CLEAR
Table 5. Display Brightness
Op code Control Word
D7 D6 D5 D4 D3 D2 D1 D0
Hex Brightness
Level
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
E8
E9
EA
EB
EC
ED
EE
EF
100%
53%
40%
27%
20%
13%
6.6%
0.0%
2000 Infineon Technologies Corp. • Optoelectronics Division • San Jose, CA
www.infineon.com/opto • 1-888-Infineon (1-888-463-4636)
OSRAM Opto Semiconductors GmbH & Co. OHG • Regensburg, Germany
www.osram-os.com • +49-941-202-7178
SCE5740/1/2/3/4/5
March 28, 2000-10
10
Electrical and Mechanical Considerations
Thermal Considerations
Optical Considerations
The 0.180" high character of the SCE574x gives readability up
to five feet. Proper filter selection enhances readability over
this distance.
Optimum product performance can be had when the following
electrical and mechanical recommendations are adopted. The
IC is constructed in a high speed CMOS process, consequently
noise on the SERIAL DATA, SERIAL DATA CLOCK, LOAD and
RESET lines may cause incorrect data to be written into the
serial shift register. Adhere to transmission line termination
procedures when using fast line drivers and long cables
(>10 cm).
Using filters emphasizes the contrast ratio between a lit LED
and the character background. This will increase the discrimina-
tion of different characters. The only limitation is cost. Take into
consideration the ambient lighting environment for the best
cost/benefit ratio for filters.
Incandescent (with almost no green) or fluorescent (with
almost no red) lights do not have the flat spectral response of
sunlight. Plastic band-pass filters are an inexpensive and effec-
tive way to strengthen contrast ratios. The SCE5740 is a red
display and should be used with long wavelength pass filter
having a sharp cut-off in the 600 nm to 620 nm range. The
SCE5742 is a high efficiency red display and should be used
with long wavelength pass filter having a sharp cut-off in the
570 nm to 600 nm range. The SCE5744 is a high efficiency
green display and should be used with long wavelength pass
filter that peaks at 565 nm.
Good ground and power supply decoupling will insure that I
(<400 mA peak) switching currents do not generate localized
ground bounce. Therefore it is recommended that each display
CC
package use a 0.1 µF and 0 µF capacitor between V and
CC
ground.
When the internal MUX Clock is being used connect the
CLKSEL pin to V . In those applications where RESET will not
CC
be connected to the system’s reset control, it is recommended
that this pin be connected to the center node of a series 0.1, µF
and 100 kΩ RC network. Thus upon initial power up the RESET
will be held low for 10 ms allowing adequate time for the sys-
tem power supply to stabilize.
Additional contrast enhancement is gained by shading the
displays. Plastic band-pass filters with built-in louvers offer the
next step up in contrast improvement. Plastic filters can be
improved further with anti-reflective coatings to reduce glare.
ESD Protection
The input protection structure of the SCE574x provides signifi-
cant protection against ESD damage. It is capable of withstand-
ing discharges greater than 2.0 kV. Take all the standard
precautions, normal for CMOS components. These include
properly grounding personnel, tools, tables, and transport carri-
ers that come in contact with unshielded parts. If these condi-
tions are not, or cannot be met, keep the leads of the device
shorted together or the parts in anti-static packaging.
Optimal filter enhancements are gained by using circular polar-
ized, anti-reflective, band-pass filters. The circular polarizing fur-
ther enhances contrast by reducing the light that travels
through the filter and reflects back off the display to less
than 1%.
Several filter manufacturers supply quality filter materials.
Some of them are: Panelgraphic Corporation, W. Caldwell, NJ;
SGL Homalite, Wilmington, DE; 3M Company, Visual Products
Division, St. Paul, MN; Polaroid Corporation, Polarizer Division,
Cambridge, MA; Marks Polarized Corporation, Deer Park, NY,
Hoya Optics, Inc., Fremont, CA.One last note on mounting fil-
ters: recessing displays and bezel assemblies is an inexpensive
way to provide a shading effect in overhead lighting situations.
Several Bezel manufacturers are: R.M.F. Products, Batavia, IL;
Nobex Components, Griffith Plastic Corp., Burlingame, CA;
Photo Chemical Products of California, Santa Monica, CA;
I.E.E.-Atlas, Van Nuys, CA. The trade-off is fuzzy characters.
Mounting the filters close to the display reduces this effect.
Take care not to overheat the plastic filter by allowing for
proper air flow.
Soldering Considerations
The SCE574x can be hand soldered with SN63 solder using a
grounded iron set to 260°C.
Wave soldering is also possible following these conditions: Pre-
heat that does not exceed 93°C on the solder side of the PC
board or a package surface temperature of 85°C. Water soluble
organic acid flux (except carboxylic acid) or rosin-based RMA
flux without alcohol can be used.
Wave temperature of 245°C 5°C with a dwell between 1.5 sec.
to 3.0 sec. Exposure to the wave should not exceed tempera-
tures above 260°C for five seconds at 0.063" below the seating
plane. The packages should not be immersed in the wave.
Microprocessor Interface
Post Solder Cleaning Procedures
The microprocessor interface is through the serial port, SPI
port or one out of eight data bits on the eight bit parallel port
and also control lines SDCLK and LOAD.
The least offensive cleaning solution is hot D.I. water (60°C) for
less than 15 minutes. Addition of mild saponifiers is accept-
able. Do not use commercial dishwasher detergents.
Power Up Sequence
For faster cleaning, solvents may be used. Exercise care in
choosing solvents as some may chemically attack the nylon
package. For further information refer to Appnotes 18 and 19.
Upon power up display will come on at random. Thus the dis-
play should be reset at power-up. The reset will set the
Address Register to Digit 0, User RAM is set to 0 (display
blank) the Control Word is set to 0 (100% brightness) and the
internal counters are reset.
An alternative to soldering and cleaning the display modules is
to use sockets. Naturally, 14 pin DIP sockets .300” wide with
.100" centers work well for single displays. Multiple display
assemblies are best handled by longer SIP sockets or DIP sock-
ets when available for uniform package alignment.
2000 Infineon Technologies Corp. • Optoelectronics Division • San Jose, CA
www.infineon.com/opto • 1-888-Infineon (1-888-463-4636)
OSRAM Opto Semiconductors GmbH & Co. OHG • Regensburg, Germany
www.osram-os.com • +49-941-202-7178
SCE5740/1/2/3/4/5
March 28, 2000-10
11
Figure 11. Display Interface to Siemens/Intel 8031
Microprocessor (using serial port in mode 0)
V
CC
V
CC
10
11
40
RxD
TxD
18
XTAL2
5
2
SDCLK
3
1
DATA
22 µf
TAN
+
LD
ID
XTAL1
19
9
U1
8031
V
6
7
P3.7 17
CC
V
CC
RST
RST
14
8
CLKSEL
CLK I/O
P3.3 13
P3.4 14
.01 µf
GND
Figure 12. Display Interface to Siemens/Intel 8031
Microprocessor (using one bit of parallel port as serial port)
VCC
VCC
10
11
16
40 P3.0
18
19
P3.1
P3.6
XTAL2
5
2
SDCLK
LD
3
DATA
VCC
22 µF
TAN
+
39
P0.0
ID
XTAL1
U1
8031
1
14
8
RST
GND
VCC
CLKSEL
CLK I/O
6
7
.01 µF
1
9
RST
P1.0
20
Figure 13. Display Interface with Motorola 68HC05C4
Microprocessor (using SPI port)
VCC
VCC
5
2
SDCLK
LD
3
1
14
8
11
10
33
32
DATA
40
PA0
PA1
38
39
22 µF
TAN
OSC1
OSC2
ID
+
SCLK
MOSI
VCC
CS
RST
6
7
GND
CLK I/O
.01 µF
U1
68HC05C4
VCC
1
9
RST
PA2
20
2000 Infineon Technologies Corp. • Optoelectronics Division • San Jose, CA
www.infineon.com/opto • 1-888-Infineon (1-888-463-4636)
OSRAM Opto Semiconductors GmbH & Co. OHG • Regensburg, Germany
www.osram-os.com • +49-941-202-7178
SCE5740/1/2/3/4/5
March 28, 2000-10
12
Figure 14. Cascading Multiple Displays using only the SCE574x.
RST
VCC
CLK SEL
RST CLK I/O
Intelligent Display
SDCLK LOAD
RST CLK I/O
CLK SEL
LOAD
14 more displays
in between
Intelligent Display
DATA
DATA SDCLK
DATA
SDCLK
0
A0
A1
A2
A3
Chip
Address
Decoder
Address Decode 1–14
15
CE
LD
Multiple displays can be cascaded using the CLK SEL and CLK I/O pins (Figure 14). The display designated as the MasterClock
source should have its CLK SEL pin tied high and the slaves should have their CLK SEL pins tied low. All CLK I/O pins should be
tied together. One display CLK I/O can drive 15 slave CLK I/Os. Use RST to synchronize all display counters.
Loading Data into the Display
Use following procedure to load data into the display:
3. If a different brightness is desired, load the proper bright-
1. Power up the display.
ness opcode into the Control Word Register.
4. Load the Digit Address into the display.
5. Load display row and column data for the selected digit.
6. Repeat steps 4 and 5 for all digits.
2. Bring RST low (600 ns duration minimum) to clear the Multi-
plex Counter, Address Register, Control Word
Register, User Ram and Data Register. The display will be
blank. Display brightness is set to 100%.
Data Contents for the Word “ABCD”
Step
D7 D6 D5 D4 D3 D2 D1 D0 Function
A
1
1
1
1
0
1
0
0
0
0
0
0
0
0
0
0
CLEAR
100% BRIGHTNESS
B (optional)
1
2
3
4
5
6
7
8
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
1
0
1
0
0
0
0
1
0
0
1
0
0
0
0
0
1
0
1
0
0
0
0
0
0
1
1
1
1
1
DIGIT D0 SELECT
ROW 0 (A)
ROW 1 (A)
ROW 2 (A)
ROW 3 (A)
ROW 4 (A)
ROW 5 (A)
ROW 6 (A)
9
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
0
1
0
0
1
0
0
1
0
1
0
0
1
0
0
1
0
1
0
0
1
0
0
1
1
1
1
1
0
1
1
1
DIGIT D1 SELECT
ROW 0 (B)
ROW 1 (B)
ROW 2 (B)
ROW 3 (B)
ROW 4 (B)
ROW 5 (B)
ROW 6 (B)
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
1
0
0
0
1
0
0
1
0
0
0
0
0
1
1
1
0
0
0
0
0
1
0
1
0
0
0
0
0
1
DIGIT D2 SELECT
ROW 0 (C)
ROW 1 (C)
ROW 2 (C)
ROW 3 (C)
ROW 4 (C)
ROW 5 (C)
ROW 6 (C)
25
26
27
28
29
30
31
32
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
0
1
0
0
0
0
0
1
0
1
0
0
0
0
0
1
1
1
0
0
0
0
0
1
1
0
1
1
1
1
1
0
DIGIT D3 SELECT
ROW 0 (D)
ROW 1 (D)
ROW 2 (D)
ROW 3 (D)
ROW 4 (D)
ROW 5 (D)
ROW 6 (D)
2000 Infineon Technologies Corp. • Optoelectronics Division • San Jose, CA
www.infineon.com/opto • 1-888-Infineon (1-888-463-4636)
OSRAM Opto Semiconductors GmbH & Co. OHG • Regensburg, Germany
www.osram-os.com • +49-941-202-7178
SCE5740/1/2/3/4/5
March 28, 2000-10
13
Figure 15. Detail Drawing of SCE574x
Dimensions in Inches (mm)
0.197 ( 3 pl.)
(5.00)
0.012 (.3)
±.002 (.05)
0.100
(2.54)
0.180
(4.57)
0.400 ±.015
(10.16 ±.38)
0.300 ±0.020
(7.62 ±0.51)
0.784 (19.91)
Part Number
0.150
(3.81)
EIA Date Code
Luminous
Intensity
Code
SCE574x
SIEMENS
0.200
(5.08)
XXYY
Z
0.160 ±.020
(4.06 ±.51)
Pin 1
Indicator
0.018 (.46)
.100 (2.54)
Non-cumulative (12 pl.)
Table 8. Pin Functions for SCE574x
Pin #
Function
Pin #
Function
Top View
Typical Character
1
V
6
RESET
CC
0.028
(0.71)
Pin 8
Pin 14
2
3
4
5
Load
7
8
GROUND
CLK I/O
Data
No Pin
SDCLK
9—13 No Pins
14 CLK SELECT
0.022
(0.56)
Pin 1
Pin 7
2000 Infineon Technologies Corp. • Optoelectronics Division • San Jose, CA
www.infineon.com/opto • 1-888-Infineon (1-888-463-4636)
OSRAM Opto Semiconductors GmbH & Co. OHG • Regensburg, Germany
www.osram-os.com • +49-941-202-7178
SCE5740/1/2/3/4/5
March 28, 2000-10
14
Figure 16. Detail Drawing of SCE574xP (SIP configuration)
Dimensions in Inches (mm)
0.784 (19.91)
0.197 (5.00)
(3 plcs)
0.200
(5.08)
0.048
(1.22)
0.012
(0.30)
(6 plcs)
0.180
(4.57)
0.400
(10.16)
0.150
(3.81)
0.100 (2.54)
(4 plcs)
EIA Date Code
Luminous
Part Number
Intensity Code
SCE574XP
SIEMENS
XXYY
Z
0.160 0.020
(4.06 0.51)
Pin 1
Indicator
0.100 (2.54)
(Tol. Non Accum.)
(4 plcs)
0.018 (0.46) (8 plcs)
0.200 (5.08)
Note: Unless otherwise specified, tolerance on dimensions is ±.010 in. (0.25 mm)
Figure 17. Detail Drawing of SCE574xQ (SIP configuration with right angle bend)
Dimensions in Inches (mm)
0.784 (19.91)
0.197 (5.00)
(3 plcs)
0.200
(5.08)
0.048
(1.22)
0.180
(4.57)
0.400
(10.16)
0.160 0.020
(4.06 0.51)
0.150
(3.81)
0.100 (2.54)
(4 plcs)
EIA Date Code
Part Number
Luminous
Intensity Code
SCE574XQ
SIEMENS
XXYY
Z
0.050 0.020
(1.26 0.51)
Pin 1
Indicator
0.100 (2.54)
(Tol. Non Accum.)
(4 plcs)
0.018 (0.46) (6 plcs)
0.200 (5.08)
Note: Unless otherwise specified, tolerance on dimensions is ±.010 in. (0.25 mm)
Table 9. Pin Functions for SCE574xP and SCE574xQ
Pin #
Function
Top View
Typical Character
1
2
3
4
5
6
7
V
CC
0.028
(0.71)
Load
Data
No Pin
SDCLK
RESET
GND
0.022
(0.56)
Pin 1
Pin 7
2000 Infineon Technologies Corp. • Optoelectronics Division • San Jose, CA
www.infineon.com/opto • 1-888-Infineon (1-888-463-4636)
OSRAM Opto Semiconductors GmbH & Co. OHG • Regensburg, Germany
www.osram-os.com • +49-941-202-7178
SCE5740/1/2/3/4/5
March 28, 2000-10
15
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