SP0000-88131 [INFINEON]

OptiMOS㈢-T Power-Transistor; OptiMOS㈢ -T电源晶体管
SP0000-88131
型号: SP0000-88131
厂家: Infineon    Infineon
描述:

OptiMOS㈢-T Power-Transistor
OptiMOS㈢ -T电源晶体管

晶体 晶体管
文件: 总8页 (文件大小:155K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
IPB80N06S3L-08  
IPI80N06S3L-08, IPP80N06S3L-08  
OptiMOS®-T Power-Transistor  
Product Summary  
VDS  
Features  
55  
7.6  
80  
V
• N-channel - Logic Level - Enhancement mode  
R
DS(on),max (SMD version)  
m  
A
• Automotive AEC Q101 qualified  
• MSL1 up to 260°C peak reflow  
• 175°C operating temperature  
I D  
PG-TO263-3-2  
PG-TO262-3-1  
PG-TO220-3-1  
Green package (lead free)  
• Ultra low Rds(on)  
• 100% Avalanche tested  
• ESD Class 2 (HBM)  
EIA/JESD22-A114-B  
Type  
Package  
Ordering Code Marking  
IPB80N06S3L-08  
IPI80N06S3L-08  
IPP80N06S3L-08  
PG-TO263-3-2  
PG-TO262-3-1  
PG-TO220-3-1  
SP0000-88128  
SP0000-88131  
SP0000-88127  
3N06L08  
3N06L08  
3N06L08  
Maximum ratings, at T j=25 °C, unless otherwise specified  
Value  
Parameter  
Symbol  
Conditions  
Unit  
Continuous drain current1)  
I D  
T C=25 °C, VGS=10 V  
T C=100 °C,  
80  
61  
A
V
GS=10 V2)  
Pulsed drain current2)  
I D,pulse  
EAS  
T C=25 °C  
I D=40 A  
320  
170  
Avalanche energy, single pulse3)  
mJ  
Drain gate voltage2)  
Gate source voltage4)  
VDG  
55  
±16  
V
VGS  
V
Ptot  
T C=25 °C  
Power dissipation  
105  
W
°C  
T j, T stg  
Operating and storage temperature  
IEC climatic category; DIN IEC 68-1  
-55 ... +175  
55/175/56  
Rev. 1.0  
page 1  
2005-09-16  
IPB80N06S3L-08  
IPI80N06S3L-08, IPP80N06S3L-08  
Values  
typ.  
Parameter  
Symbol  
Conditions  
Unit  
min.  
max.  
Thermal characteristics2)  
R thJC  
R thJA  
R thJA  
Thermal resistance, junction - case  
-
-
-
-
1.4  
62  
K/W  
Thermal resistance, junction -  
ambient, leaded  
SMD version, device on PCB  
minimal footprint  
-
-
-
-
62  
40  
6 cm2 cooling area5)  
Electrical characteristics, at T j=25 °C, unless otherwise specified  
Static characteristics  
V(BR)DSS  
VGS(th)  
V
V
GS=0 V, I D= 1 mA  
DS=VGS, I D=55 µA  
Drain-source breakdown voltage  
Gate threshold voltage  
55  
-
-
V
1.2  
1.7  
2.2  
V
DS=55 V, VGS=0 V,  
I DSS  
Zero gate voltage drain current  
-
-
0.01  
1
1
µA  
T j=25 °C  
V
DS=55 V, VGS=0 V,  
100  
T j=125 °C2)  
I GSS  
V
V
GS=16 V, VDS=0 V  
GS=5 V, I D=29 A  
Gate-source leakage current  
-
-
1
100 nA  
R DS(on)  
Drain-source on-state resistance  
11.5  
14.2  
13.9  
7.9  
mΩ  
V
GS=5 V, I D=29 A,  
-
-
-
11.2  
6.5  
SMD version  
V
GS=10 V, I D=43 A  
V
GS=10 V, I D=43 A,  
6.2  
7.6  
SMD version  
Rev. 1.0  
page 2  
2005-09-16  
IPB80N06S3L-08  
IPI80N06S3L-08, IPP80N06S3L-08  
Values  
typ.  
Parameter  
Symbol  
Conditions  
Unit  
min.  
max.  
Dynamic characteristics2)  
Input capacitance  
Output capacitance  
Reverse transfer capacitance  
Turn-on delay time  
Rise time  
C iss  
C oss  
Crss  
t d(on)  
t r  
-
-
-
-
-
-
-
6475  
812  
775  
16  
-
-
-
-
-
-
-
pF  
ns  
V
GS=0 V, VDS=25 V,  
f =1 MHz  
V
V
DD=27.5 V,  
GS=10 V, I D=80 A,  
35  
t d(off)  
t f  
Turn-off delay time  
Fall time  
39  
R G=3.5 Ω  
25  
Gate Charge Characteristics2)  
Gate to source charge  
Gate to drain charge  
Gate charge total  
Q gs  
-
-
-
-
34  
16  
89  
4.9  
-
nC  
Q gd  
-
134  
-
V
V
DD=11 V, I D=80 A,  
GS=0 to 10 V  
Q g  
Vplateau  
Gate plateau voltage  
V
A
Reverse Diode  
Diode continous forward current2)  
Diode pulse current2)  
I S  
-
-
-
-
80  
T C=25 °C  
I S,pulse  
320  
V
GS=0 V, I F=80 A,  
VSD  
Diode forward voltage  
Reverse recovery time2)  
Reverse recovery charge2)  
0.6  
0.9  
45  
53  
1.3  
V
T j=25 °C  
VR=27.5 V, I F=I S,  
diF/dt =100 A/µs  
t rr  
-
-
ns  
nC  
Q rr  
-
-
1) Current is limited by bondwire; with an R thJC = 1.4 K/W the chip is able to carry 86 A at 25°C. For detailed  
information see Application Note ANPS071E at www.infineon.com/optimos  
2) Defined by design. Not subject to production test.  
3) See diagrams 12 and 13.  
4) Qualified at -5V and +16V.  
5) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain  
connection. PCB is vertical in still air.  
Rev. 1.0  
page 3  
2005-09-16  
IPB80N06S3L-08  
IPI80N06S3L-08, IPP80N06S3L-08  
1 Power dissipation  
2 Drain current  
P
tot = f(T C); VGS 4 V  
I D = f(T C); VGS 4 V  
120  
100  
80  
60  
40  
20  
0
100  
80  
60  
40  
20  
0
0
50  
100  
150  
200  
0
50  
100  
150  
200  
T
C [°C]  
T
C [°C]  
3 Safe operating area  
4 Max. transient thermal impedance  
thJC = f(t p)  
I D = f(VDS); T C = 25 °C; D = 0  
parameter: t p  
Z
parameter: D =t p/T  
101  
1000  
1 µs  
limited by on-state  
resistance  
100  
0.5  
10 µs  
100 µs  
100  
10  
1
0.1  
1 ms  
10-1  
0.05  
0.01  
10-2  
single pulse  
10-3  
10-7  
10-6  
10-5  
10-4  
10-3  
10-2  
10-1  
100  
0.1  
1
10  
100  
V
DS [V]  
t
p [s]  
Rev. 1.0  
page 4  
2005-09-16  
IPB80N06S3L-08  
IPI80N06S3L-08, IPP80N06S3L-08  
5 Typ. output characteristics  
I D = f(VDS); T j = 25 °C  
parameter: VGS  
6 Typ. drain-source on-state resistance  
DS(on) = f(I D); T j = 25 °C  
R
parameter: VGS  
16  
160  
10 V  
140  
120  
100  
80  
14  
12  
10  
8
5 V  
5 V  
6 V  
4.5 V  
4 V  
60  
8 V  
40  
10 V  
6
3.5 V  
3 V  
20  
0
4
0
0
1
2
3
4
5
6
50  
100  
150  
I
D [A]  
V
DS [V]  
7 Typ. transfer characteristics  
I D = f(VGS); VDS = 4 V  
parameter: T j  
8 Typ. drain-source on-state resistance  
R
DS(on) = f(T j); I D = 80 A; VGS = 10 V  
160  
140  
120  
100  
80  
13  
11  
9
-55 °C  
25 °C  
175 °C  
7
60  
40  
5
20  
0
3
0
1
2
3
4
5
6
-60  
-20  
20  
60  
100  
140  
180  
V
GS [V]  
T j [°C]  
Rev. 1.0  
page 5  
2005-09-16  
IPB80N06S3L-08  
IPI80N06S3L-08, IPP80N06S3L-08  
9 Typ. gate threshold voltage  
GS(th) = f(T j); VGS = VDS  
10 Typ. capacitances  
V
C = f(VDS); VGS = 0 V; f = 1 MHz  
parameter: I D  
104  
3
Ciss  
2.5  
2
Coss  
Crss  
550µA  
1.5  
1
103  
55µA  
0.5  
0
0
5
10  
15  
20  
25  
30  
-60  
-20  
20  
60  
T j [°C]  
100  
140  
180  
V
DS [V]  
11 Typical forward diode characteristicis  
12 Typ. avalanche characteristics  
AV = f(t AV  
IF = f(VSD)  
I
)
parameter: T j  
parameter: Tj(start)  
103  
100  
25°C  
100°C  
102  
150°C  
10  
25 °C  
175 °C  
101  
100  
1
1
0
0.2  
0.4  
0.6  
0.8  
1
1.2  
1.4  
10  
100  
1000  
V
SD [V]  
t
AV [µs]  
Rev. 1.0  
page 6  
2005-09-16  
IPB80N06S3L-08  
IPI80N06S3L-08, IPP80N06S3L-08  
13 Typical avalanche Energy  
AS = f(T j)  
14 Drain-source breakdown voltage  
BR(DSS) = f(T j); I D = 1 mA  
E
V
parameter: I D  
66  
64  
62  
60  
58  
56  
54  
52  
50  
48  
46  
400  
350  
20 A  
300  
250  
30 A  
200  
40 A  
150  
100  
50  
0
0
50  
100  
150  
200  
-60  
-20  
20  
60  
100  
140  
180  
T j [°C]  
T j [°C]  
15 Typ. gate charge  
GS = f(Q gate); I D = 80 A pulsed  
16 Gate charge waveforms  
V
parameter: VDD  
12  
VGS  
11 V  
44 V  
10  
8
Qg  
6
4
2
Qgate  
Qgd  
Qgs  
0
0
50  
100  
150  
200  
Q
gate [nC]  
Rev. 1.0  
page 7  
2005-09-16  
IPB80N06S3L-08  
IPI80N06S3L-08, IPP80N06S3L-08  
Published by  
Infineon Technologies AG  
St.-Martin-Straße 53  
D-81541 München  
© Infineon Technologies AG 2004  
All Rights Reserved.  
Attention please!  
The information herein is given to describe certain components and shall not be considered as  
a guarantee of characteristics.  
Terms of delivery and rights to technical change reserved.  
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement,  
regarding circuits, descriptions and charts stated herein.  
Information  
For further information on technology, delivery terms and conditions and prices, please contact your  
nearest Infineon Technologies Office (www.infineon.com)  
Warnings  
Due to technical requirements, components may contain dangerous substances.  
For information on the types in question, please contact your nearest Infineon Technologies Office.  
Infineon Technologies' components may only be used in life-support devices or systems with the  
expressed written approval of Infineon Technologies, if a failure of such components can reasonably  
be expected to cause the failure of that life-support device or system, or to affect the safety or  
effectiveness of that device or system. Life support devices or systems are intended to be implanted  
in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail,  
it is reasonable to assume that the health of the user or other persons may be endangered.  
Rev. 1.0  
page 8  
2005-09-16  

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