SP000396296 [INFINEON]

Power Field-Effect Transistor,;
SP000396296
型号: SP000396296
厂家: Infineon    Infineon
描述:

Power Field-Effect Transistor,

文件: 总9页 (文件大小:262K)
中文:  中文翻译
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IPD80P03P4L-07  
OptiMOS®-P2 Power-Transistor  
Product Summary  
VDS  
RDS(on)  
ID  
-30  
6.8  
-80  
V
mW  
A
Features  
• P-channel - Logic Level - Enhancement mode  
PG-TO252-3-11  
• AEC qualified  
• MSL1 up to 260°C peak reflow  
• 175°C operating temperature  
• Green package (RoHS compliant)  
• 100% Avalanche tested  
• Intended for reverse battery protection  
Type  
Package  
Marking  
IPD80P03P4L-07  
PG-TO252-3-11 4P03L07  
Maximum ratings, at T j=25 °C, unless otherwise specified  
Value  
Parameter  
Symbol  
Conditions  
Unit  
T C=25°C,  
V GS=-10V1)  
I D  
Continuous drain current  
-80  
-65  
A
T C=100°C,  
V GS=-10V2)  
Pulsed drain current2)  
I D,pulse  
E AS  
I AS  
T C=25°C  
-320  
135  
I D=-40A  
Avalanche energy, single pulse  
Avalanche current, single pulse  
Gate source voltage  
mJ  
A
-
-80  
V GS  
P tot  
-
+5/-16  
88  
V
T C=25 °C  
Power dissipation  
W
°C  
T j, T stg  
-
Operating and storage temperature  
IEC climatic category; DIN IEC 68-1  
-
-
-55 ... +175  
55/175/56  
Rev. 2.0  
page 1  
2018-02-15  
IPD80P03P4L-07  
Values  
Parameter  
Symbol  
Conditions  
Unit  
min.  
typ.  
max.  
Thermal characteristics2)  
R thJC  
R thJA  
Thermal resistance, junction - case  
SMD version, device on PCB  
-
-
-
-
-
-
-
1.7  
62  
40  
K/W  
minimal footprint  
6 cm2 cooling area3)  
Electrical characteristics, at T j=25 °C, unless otherwise specified  
Static characteristics  
V (BR)DSS V GS=0V, I D= -1mA  
Drain-source breakdown voltage  
Gate threshold voltage  
-30  
-
-
V
V GS(th)  
V DS=V GS, I D=-130µA  
-1.0  
-1.5  
-2.0  
V DS=-24V, V GS=0V,  
T j=25°C  
I DSS  
Zero gate voltage drain current  
-
-
-0.03  
-10  
-1  
µA  
V DS=-24V, V GS=0V,  
T j=125°C2)  
-100  
I GSS  
V GS=-16V, V DS=0V  
Gate-source leakage current  
-
-
-
-
-100 nA  
R DS(on) V GS=-4.5V, I D=-40A  
V GS=-10V, I D=-80A  
Drain-source on-state resistance  
8.7  
5.6  
12  
mW  
6.8  
Rev. 2.0  
page 2  
2018-02-15  
IPD80P03P4L-07  
Values  
Parameter  
Symbol  
Conditions  
Unit  
min.  
typ.  
max.  
Dynamic characteristics2)  
Input capacitance  
Output capacitance  
Reverse transfer capacitance  
Turn-on delay time  
Rise time  
C iss  
C oss  
Crss  
t d(on)  
t r  
-
-
-
-
-
-
-
4400  
1220  
30  
5700 pF  
1600  
V GS=0V, V DS=-25V,  
f =1MHz  
60  
8
-
-
-
-
ns  
V DD=-15V,  
4
V GS=-10V, I D=-80A,  
R G=3.5W  
t d(off)  
t f  
Turn-off delay time  
Fall time  
15  
60  
Gate Charge Characteristics2)  
Gate to source charge  
Gate to drain charge  
Gate charge total  
Q gs  
-
-
-
-
16  
8
20  
16  
80  
-
nC  
Q gd  
V DD=-24V, I D=-80A,  
V GS=0 to -10V  
Q g  
63  
-3.7  
V plateau  
Gate plateau voltage  
V
A
Reverse Diode  
Diode continous forward current2)  
Diode pulse current2)  
I S  
-
-
-
-
-80  
T C=25°C  
I S,pulse  
-320  
V GS=0V, I F=-80A,  
T j=25°C  
V SD  
Diode forward voltage  
-
-
-1.3  
V
Reverse recovery time2)  
t rr  
-
-
50  
40  
-
-
ns  
V R=-15V, I F=-40A,  
di F/dt =-100A/µs  
Reverse recovery charge2)  
Q rr  
nC  
1) Current is limited by bondwire; with an R thJC = 1.7K/W the chip is able to carry 92A at 25°C.  
2) Defined by design. Not subject to production test.  
3) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain  
connection. PCB is vertical in still air.  
Rev. 2.0  
page 3  
2018-02-15  
IPD80P03P4L-07  
1 Power dissipation  
2 Drain current  
P tot = f(T C); V GS ≤ -6V  
I D = f(T C); V GS ≤ -6V  
100  
80  
60  
40  
20  
0
100  
80  
60  
40  
20  
0
0
50  
100  
150  
200  
0
50  
100  
150  
200  
TC [°C]  
TC [°C]  
3 Safe operating area  
4 Max. transient thermal impedance  
Z thJC = f(t p)  
I D = f(V DS); T C = 25 °C; D = 0  
parameter: t p  
parameter: D =t p/T  
101  
1000  
100  
10  
1 µs  
10 µs  
100  
0.5  
100 µs  
0.1  
1 ms  
10-1  
0.05  
0.01  
single pulse  
10-2  
10-3  
1
0.1  
1
10  
100  
10-6  
10-5  
10-4  
10-3  
10-2  
10-1  
100  
-VDS [V]  
tp [s]  
Rev. 2.0  
page 4  
2018-02-15  
IPD80P03P4L-07  
5 Typ. output characteristics  
I D = f(V DS); T j = 25 °C  
parameter: V GS  
6 Typ. drain-source on-state resistance  
R DS(on) = (I D); T j = 25 °C  
parameter: V GS  
20  
320  
-5V  
-4V  
-4.5V  
10V  
17  
14  
11  
8
5V  
240  
160  
80  
4.5V  
4V  
3.5V  
3V  
-10V  
5
0
0
80  
160  
-ID [A]  
240  
320  
0
2
4
6
-VDS [V]  
7 Typ. transfer characteristics  
I D = f(V GS); V DS = -6V  
parameter: T j  
8 Typ. drain-source on-state resistance  
R DS(on) = f(T j); I D = -80 A; V GS = -10 V  
320  
240  
160  
80  
9
8
7
6
5
4
-55 °C  
25 °C  
175 °C  
0
-60  
-20  
20  
60  
100  
140  
180  
1
2
3
4
5
6
Tj [°C]  
-VGS [V]  
Rev. 2.0  
page 5  
2018-02-15  
IPD80P03P4L-07  
9 Typ. gate threshold voltage  
V GS(th) = f(T j); V GS = V DS  
parameter: -I D  
10 Typ. capacitances  
C = f(V DS); V GS = 0 V; f = 1 MHz  
105  
104  
103  
102  
101  
2
1300µA  
1.5  
Ciss  
130µA  
Coss  
1
0.5  
0
Crss  
0
5
10  
15  
20  
25  
30  
-60  
-20  
20  
60  
100  
140  
180  
Tj [°C]  
-VDS [V]  
11 Typical forward diode characteristicis  
IF = f(VSD  
12 Avalanche characteristics  
I AS = f(t AV  
)
)
parameter: T j  
parameter: Tj(start)  
103  
100  
25°C  
100°C  
102  
150°C  
10  
25 °C  
175 °C  
101  
100  
0
1
1
0.2  
0.4  
0.6  
0.8  
1
1.2  
1.4  
10  
100  
1000  
-VSD [V]  
tAV [µs]  
Rev. 2.0  
page 6  
2018-02-15  
IPD80P03P4L-07  
13 Avalanche energy  
E AS = f(T j)  
14 Drain-source breakdown voltage  
V BR(DSS) = f(T j); I D = -1 mA  
parameter: I D  
33  
300  
20 A  
250  
32  
31  
30  
29  
28  
200  
150  
40 A  
100  
80 A  
50  
0
-60  
-20  
20  
60  
100  
140  
180  
25  
75  
125  
175  
Tj [°C]  
Tj [°C]  
15 Typ. gate charge  
16 Gate charge waveforms  
V GS = f(Q gate); I D = -80 A pulsed  
parameter: V DD  
12  
10  
8
VGS  
-24V  
Qg  
-6V  
6
4
Qgate  
2
Qgd  
Q gs  
0
0
10  
20  
30  
40  
50  
60  
70  
Qgate [nC]  
Rev. 2.0  
page 7  
2018-02-15  
IPD80P03P4L-07  
Published by  
Infineon Technologies AG  
81726 Munich, Germany  
© Infineon Technologies AG 2018  
All Rights Reserved.  
Legal Disclaimer  
The information given in this document shall in no event be regarded as a guarantee of conditions  
or characteristics. With respect to any examples or hints given herein, any typical values stated  
herein and/or any information regarding the application of the device, Infineon Technologies hereby  
disclaims any and all warranties and liabilities of any kind, including without limitation, warranties  
of non-infringement of intellectual property rights of any third party.  
Information  
For further information on technology, delivery terms and conditions and prices, please contact  
the nearest Infineon Technologies Office (www.infineon.com).  
Warnings  
Due to technical requirements, components may contain dangerous substances.  
For information on the types in question, please contact the nearest Infineon Technologies Office.  
Infineon Technologies components may be used in life-support devices or systems only with the  
express written approval of Infineon Technologies, if a failure of such components can reasonably be  
expected to cause the failure of that life-support device or system or to affect the safety or  
effectiveness of that device or system. Life support devices or systems are intended to be implanted  
in the human body or to support and/or maintain and sustain and/or protect human life.  
If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.  
Rev. 2.0  
page 8  
2018-02-15  
IPD80P03P4L-07  
Revision History  
Version  
Date  
Changes  
1.0  
2.0  
7/30/2018 Final Datasheet  
2/15/2018 typo corrected  
Rev. 2.0  
page 9  
2018-02-15  

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