SPP12N50C3XK [INFINEON]
暂无描述;型号: | SPP12N50C3XK |
厂家: | Infineon |
描述: | 暂无描述 晶体 栅极 晶体管 功率场效应晶体管 开关 脉冲 局域网 |
文件: | 总14页 (文件大小:847K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SPP12N50C3
SPI12N50C3, SPA12N50C3
Cool MOS™ Power Transistor
Feature
• New revolutionary high voltage technology
• Ultra low gate charge
V
@ T
560
0.38
11.6
V
Ω
A
DS
jmax
R
DS(on)
I
D
FP
PG-TO220-PG-TO262- G-TO220
• Periodic avalanche rated
• Extreme dv/dt rated
• Ultra low effective capacitances
• Improved transconductance
2
3
2
1
3
2
1
P-TO220-3-31
• PG-TO-220-3-31;-3-111: Fully isolated package (2500 VAC; 1 minute)
Type
Package
Ordering Code
Q67040-S4579
Q67040-S4578
SP000216322
Marking
12N50C3
SPP12N50C3
SPI12N50C3
SPA12N50C3
PG-TO220
PG-TO262
PG-TO220FP
12N50C3
12N50C3
Maximum Ratings
Parameter
Symbol
Value
Unit
SPP_I
SPA
Continuous drain current
I
A
D
1)
T
= 25 °C
11.6
7
11.6
7
C
1)
T
= 100 °C
C
Pulsed drain current,
Avalanche energy, single pulse
t
limited by
T
I
D uls
34.8
340
34.8
340
A
mJ
p
jmax
E
AS
I
=5.5A,
V
=50V
D
DD
2)
E
Avalanche energy, repetitive
t
limited by
limited by
T
0.6
0.6
AR
AR
jmax
I
=11.6A,
V
=50V
D
DD
Avalanche current, repetitive
Gate source voltage
t
T
I
11.6
±20
30
11.6
±20
30
A
V
A
jma
x
A
V
V
P
GS
Gate source voltage AC (f >1Hz)
GS
tot
Power dissipation, T = 25°C
125
33
W
C
Operating and storage temperature
Reverse diode dv/dt
T
dv/dt
,
T
st
-55...+150
°C
V/ns
7)
15
Page 1
Rev. 3.0
2007-08-30
SPP12N50C3
SPI12N50C3, SPA12N50C3
Maximum Ratings
Parameter
Symbol
Value
Unit
Drain Source voltage slope
dv/dt
50
V/ns
V
= 400 V, I = 11.6 A, T = 125 °C
D j
DS
Thermal Characteristics
Parameter
Symbol
Values
Unit
min.
typ. max.
R
-
-
-
-
-
-
-
-
1
K/W
Thermal resistance, junction - case
Thermal resistance, junction - case, FullPAK
Thermal resistance, junction - ambient, leaded
Thermal resistance, junction - ambient, FullPAK
SMD version, device on PCB:
thJC
3.8
62
80
R
thJC_FP
R
thJA
R
thJA_FP
R
thJA
@ min. footprint
@ 6 cm cooling area
-
-
-
-
35
-
62
-
2
3)
260 °C
Soldering temperature, wavesoldering
1.6 mm (0.063 in.) from case for 10s
T
sold
4)
Electrical Characteristics, at T =25°C unless otherwise specified
j
Parameter
Symbol
Conditions
Values
Unit
min.
500
-
typ. max.
V
V
=0V, I =0.25mA
-
-
V
Drain-source breakdown voltage
Drain-Source avalanche
breakdown voltage
(BR)DSS GS
D
V
=0V, I =11.6A
600
-
V
GS
D
(BR)DS
I =500µA, V =V
2.1
3
3.9
Gate threshold voltage
Zero gate voltage drain current
V
I
D
GS DS
GS(th)
V
=500V, V =0V,
µA
DS
GS
DSS
T =25°C
-
-
0.1
-
1
100
j
T =150°C
j
V
V
=20V, V =0V
-
-
100 nA
Gate-source leakage current
Drain-source on-state resistance R
I
GS
DS
GSS
=10V, I =7A
Ω
GS
D
DS(on)
T =25°C
-
-
-
0.34
0.92
1.4
0.38
-
-
j
T =150°C
j
R
f=1MHz, open drain
Gate input resistance
G
Page 2
Rev. 3.0
2007-08-30
SPP12N50C3
SPI12N50C3, SPA12N50C3
Electrical Characteristics, at T = 25 °C, unless otherwise specified
j
Parameter
Symbol
Conditions
Values
Unit
min.
typ. max.
Characteristics
Transconductance
g
V
≥2*I *R
DS(on)max
,
-
8
-
S
fs
DS
D
I =7A
D
Input capacitance
C
V
=0V, V =25V,
-
-
-
-
1200
400
30
-
-
-
-
pF
iss
GS
DS
f=1MHz
Output capacitance
C
oss
Reverse transfer capacitance
C
rss
5)
V
V
=0V,
45
Effective output capacitance,
energy related
C
GS
o(er)
=0V to 400V
DS
6)
-
92
-
Effective output capacitance,
time related
C
o(tr)
Turn-on delay time
t
V
=380V, V =0/10V,
-
-
-
-
10
8
45
8
-
-
-
-
ns
d(on)
DD
GS
I =11.6A, R =6.8Ω
Rise time
t
D
G
r
Turn-off delay time
Fall time
t
d(off)
t
f
Gate Charge Characteristics
Gate to source charge
Q
Q
Q
V
=400V, I =11.6A
-
-
-
5
26
49
-
-
-
nC
V
gs
gd
g
DD
D
Gate to drain charge
V
V
=400V, I =11.6A,
Gate charge total
DD
D
=0 to 10V
GS
V
=400V, I =11.6A
-
5
-
Gate plateau voltage
V(plateau)
DD
D
1
2
Limited only by maximum temperature
Repetitve avalanche causes additional power losses that can be calculated asP =E *f.
AR
AV
3
Device on 40mm*40mm*1.5mm epoxy PCB FR4 with 6cm² (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical without blown air.
4
5
Soldering temperature for TO-263: 220°C, reflow
C
is a fixed capacitance that gives the same stored energy as C
while V is rising from 0 to 80% V
.
DSS
oss
DS
o(er)
o(tr)
6
C
is a fixed capacitance that gives the same charging time as C
while V is rising from 0 to 80% V
.
oss
DS
DSS
7
ISD<=ID, di/dt<=400A/us, VDClink=400V, Vpeak<VBR, DSS, Tj<Tj,max
.
Identical low-side and high-side switch.
Page 3
Rev. 3.0
2007-08-30
SPP12N50C3
SPI12N50C3, SPA12N50C3
Electrical Characteristics
Parameter
Symbol
Conditions
Values
typ. max.
Unit
min.
T =25°C
-
-
11.6 A
Inverse diode continuous
forward current
I
C
S
Inverse diode direct current,
I
-
-
34.8
SM
pulsed
V
=0V, I =I
F S
-
-
-
-
-
1
380
5.5
38
1100
1.2
V
Inverse diode forward voltage
Reverse recovery time
V
GS
SD
t
V =400V, I =I ,
-
-
-
-
ns
µC
A
rr
R
F S
di /dt=100A/µs
Reverse recovery charge
Peak reverse recovery current
Q
F
rr
I
rrm
T =25°C
A/µs
Peak rate of fall of reverse
recovery current
di /dt
j
rr
Typical Transient Thermal Characteristics
Symbol
Value
Unit
Symbol
Value
Unit
SPP_I
0.015
0.03
0.056
0.197
0.216
0.083
SPA
0.15
0.03
0.056
0.194
0.413
2.522
SPP_I
SPA
R
R
R
R
Rth5
R
K/W
C
C
C
C
C
C
0.0001878 0.0001878 Ws/K
0.0007106 0.0007106
0.000988
0.002791
0.007285
0.063
th1
th2
th3
th4
th1
th2
th3
th4
th5
th6
0.000988
0.002791
0.007401
0.412
th6
External Heatsink
Tj
Rth1
Rth,n
Tcase
Ptot (t)
Cth1
Cth2
Cth,n
Tamb
Page 4
Rev. 3.0
2007-08-30
SPP12N50C3
SPI12N50C3, SPA12N50C3
1 Power dissipation
= f (T )
2 Power dissipation FullPAK
P = f (T )
tot
P
tot
C
C
SPP12N50C3
140
W
36
W
120
110
100
90
80
70
60
50
40
30
20
10
0
28
24
20
16
12
8
4
0
0
20
40
60
80 100 120
160
0
20
40
60
80 100 120
160
°C
°C
T
T
C
C
3 Safe operating area
I = f ( V
4 Safe operating area FullPAK
I = f (V )
)
D
DS
D
DS
parameter : D = 0 , T =25°C
parameter: D = 0, T = 25°C
C
C
10 2
10 2
A
A
10 1
10 1
10 0
10 0
tp = 0.001 ms
tp = 0.01 ms
tp = 0.1 ms
tp = 1 ms
tp = 0.001 ms
tp = 0.01 ms
tp = 0.1 ms
tp = 1 ms
10 -1
10 -1
DC
tp = 10 ms
DC
10 -2
10 -2
10 0
10 1
10 2
10 3
10 0
10 1
10 2
10 3
V
V
V
V
DS
DS
Page 5
Rev. 3.0
2007-08-30
SPP12N50C3
SPI12N50C3, SPA12N50C3
5 Transient thermal impedance
= f (t )
6 Transient thermal impedance FullPAK
Z
Z
= f (t )
thJC
p
thJC
p
parameter: D = t /T
parameter: D = t /t
p
p
10 1
10 1
K/W
K/W
10 0
10 -1
10 -2
10 -3
10 -4
10 0
10 -1
10 -2
10 -3
10 -4
D = 0.5
D = 0.2
D = 0.1
D = 0.5
D = 0.05
D = 0.02
D = 0.01
single pulse
D = 0.2
D = 0.1
D = 0.05
D = 0.02
D = 0.01
single pulse
10 -7
10 -6
10 -5
10 -4
10 -3
10 -1
10 -7 10 -6 10 -5 10 -4 10 -3 10 -2 10 -1
10 1
s
s
p
t
t
p
7 Typ. output characteristic
I = f (V ); T =25°C
8 Typ. output characteristic
I = f (V ); T =150°C
D
DS
j
D
DS
j
parameter: t = 10 µs, V
parameter: t = 10 µs, V
p
GS
p
GS
40
22
A
20V
20V
A
10V
8V
8V
7.5V
7V
18
32
7V
6V
16
14
12
10
8
28
24
20
16
12
8
6.5V
5.5V
5V
6V
5.5V
6
4.5V
4V
4
5V
4.5V
V
4
2
0
0
0
5
10
15
25
0
5
10
15
25
V
V
V
DS
DS
Page 6
Rev. 3.0
2007-08-30
SPP12N50C3
SPI12N50C3, SPA12N50C3
9 Typ. drain-source on resistance
=f(I )
10 Drain-source on-state resistance
R
R
= f (T )
DS(on)
D
DS(on) j
parameter: T =150°C, V
parameter : I = 7 A, V = 10 V
j
GS
D
GS
SPP12N50C3
2.1
Ω
2
Ω
1.8
1.6
1.4
1.2
1
4V
4.5V
5V
6V
5.5V
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
0
0.8
0.6
0.4
98%
typ
6.5V
8V
20V
°C
0
2
4
6
8
10 12 14 16
20
-60
-20
20
60
100
180
A
I
T
D
j
11 Typ. transfer characteristics
12 Typ. gate charge
= f (Q
I = f ( V ); V ≥ 2 x I x R
V
)
Gate
D
GS
DS
D
DS(on)max
GS
parameter: t = 10 µs
parameter: I = 11.6 A pulsed
p
D
SPP12N50C3
40
16
A
V
25°C
32
28
24
20
16
12
8
12
V
0,2
DS max
10
8
0,8 VDS max
150°C
6
4
2
4
0
0
0
1
2
3
4
5
6
7
8
10
V
V
GS
0
10
20
30
40
50
70
Gate
nC
Q
Page 7
Rev. 3.0
2007-08-30
SPP12N50C3
SPI12N50C3, SPA12N50C3
13 Forward characteristics of body diode
I = f (V )
14 Avalanche SOA
= f (t )
I
F
SD
AR
AR
parameter: T , tp = 10 µs
par.: T ≤ 150 °C
j
10 2
SPP12N50C3
11
A
A
9
8
7
6
5
4
3
2
1
0
10 1
Tj(START)=25°C
10 0
Tj = 25 °C typ
Tj(START)=125°C
Tj = 150 °C typ
Tj = 25 °C (98%)
Tj = 150 °C (98%)
10 -1
0
0.4
0.8
1.2
1.6
2
2.4
3
10 -3 10 -2 10 -1 10 0 10 1 10 2
10 4
V
V
µs
t
AR
SD
15 Avalanche energy
= f (T )
16 Drain-source breakdown voltage
= f (T )
E
V
(BR)DSS
AS
j
j
par.: I = 5.5 A, V = 50 V
D
DD
SPP12N50C3
350
600
V
mJ
570
560
550
540
530
520
510
500
490
480
470
460
450
250
200
150
100
50
0
20
40
60
80
100
120
160
-60
-20
20
60
100
180
°C
°C
T
T
j
j
Page 8
Rev. 3.0
2007-08-30
SPP12N50C3
SPI12N50C3, SPA12N50C3
17 Avalanche power losses
= f (f )
18 Typ. capacitances
P
C = f (V )
AR
DS
parameter: E =0.6mJ
parameter: V =0V, f=1 MHz
AR
GS
10 4
300
pF
Ciss
W
10 3
200
150
100
50
10 2
10 1
10 0
10 -1
Coss
Crss
0
10 4
10 5
10 6
0
100
200
300
500
DS
Hz
V
V
f
19 Typ. C
stored energy
oss
E
=f(V )
oss
DS
6
µJ
4
3
2
1
0
0
100
200
300
500
DS
V
V
Page 9
Rev. 3.0
2007-08-30
SPP12N50C3
SPI12N50C3, SPA12N50C3
Definition of diodes switching characteristics
Page 10
Rev. 3.0
2007-08-30
SPP12N50C3
SPI12N50C3, SPA12N50C3
PG-TO-220-3-1, PG-TO220-3-21
Page 11
Rev. 3.0
2007-08-30
SPP12N50C3
SPI12N50C3, SPA12N50C3
PG-TO220-3-31/3-111 Fully isolated package (2500VAC; 1 minute)
Page 12
Rev. 3.0
2007-08-30
SPP12N50C3
SPI12N50C3, SPA12N50C3
PG-TO262-3-1, PG-TO262-3-21 (I²-PAK)
Page 13
Rev. 3.0
2007-08-30
SPP12N50C3
SPI12N50C3, SPA12N50C3
Published by
Infineon Technologies AG,
Bereichs Kommunikation
St.-Martin-Strasse 53,
D-81541 München
© Infineon Technologies AG 1999
All Rights Reserved.
Attention please!
The information herein is given to describe certain components and shall not be considered as warranted
characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement,
regarding circuits, descriptions and charts stated herein.
Infineon Technologies is an approved CECC manufacturer.
Information
For further information on technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies Office in Germany or our Infineon Technologies Reprensatives worldwide (see address list).
Warnings
Due to technical requirements components may contain dangerous substances.
For information on the types in question please contact your nearest Infineon Technologies Office.
Infineon Technologies Components may only be used in life-support devices or systems with the express
written approval of Infineon Technologies, if a failure of such components can reasonably be expected to
cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device
or system Life support devices or systems are intended to be implanted in the human body, or to support
and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health
of the user or other persons may be endangered.
Page 14
Rev. 3.0
2007-08-30
相关型号:
SPP12N50C3_07
New revolutionary high voltage technology Ultra low gate charge Periodic avalanche rated
INFINEON
©2020 ICPDF网 联系我们和版权申明