TLE4267G [INFINEON]
5-V Low-Drop Voltage Regulator; 5 -V低压差稳压器
| 型号： | TLE4267G |
| 厂家： | 
Infineon |
| 描述： | 5-V Low-Drop Voltage Regulator |
| 文件： | 总16页 (文件大小：140K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
5-V Low-Drop Voltage Regulator
TLE 4267
Bipolar IC
Features
● Output voltage tolerance ≤ ± 2 %
● Low-drop voltage
● Very low standby current consumption
● Input voltage up to 40 V
● Overvoltage protection up to 60 V (≤ 400 ms)
● Reset function down to 1 V output voltage
● ESD protection up to 2000 V
● Adjustable reset time
P-TO220-7-3
● On/off logic
● Overtemperature protection
● Reverse polarity protection
● Short-circuit proof
● Wide temperature range
● Suitable for use in automotive electronics
P-TO220-7-180
P-TO220-7-230
Type
Ordering Code Package
TLE 4267
Q67000-A9153 P-TO220-7-3
TLE 4267 G Q67006-A9169 P-TO220-7-180 (SMD)
TLE 4267 S Q67000-A9246 P-TO220-7-230
Functional Description
TLE 4267 is a 5-V low-drop voltage regulator in a
TO220-7 package. It supplies an output current of > 400 mA. The IC is shortcircuit-proof
and incorporates temperature protection that disables the IC at overtemperature.
Application
The IC regulates an input voltage VI in the range 5.5 V < VI < 40 V to VQrated = 5.0 V. A
reset signal is generated for an output voltage VQ of < 4.5 V. The reset delay can be set
with an external capacitor. The device has two logic inputs. It is turned-ON by a voltage
of > 4 V on E2 by the ignition for example. It remains active as a function of the voltage
on E6, even if the voltage on E2 goes Low. This makes it possible to implement a self-
holding circuit without external components. When the device is turned-OFF, the output
voltage drops to 0 V and current consumption tends towards 0 µA.
Semiconductor Group
1
1998-11-01
TLE 4267
Design Notes for External Components
The input capacitor CI is necessary for compensation line influences. The resonant
circuit consisting of lead inductance and input capacitance can be damped by a resistor
of approx. 1 Ω in series with CI. The output capacitor is necessary for the stability of the
regulating circuit. Stability is guaranteed at values of ≥ 22 µF and an ESR of ≤ 3 Ω within
the operating temperature range.
Circuit Description
The control amplifier compares a reference voltage, which is kept highly accurate by
resistance adjustment, to a voltage that is proportional to the output voltage and drives
the base of the series transistor via a buffer. Saturation control as a function of the load
current prevents any over-saturating of the power element.
A comparator in the reset-generator block compares a reference that is independent of
the input voltage to the scaled-down output voltage. If this reaches a value of 4.5 V, the
reset-delay capacitor is discharged and then the reset output is set Low. As the output
voltage increases again, the reset-delay capacitor is charged with constant current from
VQ = 4.5 V onwards. When the capacitor voltage reaches the upper switching threshold,
reset goes High again. The reset delay can be set within wide range by selection of the
external capacitor.
With the integrated turn-ON/turn-OFF logic it is simple to implement delayed turn-OFF
without external components.
Truth Table for Turn-ON/Turn-OFF Logic
Pin 2 Pin 6 VQ
Remarks
L
X
X
L
OFF Initial state, pin 6 internally pulled up
H
H
ON
ON
Regulator switched on via pin 2, by ignition for example
Pin 6 clamped active to ground by controller while pin 2 is still
high
X
L
ON
ON
Previous state remains, even ignition is shut off: self-holding
state
L
L
L
Ignition shut off while regulator is in self-holding state
H
OFF Regulator shut down by releasing of pin 6 while pin 2 remains
Low, final state. No active clamping required by external self-
holding circuit (µC) to keep regulator shut off.
Pin 2: (Inhibit, E2) Enable function, active High
Pin 6: (Hold, E6) Hold and release function, active Low
Semiconductor Group
2
1998-11-01
TLE 4267
Pin Configuration
(top view)
P-TO220-7-3
P-TO220-7-180
P-TO220-7-230
1
2
3
4
5
6
7
1
2
3
4
5
6
7
1
2
3
4
5
6
7
Ι
R
D
E2
GND
E6
AEP01724
Ι
Q
R
D
E2
GND
E6
Ι
Q
R
D
AEP02123
E2
GND
E6
AEP01481
Pin Definitions and Functions
Pin
1
Symbol Function
I
Input; block to ground directly at the IC by a ceramic capacitor
2
E2
Inhibit; device is turned-ON by High signal on this pin; internal
pulldown resistor of 100 kΩ
3
R
Reset Output; open-collector output internally connected to
the output via a resistor of 30 kΩ
4
5
6
GND
D
Ground; connected to rear of chip
Reset Delay; connect with capacitor to GND for setting delay
E6
Hold; see truth table above for function; this input is connected
to output voltage across pullup resistor of 50 kΩ
7
Q
5-V Output; block to GND with 22-µF capacitor, ESR < 3 Ω
Semiconductor Group
3
1998-11-01
TLE 4267
Temperature
Sensor
Saturation
Control and
Protection Circuit
1
7
5
In-
put
5 V
Output
Reset
Delay
Control
Amplifier
Buffer
Reset
Generator
Bandgap
Reference
Adjustment
3
Reset
Output
Turn-ON/Turn-OFF
Logic
2
6
4
Inhibit
E6 Hold
GND
AEB01482
Block Diagram
Absolute Maximum Ratings
TJ = – 40 to 150 °C
Parameter
Symbol
Limit Values
Unit Notes
min.
max.
Input
Voltage
Voltage
Current
VI
– 42
–
42
60
–
V
V
–
–
VI
II
t ≤ 400 ms
–
Limited internally
Reset Output
Voltage
Current
VR
IR
– 0.3
–
7
–
V
–
–
Limited internally
Reset Delay
Voltage
Vd
– 0.3
42
V
–
Semiconductor Group
4
1998-11-01
TLE 4267
Absolute Maximum Ratings (cont’d)
TJ = – 40 to 150 °C
Parameter
Symbol
Limit Values
Unit Notes
min.
max.
Current
Id
–
–
–
–
Output
Voltage
Current
VQ
IQ
– 0.3
–
7
–
V
–
–
Limited internally
Inhibit
VE2
IE2
Voltage
Current
– 42
– 5
42
5
V
mA t ≤ 400 ms
Hold
VE6
IE6
Voltage
Current
– 0.3
–
7
–
V
–
mA Limited internally
GND
Current
IGND
– 0.5
–
A
–
Temperatures
Junction temperature
Storage temperature
TJ
–
150
150
°C
°C
–
–
Tstg
– 50
Operating Range
Parameter
Symbol
Limit Values
Unit Notes
min.
max.
40
Input voltage
VI
TJ
5.5
V
see diagram
Junction temperature
– 40
150
°C
–
Thermal Resistance
Junction ambient
Junction-case
Junction-case
Rthja
Rthjc
Rthjc
–
–
–
70
6
K/W –
K/W –
2
K/W t < 1 ms
Semiconductor Group
5
1998-11-01
TLE 4267
Characteristics
VI = 13.5 V; – 40 °C < TJ < 125 °C; VE2 > 4 V (unless specified otherwise)
Parameter
Symbol
Limit Values
min. typ. max.
Unit Test Condition
Output voltage
VQ
VQ
4.9
5
5.1
V
V
5 mA ≤ IQ ≤ 400 mA
6 V ≤ VI ≤ 26 V
Output voltage
4.9
5
5.1
5 mA ≤ IQ ≤ 150 mA
6 V ≤ VI ≤ 40 V
Output-current limiting
IQ
Iq
500
–
–
–
–
mA TJ = 25 °C
Current consumption
50
µA Regulator-OFF
Iq = II – IQ
Current consumption
Iq = II – IQ
Iq
Iq
Iq
Iq
–
–
–
–
1.0
1.3
–
10
4
µA TJ = 25 °C
IC turned off
Current consumption
Iq = II – IQ
mA IQ = 5 mA
IC turned on
Current consumption
Iq = II – IQ
60
80
mA IQ = 400 mA
Current consumption
Iq = II – IQ
–
mA IQ = 400 mA
VI = 5 V
Drop voltage
VDr
–
–
–
0.3
–
0.6
50
25
V
IQ = 400 mA1)
Load regulation
∆VQ
∆VQ
mV 5 mA ≤ IQ ≤ 400 mA
Supply-voltage
regulation
15
mV VI = 6 to 36 V; IQ = 5
mA
Supply-voltage rejection
–
–
54
0
–
–
dB fr = 100 Hz; Vr = 0.5
SVR
Vpp
∆VQ
Longterm stability
mV 1000 h
1) Drop voltage = VI – VQ (measured when the output voltage VQ has dropped 100 mV from the
nominal value obtained at VI = 13.5 V)
Semiconductor Group
6
1998-11-01
TLE 4267
Characteristics (cont’d)
Parameter
Symbol
Limit Values
min. typ. max.
Unit Test Condition
Reset Generator
Switching threshold
Reset High level
Saturation voltage
Pullup
Vrt
–
4.2
4.5
–
4.5
–
4.8
–
V
–
V
Rext = ∞
RR = 4.7 kΩ 1)
VR
RR
VD,sat
Id
0.1
30
50
15
3
0.4
–
V
–
kΩ
–
Saturation voltage
Charge current
–
100
25
3.3
–
mV VQ < VRT
8
µA
VD = 1.5 V
Delay switching threshold Vdt
2.6
–
V
–
Delay
td
20
0.43
2
ms Cd = 100 nF
Switching threshold
Delay
Vst
tt
–
–
V
–
–
–
µs
Cd = 100 nF
Inhibit
Turn-ON voltage
Turn-OFF voltage
Pulldown
VE2
VE2
RE2
∆VE2
IE2
–
3
4
V
IC turned-ON
2
–
–
V
IC turned-OFF
50
0.2
–
100
0.5
35
35
70
50
200
0.8
100
40
80
100
kΩ
V
–
Hysteresis
–
Input current
Holding voltage
Turn-OFF voltage
Pullup
µA
%
%
kΩ
VIP2 = 4 V
Referred to VQ
Referred to VQ
–
VE6
VE6
RE6
30
60
20
Overvoltage Protection
Turn-OFF voltage
Turn-ON hysteresis
Vi,ov
42
2
44
–
46
6
V
V
–
–
∆Vi,ov
1) The reset output is Low between VQ = 1 V and VRT
Semiconductor Group
7
1998-11-01
TLE 4267
ΙΙ
ΙQ
1
7
3
1000 µF
470 nF
22 µF
4.7 kΩ
TLE 4267
ΙE2
ΙR
2
VQ
VΙ
5
Ιd
6
4
ΙGND
VR
VE2
VE6
CD
VC
AES01483
Test Circuit
5 V Output
Input
1
7
5
470 nF
E2; eg
2
3
TLE 4267
from Terminal 15
22 µF
Reset
100 nF
To MC
4
6
E6 From µC
AES01484
Application Circuit
Semiconductor Group
8
1998-11-01
TLE 4267
Vi
VE
VE2, ON
VE2, OFF
<t t
VQ
VRT
t t
Vd
VdT
VST
Vd, sat
VR
t d
VR, sat
Power on Thermal
Voltage Drop
at Input
Undervoltage
at Output
Secondary Load
Shutdown
Reset
Shutdown
Spike
Bounce
AET01985
Time Response
Semiconductor Group
9
1998-11-01
TLE 4267
Vi
VE2
VE2, ON
VE2, OFF
1)
5)
<1µs
<10 µs
VE6
VE6, rel
2)
4)
6)
10)
VE6, hold
VQ
VQ,
VRT
8)
Vd
VdT
VST
Vd, sat
VR
td
3)
9)
VR, sat
tt
1) Enable active
2) Hold inactive, pulled up byVQ
3) Power-ON reset
6) Pulse width smaller than 1 µs
7) Hold inactive, released by µC
8) Voltage controller shutdown
9) Output-low reset
4) Hold active, clamped to
GND by external µC
10) No switch on via VE6 possible after E6
was released toVE6 >VE6, rel for more
than 4 µs
5) Enable inactive, clamped by int.
pull-down resistor
AET01986
Enable and Hold Behaviour
Semiconductor Group
10
1998-11-01
TLE 4267
Output Voltage VQ versus
Temperature Tj
Drop Voltage VDr versus
Output Current IQ
AED01488
AED01486
700
5.10
VDr
mV
VQ
V
VΙ = 13.5 V
5.00
500
400
Tj = 125 C
4.90
4.80
4.70
300
Tj = 25 C
200
100
0
0
100
200
300
400
600
mA
ΙQ
-40
0
40
80
C
160
Tj
Charge Current Id versus
Temperature Tj
Delay Switching Threshold VdT versus
Temperature Tj
AED01485
AED01487
22
4.0
Ιd
VdT
VΙ = 13.5 V
V
3.0
2.5
2.0
1.5
1.0
0.5
0
µ A
VΙ = 13.5 V
18
V
C = 0 V
VdT
16
14
12
10
Ιd
-40
0
40
80
C
160
-40
0
40
80
C
160
Tj
Tj
Semiconductor Group
11
1998-11-01
TLE 4267
Current Consumption Iq versus
Output Current IQ
Current Consumption Iq versus
Input Voltage VI
AED01491
AED01490
15
70
mA
50
40
30
20
10
0
RL= 25 Ω
Ι q
Ιq
mA
VΙ = 13.5 V
10
5
0
0
10
20
30
V
50
0
100
200
300
400
600
mA
ΙQ
VΙ
Output Current IQ versus
Temperature Tj
Output Current IQ versus
Input Voltage VI
AED01489
AED01987
700
700
mA
Ι Q
ΙQ
Tj = 25 C
mA
600
500
500
400
300
200
100
0
Tj = 125 C
VΙ = 13.5 V
400
300
200
100
0
-40
0
40
80
C
160
0
10
20
30
40
50
V
Tj
Vi
Semiconductor Group
12
1998-11-01
TLE 4267
Output Voltage VQ versus
Inhibit Voltage VE2
Inhibit Current IE2 versus
Inhibit Voltage VE2
AED01988
AED01989
6
50
VQ
V
µA
Ι E2
5
4
3
2
1
0
40
30
20
10
0
0
1
2
3
4
5
6
V
0
1
2
3
4
5
6
V
VE2
VE2
Semiconductor Group
13
1998-11-01
TLE 4267
Package Outlines
P-TO220-7-3
(Plastic Transistor Single Outline)
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book “Package Information”
Dimensions in mm
Semiconductor Group
14
1998-11-01
TLE 4267
P-TO220-7-180
(Plastic Transistor Single Outline)
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book “Package Information”
Dimensions in mm
SMD = Surface Mounted Device
Semiconductor Group
15
1998-11-01
TLE 4267
P-TO220-7-230
(Plastic Transistor Single Outline)
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book “Package Information”
Dimensions in mm
Semiconductor Group
16
1998-11-01
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