TLE6710Q [INFINEON]

Power Management Circuit,;
TLE6710Q
型号: TLE6710Q
厂家: Infineon    Infineon
描述:

Power Management Circuit,

文件: 总66页 (文件大小:1367K)
中文:  中文翻译
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TLE 6710  
Airbag  
Combined Power-Supply  
and Firing Circuit  
Datasheet  
Copying of this document, and giving it to others and the use or communication of the contents thereof, are forbidden without express authority.  
Offenders are liable to the payment of damages. All rights are reserved in the event of the grant of a patent or the registration of a utility model.  
Version B  
May 04, 2001  
Datasheet  
TLE 6710  
Table of Content:  
A. Features......................................................................................................................................... 2  
B. Circuit Description.......................................................................................................................... 3  
Supply and Reference:.................................................................................................................. 3  
Low Battery Detection on pin UBATT:........................................................................................... 3  
Oscillator for Boost (30V)-, Buck (5V)-Converter and Watchdog: ................................................ 3  
Boost Converter (30V): ................................................................................................................. 4  
Buck Converter (5 V):.................................................................................................................... 5  
Power On Reset of VCC5: ............................................................................................................ 7  
Watchdog Operation and Generation of the Squib Driver Enable Signal ZKEN:.......................... 7  
ISO 9141 - Serial Interface:........................................................................................................... 9  
Serial Peripheral Interface (SPI) and Decoder Logic: ................................................................... 9  
Alarm Warning Lamp Driver (AWL1):........................................................................................... 11  
Alarm Warning Lamp and Multifunction Driver 2 (AWL2):............................................................ 12  
Voltage-/ Current Sources:............................................................................................................ 13  
Squib Drivers:................................................................................................................................ 14  
Squib Resistance Measurement: .................................................................................................. 16  
Squib Leakage Measurement: ...................................................................................................... 17  
Supply Voltage Measurements: .................................................................................................... 19  
Detection of Safing Sensor Closure:............................................................................................. 19  
Average Chip Temperature Measurement:................................................................................... 22  
Grounding Requirements for External Components on PCB:....................................................... 22  
C. Package Outline ............................................................................................................................ 23  
D. Pin Configuration ........................................................................................................................... 24  
E. Pin Definitions and Functions ........................................................................................................ 25  
F. Block Diagram and Application Circuit........................................................................................... 27  
G. Absolute Maximum Ratings........................................................................................................... 28  
H. Functional Range........................................................................................................................... 31  
I. AC/DC Characteristics .................................................................................................................... 32  
Supply currents: ............................................................................................................................ 32  
Logic Inputs and Outputs: ............................................................................................................. 33  
Low Battery Detection on pin UBATT (EVZ):................................................................................ 34  
Oscillator for Boost (30V)-, Buck (5V)-Converter and Watchdog ................................................. 34  
Boost Converter (30V): ................................................................................................................. 35  
Buck Converter (5V):..................................................................................................................... 37  
Power On Reset of VCC5 & EVZ and Watchdog: ...................................................................... 39  
ISO 9141 - Serial Interface:........................................................................................................... 40  
Alarm Warning Lamp Driver (AWL1):........................................................................................... 41  
Alarm Warning Lamp and Multifunction Driver 2 (AWL2):............................................................ 42  
Voltage-/ Current-Sources (V/I):.................................................................................................... 43  
A)  
Squib Driver: Highside: .............................................................................................................. 44  
A)  
Squib Driver: Lowside: ............................................................................................................... 44  
Squib Driver: Highside and Lowside: ............................................................................................ 45  
Squib Resistance Measurement: .................................................................................................. 46  
Squib Leakage Measurement: ...................................................................................................... 49  
Internal Dummy Squib Resistance:............................................................................................... 50  
Supply Voltage Measurements: .................................................................................................... 50  
Detection of Safing Sensor Closure:............................................................................................. 51  
Average Chip Temperature Measurement:................................................................................... 52  
J. Serial Peripheral Interface (SPI)..................................................................................................... 53  
J.1: SPI Timing Characteristics:.................................................................................................... 53  
J.2: SPI Commands:..................................................................................................................... 54  
J.2.1: General Information on SPI Command Structure: ......................................................... 54  
J.2.2: Summary of SPI Commands: ........................................................................................ 54  
J.2.3: Firing Commands: (8XXX)H ......................................................................................... 55  
J.2.4: Squib Resistance Measurement-, Squib Voltage Measurement-  
and IMESS-pin Voltage Measurement Commands:...................................................... 56  
J.2.5: Firing Voltage Measurement Commands: ..................................................................... 57  
J.2.6: Squib Leakage Measurement Commands with one of eight squib switches in ON-st.:. 58  
J.2.7: Voltage-/ Current-Sources (V/I) Commands:................................................................. 59  
J.2.8: Supply Voltage-, Lamp-Measurement and Squib Leakage Measurement  
......... with squib switches in OFF-state Commands: (1XXX)H  
60  
J.2.9: Control Commands for Lamps, Watchdog and Safing Sensor Detection:..................... 61  
J.2.10: Oscillator Frequency Test Mode Command: (5555)H ................................................. 62  
J.2.11: 2.8V Reference Test Mode Command: (AAAA)H........................................................ 62  
J.2.12: Reset by SPI Command: (FFFF)H............................................................................... 62  
J.2.13: Average Chip Temperature Test Mode Command: (9XXX)H...................................... 63  
Version B  
May 05, 2001  
page 1  
Datasheet  
TLE 6710  
Combined Power-Supply and Firing Circuit for Airbag Applications  
A. Features  
Step up converter 30V (Boost Converter) with a maximum duty cycle of 90%  
and a 700mA minimum current limitation of the power transistor  
Step down converter 5V (Buck Converter)  
Improvement of the efficiency of the buck converter by external supply (EVZ2)  
Four independent firing squib drivers  
Highside and lowside switch for each firing circuit  
Firing current limitation to maximum 3.25A for each firing circuit  
Digital output for firing current detection of minimum 1.75A for two squib drivers  
Squib resistance measurement with analogue outputs  
Switchable gain factor (10 or 30) for an improved accuracy of the squib  
resistance measurement  
Programmable squib leakage measurement to ground or to battery supply  
with digital outputs  
Several supply voltage measurements on external pins  
Digital output for detection of safing sensor closure  
Watch dog circuit  
Precise 100kHz oscillator  
Power on/off reset generator  
Serial interface line driver (ISO 9141 and TTL-level)  
Four voltage/current sources for diagnostic purposes  
Diagnostic lamp driver  
Diagnostic driver for inductive loads or lamps  
Serial peripheral interface (SPI) for direct driving from a micro controller  
Logic and analogue output signals for direct sensing and diagnostics by a µC  
Package P-MQFP-64-1  
Type  
Ordering Code  
Package  
TLE 6710  
on request  
P-MQFP-64-1  
Version B  
May 05, 2001  
page 2  
Datasheet  
TLE 6710  
B. Circuit Description  
A description of each section of the IC is given below with the representative block diagram and the application circuit.  
Supply and Reference:  
Internal supply and biasing of the sections is provided by a supply module which is driven by voltage EVZ of the boost  
converter (30V) . During start up, EVZ is charged by the battery voltage UBATT via external inductance and diode.  
The voltage reference is based on a temperature-compensated bandgap circuit and has an accuracy of ± 1% at room  
temperature.  
Low Battery Detection on pin UBATT:  
A comparator has been incorporated to guarantee that the modules i.e. reference voltage, internal supply and 100kHz-  
oscillator, are fully functional before the boost converter (30V) and the logic output AUSP are enabled. It prevents the  
possibility of start up glitches. The internal reference voltage is monitored by a comparator which disables the output  
stage AUSP when the voltage on input pin UBATT drops below 5V. To prevent erratic output switching as the threshold  
is crossed, 200mV of hysteresis is provided.  
Oscillator for Boost (30V)-, Buck (5V)-Converter and Watchdog:  
The oscillator frequency is externally programmed to 100kHz by the capacitor COS = 1nF on pin COS and a current  
source determined by the fixed resistor ROS = 5 kon the pin ROS. The nominal voltage value on pin ROS is 1.2V.  
1.2 V  
Current calculation:  
I
ROS  
240 A  
5 k  
The charge to discharge ratio is controlled to yield a 90 % maximum duty cycle at the switch output of the boost  
converter (30V). During the discharge of COS, the oscillator generates an internal blanking pulse (FOSC) to disable  
the switch output of the boost converter (30V) and to enable the switch output of the buck converter (5V) as well as to  
provide a clock signal to the watchdog function. The nominal peak and valley saw tooth thresholds of the oscillator are  
VSTV = 0.6V and PSTV = 1.8V respectively.  
Version B  
May 05, 2001  
page 3  
Datasheet  
TLE 6710  
Calculation formulas:  
7
7
V
ROS  
ROS  
Capacitor charge current:  
I
I
COSc  
=
× IROS  
=
×
= 140 µA  
= 840µA  
12  
12  
R
7
7
2
V
ROS  
Capacitor discharge current:  
Peak to peak voltage on pin COS:  
Saw tooth rise time:  
COSd = − × IROS = −  
×
2
R
ROS  
V
COSpp = VROS = 1.2 V  
V
COSpp × CCOS  
12  
t
r
=
=
=
=
× RROS × CCOS  
I
COSc  
7
V
COSpp × CCOS  
2
Saw tooth fall time:  
t
f
× RROS × CCOS  
I
COSd  
7
1
1
Oscillator frequency calculation:  
f
OS  
f
offset 5%  
foffset 5%  
t
r
t
f
2 CCOS  
RROS  
f
offset ...Frequency offset of the PCB depending on the layout of each application.  
Boost Converter (30V):  
A boost converter generates a supply voltage for the airbag firing system, adjustable via external resistors between  
15V and 33V. An inductance L is PWM-switched by an integrated current limited DMOS-power-transistor with a  
frequency of 100kHz. The reference section provides a 2.8V voltage for the regulation loop. An error amplifier  
compares the reference voltage with the feedback signal TVZ, which comes from an external divider network used to  
determine the output voltage EVZ.  
Application note for programming the output voltage on pin EVZ:  
R
VZ1  
R
VZ2  
VEVZ  
2.8V  
R
VZ2  
Version B  
May 05, 2001  
page 4  
Datasheet  
TLE 6710  
With a PWM comparator, the output of the error amplifier is then compared with a periodic linear ramp provided by the  
saw tooth signal of the oscillator. A logic signal with variable pulse width is generated, which passes through logic and  
driver circuits to the power switching FET. A duty cycle of typ. 86 % is determined by the duration of the falling ramp of  
the saw tooth oscillator.  
The output transistor conduction is suppressed immediately if the current through the power FET exceeds typ. 800mA,  
low battery voltage or overvoltage on pin EVZ is detected. In case of short spikes, the logic circuit inhibits multiple  
pulses during one oscillating period.  
Warning: A short from EVZ to ground can damage the external diode or the inductance, due to non existing  
overcurrent limitation in that path. The output transistor is designed to switch a maximum of 40V, with a drain current  
limitation of typically 800mA.  
During start up, EVZ is charged by the battery voltage UBATT via external inductance and diode, so the voltage on pin  
EVZ is too low and the PWM-comparator requires a duty cycle of more than 85 %. Due to an increasing inductance  
current after several periods, the overcurrent sensor becomes active and reduces the maximum duty cycle to improve  
magnetic energy transfer.  
NOTE: The pin GNDC chip internally is separated from the analog ground GNDB. On PCB these pins need to be  
connected for standard applications. If a boost converter application with higher power capability is needed, the pin  
GNDC can drive the gate of an external logic level power FET. The maximum output voltage on pin GNDC will be 7.5V  
(0mA) and minimum 5.5V driving 10mA. An external overcurrent detection circuit should switch off the external power  
FET and lead to a current spike on pin GNDC (900mA) to shut down the boost converter output driver stage of the TLE  
6710.  
Buck Converter (5 V):  
A stabilised 5V-supply for general purpose in the airbag system is realised by a buck converter. An external inductance  
L is PWM switched with a frequency of 100kHz via a high side DMOS-power transistor. The regulator module is  
supplied by the boost converter output (15-33V), and uses the stored energy of the boost converter capacitor if battery  
power-down occurs.  
The basis for the regulation loop is a temperature compensated 2.8V bandgap reference voltage, generated in the  
reference section and linked to the non inverting input of the ‘Error Amplifier’ with a high voltage gain (> 60dB). The  
reference voltage is compared with the internally divided output voltage VCC5.  
External loop compensation is required for converter stability, and is formed by connecting a series resistor-capacitor  
(R , C ) between pins KOM1 and KOM2. The simplest way to optimise the compensation network is to observe the  
F
F
response of the output voltage VCC5 to a step load change, while adjusting R and C for critical damping. The final  
F
F
circuit should be verified for stability under four boundary conditions. These conditions are minimum input voltages,  
with minimum and maximum loads.  
Version B  
May 05, 2001  
page 5  
Datasheet  
TLE 6710  
The error amplifier output is applied to the inverting input of the ‘Pulse Width Modulator’ (PWM) and is compared with  
the oscillator ramp voltage COS. Output switch conduction is initiated when the error amplifier output voltage exceeds  
the sawtooth peak voltage, due to less VCC5 voltage.  
The duration of the output transistor conduction depends on VCC5 level and conduction is suppressed immediately if  
the current through the power FET exceeds typically 400mA or the voltage on pin VCC5 reaches typically 6V. The logic  
circuit inhibits in the case of short spikes, multiple pulse operation in one oscillating period.  
During start up procedure the buck converter will be enabled, if the voltage on pin TVZ is greater than 1.85V.  
So the EVZ voltage of the boost converter has to reach 60 % of its final value to enable the buck converter (5V). The  
buck converter will be disabled, only when a power down of EVZ occurs to less than about 7 % of the nominal voltage  
value on pin EVZ.  
The output power FET works as a source follower and is designed to switch a maximum of 40V with a drain current  
limitation of typ. 400mA. To make the power dissipation of the output FET smaller, the voltage drop across the device  
can be reduced by increasing the gate voltage. This improvement can be executed by adding an external supply  
voltage to the pin EVZ2, which should be approximately 8V greater than the voltage on pin EVZ and realized by a  
bootstrap circuit.  
Version B  
May 05, 2001  
page 6  
Datasheet  
TLE 6710  
Power On Reset of VCC5:  
In order to avoid any system malfunction, a sequence of several conditions has to be passed. In case of VCC5 (5V)-  
power down a logic LOW output signal on pin RESQ is generated to disable an external microcontroller. When a  
voltage of VCC5 4.75V is reached, the RESQ signal remains LOW for another 64ms before switching to HIGH. If  
VCC5 decreases below 4.55V, reset is activated after more than 10µs to 150µs only.  
Watchdog Operation and Generation of the Squib Driver Enable Signal ZKEN:  
The watchdog is driven by the oscillator frequency divided by 100 (= 1kHz). After power on, the LOW-signal on output  
RESQ for µC-reset is extended by 64 cycles. 32 clock cycles after the rising edge of RESQ, a chip internal trigger  
window (WDWI) begins. It ends after 32 cycles at the latest. If a trigger pulse (TRI) - coming via the serial peripheral  
interface (SPI) - occurs within the trigger window (or if a power-down occurs) the watchdog window signal is reset. The  
TRI pulse must be active for at least two rising clock edges and must return to zero for two clock edges. If no TRI pulse  
occurs in the trigger window, or if TRI pulse is outside of the trigger window, a reset (LOW) is generated on pin RESQ  
after 64 cycles and lasts for a further 64 cycles.  
Correct triggering also will be executed, if after the falling edge of the TRI pulse signal only the sampling of the second  
‘low’ occurs inside of the watchdog window. The beginning of the TRI pulse starts outside of the trigger window.  
The TRI trigger pulse is set and latched by the SPI command WDTRH and reset by WDTRL. So the microcontroller is  
allowed to do measurements with the TLE 6710 during the TRI pulse is active.  
In addition to the µC-reset signal RESQ, there exists an enable signal ZKEN for the internal squib drivers and for  
external firing circuits. If RESQ is high, the signal ZKEN goes to active high with the first valid trigger pulse TRI. It  
returns to low immediately if pretriggering, missing triggering or an incorrect trigger duration, as well as power down  
reset occurs. ZKEN is designed as an open drain output. If ZKEN is used as an input and held to 'low' by an external  
device, firing of the squibs can not be activated.  
Accelerated testing via pin RTP and AW1CT:  
VVCC5  
VRTP  
AW1C  
T
RESQ  
0
ZKEN  
0
fWD [kHz] TWD [ms]  
Remarks  
-
< 4.55 V  
>4.75V -0.3V VRTP 0.8V  
x
x
x
0
1
-
1
normal operating Normal operating  
mode  
mode  
>4.75V  
>4.75V  
>4.75V  
fWD  
2.4V VRTP ≤  
VVCC5+ + 0.3V  
2.4V VRTP ≤  
VVCC5+ + 0.3V  
VVCC5 + 1.7V  
VRTP 7.1V  
1
0
1
1
1
1
1
test mode A  
test mode B  
test mode C  
normal operating normal operating  
25  
25  
0.04  
0.04  
mode  
1
mode  
1
Frequency of the internal used 'Watchdog' - clock (fWD = fos / 100; fos = 100kHz typ.)  
For test mode B and C: fWD = fos / 4  
TWD  
Period of the internal used 'Watchdog' - clock ( = 1 / fWD)  
Version B  
May 05, 2001  
page 7  
Datasheet  
TLE 6710  
Watchdog  
A. Perfect triggering after power on  
VCC5  
5 V  
4.55 V  
<4.55 V  
0 V  
t
t
RESQ  
tpu  
64 cy  
chip internal  
watchdog  
window  
ttwd  
<32 cy  
WDWI  
t
t
t0  
TRI  
32 cy  
tts  
32 cy max.  
32 cy  
32 cy  
32 cy  
coming  
from SPI  
t0  
t1  
t2  
t3  
ZKEN  
t
B. Incorrect  
64 cy  
64 cy  
64 cy  
RESQ  
t
t
t
WDWI  
t0  
t1  
t2  
64  
32  
64  
64  
32  
32  
TR  
I
ZKEN  
t
incorrect trigger duration TR  
inside of watchdog window  
WDWI: H<=2cy, l<=2cy  
pretrigger  
missing trigger  
Version B  
May 05, 2001  
page 8  
Datasheet  
TLE 6710  
Note: After ‘key ON’ and sending the first correct SPI trigger command the output signal ZKEN is expected to transit to  
‘high’ immediately. However it may stay ‘low’ longer depending on the voltage on pin ISS (Input Safing Sensor). This  
one time event happens only after a RESQ ‘low’ to ‘high’ transition in case of VISS = 0V to VVCC5/2 (Spec. 20.4A), pin  
ISS = open or VISS VVCC5 + 1.2V (Spec.20.1). The time prolongation to achieve the rising edge on ZKEN will be  
9800/fos (98ms typ.) starting from the rising edge of RESQ, if a SPI trigger command was successful at that time.  
ISO 9141 - Serial Interface:  
Serial data communication from external to the µC of the airbag board is provided by a 12V/5V-level-interface. The  
transmission signal TXD is transferred via an open drain output buffer to pin K. The external line signal K is linked to  
the receiving pin RXD. If the input pin L is not connected, the typ. threshold voltage on pin K is 0.5 x V  
.
If the  
UBATT  
input pin L is connected, the typical threshold voltage on pin L is 0.16 x V  
. If it is necessary to handle a logic  
UBATT  
level input signal on pin L, the input pin LVCC has to be connected to VCC5. In this case the threshold voltage on pin L  
is 0.5 x VVCC5.  
+V  
K
TXD  
0.5 x UBATT  
0.16 x UBATT  
RXD  
L
LVCC  
to VCC5  
0.5 x VCC5  
for logic level purpose  
Serial Peripheral Interface (SPI) and Decoder Logic:  
The slave select pin SSQ allows the individual selection of different slave SPI devices. Slave devices that are not  
selected do not interfere with SPI bus activities. The SPI logic is selected by the slave select signal SSQ for the  
transmission of instructions like control and diagnostic commands.  
(See chapter: 'J. Serial Peripheral Interface SPI')  
The master-out slave-in pin MOSI is the input signal for the serial data from the µC, synchronously clocked by clock  
input CL, which operates at a maximum transmission rate of 4 Mbits/sec.  
All commands, no matter which function, consist of 16 bits, so the TLE 6710 SPI includes a 16 bit input shift register, a  
16 bit latch and a decoder logic block for the generation of the SPI command signals.  
With the rising edge of CL the data via MOSI is shifted into the first bit of the shift register.  
To suppress data transfer errors in the event that the clock signal includes spikes or glitches, a counter for 16 clock  
cycles is provided. Only after occurring of 16 clock cycles, the rising edge of SSQ causes an internal signal ‘lat_enm’  
(latch enable) to transfer the data from the shift register to the 16 bit latch. A CMOS logic block decodes the 16 bit word  
of the latch to address the desired functional block.  
Version B  
May 05, 2001  
page 9  
Datasheet  
TLE 6710  
Mode definition: The TLE 6710 can be configured in two modes. The difference between the two modes are the  
definitions of the hardware pins HSEN_EN12, LSEN_EN34 and MODE for the functions of firing and squib  
measurements (see chapter J.2). A Mode1 operation requires an initializing SPI ‘Mode command’ (FExx)H and a ‘high’  
on pin MODE before starting with SPI instructions. Otherwise the control and diagnostic commands will not be  
decoded. A MODE0 operation requires no SPI ‘Mode command’ however a ‘low’ or ‘open’ on pin MODE (due to a pull  
down resistor). With a hardware reset RESQ=0 the ASIC will return to its default state of the MODE0.  
The following table shows the principle:  
Mode  
pin: MODE  
0 or open  
1
SPI: Mode command  
MODE0  
MODE1  
(FExx)H  
TLE6710  
MODE:  
MODE0:‘low‘  
MODE1:‘high‘  
Serial Peripheral Interface (SPI) and Decoder Logic:  
Timing of the Serial Peripheral Interface (SPI):  
Version B  
May 05, 2001  
page 10  
Datasheet  
TLE 6710  
Alarm Warning Lamp Driver (AWL1):  
The driver AWL1 is designed as a low side switch. Its logical behavior can be programmed via the control pin AW1CT. If AW1CT  
is not connected, the lamp driver AWL1 is ON as default. If AW1CT is connected to ground (0V), the lamp driver AWL1 is off as  
default. In case of missing EVZ or VCC5 the warning lamp is supplied via pin AWL1 with a typical saturation voltage of 2V,  
independent of the IC-supply voltage.  
The following table defines all possible conditions:  
AW1CT  
open  
gnd  
open  
gnd  
open  
open  
gnd  
EVZ  
ok  
ok  
ok  
ok  
ok  
ok  
ok  
ok  
VCC5  
ok  
ok  
ok  
ok  
ok  
ok  
ok  
ok  
RESQ  
AWLEN  
SPI-bit  
Driver AWL1  
ON  
0
0
X
X
1
1
1
1
X
X
0
0
1
1
1
1
X
X
X
X
OFF  
ON  
OFF  
ON  
OFF  
OFF  
ON  
SAWL1B  
SAWL1D  
SAWL1B  
SAWL1D  
gnd  
open  
gnd  
open  
gnd  
open  
gnd  
ok  
ok  
missing  
missing  
ok  
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
ON  
OFF  
ON  
OFF  
ON  
OFF  
missing  
missing  
missing missing  
missing missing  
ok  
If AWL1 is on and the voltage on pin AWL1 is greater than typically 2V, the lamp current is limited. To protect the integrated power  
switch against overtemperature, a thermal limitation circuit is provided. This feature prevents catastrophic failures from accidental  
device overheating. The temperature limitation circuit starts to work, if the voltage drop across the power transistor is greater than  
typically 2V. The lamp status is reported as an information of the voltage or of the current on pin AWL1 to the general analogue  
measurement output pin UZP.  
1. Voltage measurement on pin AWL1:  
Via SPI command UAWL1 the voltage on pin AWL1 is measured and linked to the measurement pin UZP with a voltage ratio of 5  
to 1.  
Following detections are possible:  
Short to battery if lamp is switched on  
Over temperature if lamp is switched on  
Short to ground if lamp is switched off  
Open load if lamp is switched off  
2. Current measurement on pin AWL1:  
Via SPI command IAWL1 a current level on pin AWL1 is detected and reported to the measurement pin UZP as a digital  
information for 'open load if lamp is switched on'.  
Lamp switched to  
Lamp current  
VUZP  
on  
on  
0 to 0.4 V  
1.5 V to VVCC5  
10 mA  
30 mA  
Version B  
May 05, 2001  
page 11  
Datasheet  
TLE 6710  
Alarm Warning Lamp and Multifunction Driver 2 (AWL2):  
A second warning lamp block (AWL2) is provided to drive high side or low side loads.  
The default state of the driver is "off". The driver can be switched on via SPI control bits. To obtain minimum on resistance of the  
driver, if used as high side switch, VEVZ has to be greater than VAWL2D+6V  
In case of missing the voltage EVZ or VCC5 the driver is switched off. The pin AW1CT has no influence to the status of the AWL2-  
driver.  
EVZ  
ok  
ok  
ok  
missing  
ok  
VCC5  
ok  
ok  
ok  
ok  
RESQ  
SPI  
X
on  
off  
X
driver awl2  
OFF  
0
1
1
X
X
X
ON  
OFF  
OFF  
OFF  
missing  
missing  
X
X
missing  
OFF  
The load current is limited to 250 to 600 mA.  
The load status is reported as an information for the voltage on pins AWL2S and AWL2D to the general analogue measurement  
output pin UZP. This information can be selected by the corresponding SPI commands.  
1. Voltage measurement on pin AWL2D:  
Via SPI command UAWLD the voltage on pin AWL2D is measured and linked to the measurement pin UZP with a voltage ratio of  
5 to 1.  
Following detections are possible:  
Short to battery if driver is switched on  
Overtemperature if driver is switched on  
Short to ground if driver is switched off  
Open load if driver is switched off  
2. Voltage measurement on pin AWL2S:  
Via SPI command UAWLS the voltage on pin AWL2S is measured and linked to the measurement pin UZP with a voltage ratio of  
5 to 1.  
Following detections are possible:  
Short to ground if driver is switched on  
Overtemperature if driver is switched on  
Short to battery if driver is switched off  
Open load if driver is switched off  
Current can be measured by connecting a resistor from drain pin to battery supply or source pin to ground corresponding to the  
application. The voltage drop across the resistor indicates the current through the load.  
To protect the integrated power switch against overtemperature, a thermal shut down circuit is included. This feature prevents  
catastrophic failures from accidental device overheating. The attached schematic shows the principal function in case of  
overtemperature. If the lamp driver is on and an overtemperature signal of the AWL2 driver occurs, latch 2 is set and latch 1 is  
reset to switch off the driver. Activating an 'Average Chip Temperature'-measurement reports to pin UZP a reduced voltage of less  
than approx. 1.4V, which can be interpreted as a digital information of over temperature of lamp driver 2. Returning to the specified  
'Average Chip Temperature' measurement only can be done by a SPI command SAWL2D (to switch off the lamp).  
Version B  
May 05, 2001  
page 12  
Datasheet  
TLE 6710  
Voltage-/ Current Sources:  
The functional block 'V/I-Sources' is provided to measure the value of four different external resistors and can be  
addressed by a special SPI command SELx (x=1,2,3,4) (2XXX)H. After being addressed a constant voltage source of  
2.8V on pin IASGx is activated and a current flows through one addressed external resistor. The resistance dependent  
sensor current is reflected by a 10 to 1 current mirror to an analysis path ISENS. The voltage drop of R  
on pin  
SENS  
ISENS is proportional to the actual external resistive sensor value and is reported 1:1 to pin UZP. This signal is  
connected with an analogue port of the µC and stored as first measurement value. Due to the possibility of an external  
ground shift a second measurement occurs to use a difference measurement principle to eliminate a constant ground  
voltage shift. Therefor the SPI command SELx (x=1,2,3,4) AND SELV (BXXX)H has to be addressed to activate the  
constant voltage source to the second value of 5.0V on pin IASGx. This voltage determines a second voltage value on  
pin UZP.  
Calculation of the external resistance value on pin IASGx (done by the µC):  
SENS x  
R
5.0V 2.8V  
RIASGx  
=
10  
V
ISENS2  
V
ISENS1  
The current through pin IASGx is limited to |25|...|80| mA, if pin IASGx is shorted to ground and the voltage on pin  
ISENS does not reach VVCC5 due to a low resistor on pin ISENS. However the value of the IASGx current limitation  
can be reduced by increasing the value of the resistor on pin ISENS. Then the maximum current through pin IASGx  
can be calculated as:  
V
VCC5  
I
IASGxlim 10 x  
RSENS  
For high accuracy the IASGx current needs to be between 1 and 20mA and the maximum ISENS voltage is less than  
VVCC5-0.3V. Under clamping condition the voltage on pin ISENS is clamped to VVCC5 + 0.3V.  
Calculation of the value of the resistor on pin ISENS:  
V
VCC5 0.3V  
RSENS = 10 x  
I
IASGmax  
Version B  
May 05, 2001  
page 13  
Datasheet  
TLE 6710  
Squib Drivers:  
The TLE 6710 includes four independent driver circuits to fire one squib each. The deployment of a squib is only  
initiated, if two independent switches of the firing squib loop are closed. These two serial switches are realised by one  
1)  
highside DMOS -switch from squib supply pin VZx (x=1,2,3,4) to the first terminator of the squib ZPx1 (x=1,2,3,4) and  
one lowside DMOS-switch from the second terminator of the squib ZPx2 (x=1,2,3,4) to ground Mx (x=1,2,3,4).  
The squib will fire only if all following signals are present: RESQ = 1,  
Mode  
MODE ZKEN ZKEN_int HSEN_EN12 LSEN_EN34 Function  
MODE0  
MODE1  
MODE1  
MODE1  
0
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
0
0
1
1
(8xxx)H: firing of HSx and / or LSx  
(8xxx)H: firing of squib 1 and 2  
(8xxx)H: firing of squib 3 and 4  
(8xxx)H: firing of squibs 1 to 4  
For MODE1 operation an initializing SPI ‘Mode command’ needs to be sent once after start up. If RESQ = 0 is  
generated, then the measurement will be interrupted and the ASIC will return to its default state of the MODE0. A soft  
reset (FFFF)H does not change the mode. ZKEN must be generated internally (ZKEN_int) to high. Used as an input  
the ZKEN signal is not allowed to hold it to GND by an external device.  
In case of activating the lowside switching transistor the firing current will be sensed (squib driver 1 and squib driver 2  
only). If the current exceeds 1.75A, a digital firing current signal can be detected on pins LL and LH as described in the  
following table:  
Firing current of squib 1 Firing current of squib 2  
VLL  
high  
low  
high  
low  
VLH  
high  
high  
low  
0A  
0A  
>1.75A  
0A  
>1.75A  
0A  
>1.75A  
>1.75A  
low  
The maximum firing current of the squib loop is limited to 3.0 A by reducing the gate to source voltage of the low side  
DMOS transistors.  
For a drain to source voltage drop less than approximately 2V of each switching transistor, no reduction of gate to  
source voltage of the squib transistor is demanded. So the sum of voltage drops across the high side and low side  
transistors does not exceed 3.0 V at 1.75 A of squib current. The gate driver of the high side transistor is supplied via  
pin EVZ2. A current source from EVZ to an external capacitor on pin EVZ2, de-coupled by a diode provides a sufficient  
gate to source voltage for the DMOS.  
To protect each individual squib driver transistor in the event that the peak junction temperature of the transistor  
o
exceeds 280 C a thermal toggling circuit is provided to avoid a further increasing of the DMOS temperature. This  
feature prevents catastrophic failures from accidental device overheating. Due to too long switch on times and high  
power consumption the thermal toggling leads to a general increasing of the average chip temperature. If the average  
chip temperature exceeds 100°C, a driver will be deactivated under thermal toggling and stays in off-state by a latch.  
Repeating on-commands do not activate the affected transistor, however to resume firing it will be necessary to send a  
NO OP-, 0000-, driver-off- or any measurement-command to reset the latch, before sending a new firing command,  
once the average temperature falls below its critical level.  
1)..........  
DMOS: Double Diffused Metal Oxide Transistor  
Version B  
May 05, 2001  
page 14  
Datasheet  
TLE 6710  
ϑ
ϑ
squib  
Truth table for the squib drivers:  
Mode  
MODE ZKEN ZKEN_int HSEN_EN12 LSEN_EN34 SPI command / Function  
MODE0  
MODE0  
MODE0  
MODE0  
MODE1  
MODE1  
MODE1  
MODE1  
MODE1  
MODE1  
0
0
0
0
1
1
1
1
1
1
1
x
x
x
1
1
1
x
x
x
1
1
1
1
1
1
1
1
1
1
1
1
1
x
0
1
x
(8xxx)H: firing of HSx and / or LSx  
(7xxx)H: reference + HSx main current  
(Cxxx)H: measurement with HSx on  
(Cxxx)H: measurement with LSx on  
(8xxx)H: firing of squib 1 and 2  
0
0
1
1
0
0
0
1
0
1
0
0
0
(8xxx)H: firing of squib 3 and 4  
(8xxx)H: firing of squibs 1 to 4  
(7xxx)H: reference + HSx main current  
(Cxxx)H: measurement with HSx on  
(Cxxx)H: measurement with LSx on  
LSx  
HSx  
low side switch of the squib driver (x = 1,2,3,4)  
high side switch of the squib driver (x = 1,2,3,4)  
For MODE1 operation an initializing SPI ‘Mode command’ needs to be sent once after start up. If RESQ = 0 is  
generated, then the measurement will be interrupted and the ASIC will return to its default state of the MODE0. A soft  
reset (FFFF)H does not change the mode. ZKEN must be generated internally (ZKEN_int) to high. Used as an input  
the ZKEN signal is not allowed to hold it to GND by an external device.  
Version B  
May 05, 2001  
page 15  
Datasheet  
TLE 6710  
Squib Resistance Measurement:  
The squib resistance measurement module consists of several circuit parts and can be addressed by a SPI command  
(4XXX)H. After being addressed a current source of approximately 5.5mA is activated and this current flows as a  
reference measurement current through ZPx2. The appropriate voltage drop across the squib is amplified by a precise  
amplifier with a fixed gain of either 10 or 30 and monitored on the external analogue output pin UZP. The measurement  
current is also reported by the voltage drop across the external resistor on pin IMESS. The value of this basic current  
through pin IMESS is determined by the external resistor on pin ROS and can be calculated by the following formula:  
IIMESS = IROS x 55 x 5/12  
IROS = 1.2V / RROS  
(IROS=240µA @ 5k)  
One of the recommended values for RROS in the application circuits is 4.99k.  
After the first reference measurement has been performed with the current of typ. 5.5mA, a second measurement with  
a programmable current source of typically 40mA is started by an additional SPI command (6XXX)H. This current is  
determined by an external resistor from pin EVZ to pin WDR. The voltage on pin WDR is regulated to approximately 9  
V.  
A=1/5  
main  
current  
basic  
current  
RB  
SB  
5,3  
V
Squib resistance measurement: Functional schematic  
Version B  
May 05, 2001  
page 16  
Datasheet  
TLE 6710  
Application note for calculation of the external resistor R  
:
WDR  
VEVZ (7.5to 8.5V)  
RWDR  
(10to50 )  
IWDR < 60mA,  
IWDR  
Rsquib = 2approx.  
Also for the second measurement the voltage drop across the squib (x10 or x30) via pin UZP and the measurement  
current via the pin IMESS are reported to the microcontroller. This feature enables the µC to calculate the external  
squib resistance with a high accuracy by eliminating DC-offsets.  
Calculation of the squib resistance R  
:
squib  
VUZP1 VUZP2  
Rsquib  
RIMESS / gain factor (10 or 30)  
VUZP1 0.9 VVCC5 typ.  
IMESS =50approx.  
, if a mechanical safing sensor (SS) with a resistor (RS) is used in parallel.  
(V  
V
)
IMESS2  
IMESS1  
R
There is another way to measure R  
squib  
Instead of activating the higher measurement current the highside switch of a squib driver can be switched on via SPI:  
(7XXX)H . Now a current determined by the resistor RS flows through the squib and is reported to UZP and IMESS.  
For buckle switch measurement purposes an amplifier with gain 2 was provided. In applications a buckle switch (SB)  
with a 2kto 5kresistor (RB) in parallel is connected in series to the squib. For the distinction between a broken and  
an open seat belt switch the result of the gain 10/30 amplifier gives us no information, so the voltage drop across pin  
IMESS multiplied by two can be reported to pin UZP to increase the sensitivity of the current measurement through the  
pin IMESS. If this principle does not give information enough a squib voltage measurement with activated ‘main  
current’ can be performed to multiplex VZPx1 / 5 to pin UZP. So the SPI commands for the squib resistance  
measurement select between a measurement of the voltage drop across the squib (gain 10/30 amplifier), a  
measurement of the voltage drop across pin IMESS (gain 2 amplifier) or a measurement of the voltage on pin Zpx1  
(divided by 5) reported to pin UZP each.  
The measurement for each squib is activated separately, but the analogue output signals on pins UZP and IMESS are  
common.  
Note 1: The high measurement current through the squib requires a force and sense measurement principle to  
guarantee the high resistance measurement accuracy. So the precise gain-10-amplifier sense inputs and the gain-30-  
amplifier sense inputs are bonded separately to the pins ZPx1 and ZPx2. (x=1,2,3,4).  
Note 2: The analogue output pin UZP can be connected in parallel with other ASICs on one PCB.  
Note 3: The current output pin IMESS can be connected in parallel with other ASICs on one PCB. So the external  
resistor on pin IMESS is only used once and is common for all IC's.  
Squib Leakage Measurement:  
The leakage resistance measurement module can be addressed only for one squib at one time by a SPI command  
(1XXX)H. The current for the leakage measurement I  
is determined by the reference resistor RRLM from pin RLM  
RLM  
to ground, which is supplied by a voltage of VUBRL / 3 .  
VUBRL  
IRLM  
=
= ILL = ILH  
3×RRLM  
Due to a leakage the programmed leakage current I  
can flow either from the squib system via the leakage resistor  
RLM  
R
LL  
to ground (I ) or from a positive voltage +V via the leakage resistor R into the squib system (I ). See  
LL LH LH  
schematic.  
Version B  
May 05, 2001  
page 17  
Datasheet  
TLE 6710  
Across the leakage resistors R and R the following leakage voltage drops can be monitored:  
LL LH  
V
UBRL  
VZPx1to GND = ILL ×RLL =  
×RLL  
3×RRLM  
VUBRL  
VUBRL to ZPx1 = ILH ×RLH =  
×RLH  
x = 1,2,3,4  
3×RRLM  
15 to 33 V  
VBAT  
EVZ  
EVZ  
RS  
VZx  
SS  
LH  
1:1  
UBRL  
3
ILL  
HSx  
SPI:SHSx  
A
x VUBRL  
REG  
+
-
-
4
VUBRL  
3
VRLM =  
ZPx1  
ILH  
1
x VUBRL  
4
RLM  
+
squib1  
ILL  
ILH  
+ V  
RLL  
RRLM  
IRLM  
1:1  
RLH  
ZPx2  
LL  
A
SPI:LKx  
from squib  
driver 1  
I1 > 1.75 A  
I2 > 1.75 A  
LSx  
SPI:SLSx  
from squib  
driver 2  
Mx  
43  
Leakage resistance measurement: Functional schematic  
For the TLE 6710 the leakage resistance threshold is defined by:  
RLeak = RLL = RLH = RRLM x 3/4  
and so the leakage voltage drops become:  
VZPx1 to GNDB = VUBRL / 4  
and  
V+V to ZPx1 = VUBRL / 4  
Two comparators, which are referenced to 1/4 x V  
UBRL  
and 3/4 x V  
UBRL  
, determine a leakage to V or a higher  
UBRL  
voltage by setting pin LH to 'low' and a leakage to ground by setting pin LL to 'low'. If no leakage is detected the pins LL  
and LH report 'high'.  
To prevent jitters on the output pins a hysteresis of 1/48 x V  
UBRL  
is provided in both comparators.  
Leakage resistance malfunction can be simulated in a testmode by switching on only the squib driver highside  
transistor for a leakage to battery, as well as by switching on only the lowside transistor for a leakage to ground by SPI:  
(CXXX)H. (see chapter 'SPI Commands').  
Version B  
May 05, 2001  
page 18  
Datasheet  
TLE 6710  
Supply Voltage Measurements:  
By SPI commands (1XXX)H (see chapter J.2.8) different voltage measurements are activated and reported to the  
analogue output pin UZP with a defined voltage ratio. The pin names of the voltage sources which can be selected are:  
UBATT, UBRL, ZPx1  
voltage ratio to pin UZP: 5,  
voltage ratio to pin UZP: 8.  
EVZ, EVZ2, VZ1, VZ2, VZ3, VZ4  
For test purposes the internal used reference voltage can be measured by addressing the SPI command UREF: (AA  
AA)H.  
UREF  
voltage ratio to pin UZP: 1 (+/-7%).  
Detection of Safing Sensor Closure:  
Depending on the voltage on pin ISS either the high side - or the low side detection circuit is activated.  
High Side Detection:  
For VISS VVCC5+1.8V the ‘Safing Sensor’ high side - detection is turned on.  
This comparator circuit detects a closure of an external 'Safing Sensor' of the system between the pins VZ1 and ISS. A  
closure Safing sensor switch reports a 'high' to pin MSS. If under firing condition the differential voltage between VZ1  
and ISS exceeds typ.2.3 V output MSS changes to 'low'.  
For testing purposes a current source (typ. 3 mA) from pin VZ1 to ground can be addressed by the SPI command:  
SMSSH. In this case a testing current flows through a resistor in parallel with the Safing Sensor. The voltage drop  
across VZ1 and ISS is high enough to exceed the MSS comparator threshold voltage of typ. 0.4 V to get 'low' on pin  
MSS.  
TLE6710  
Version B  
May 05, 2001  
page 19  
Datasheet  
TLE 6710  
Functional description (VISSVVCC5+1.8 V)  
VISS - VVZ1 VMSS  
Safing sensor closed  
Safing sensor open and squib driver inactive (off)  
Safing sensor open and squib driver active (on)  
Safing sensor open and squib driver inactive (off) and 3mA current source activated by SPI  
Safing sensor closed and one to four squib drivers active (on)  
0V  
0V  
10 to 30V  
0.3V  
2.1V  
'high'  
'high'  
'low'  
'low'  
'low'  
Low Side Detection:  
A voltage on pin ISS of VISS VVCC5+0.6V activates the ‘Safing Sensor’ low side - detection.  
This comparator circuit detects a closure of an external 'Safing Sensor' from pin ISS to ground, which is reported to pin  
MSS and indicated by a ‘high’ state at this output ( ‘Closure’ means that VISS VVCC5/2 typ.). To describe the behavior  
of the pin MSS depending on ISS and ZKEN, following cases need to be considered together with the time diagrams  
on the following page:  
Case 1:  
If the closure time of the safing sensor tclosure is less than 0.5 ms, then the output MSS will follow the  
inverted input signal ISS.  
Case 2:  
In case of a duration of the safing sensor closure tclosure 1ms a time extension of tadd = 96.5ms is  
triggered. The input signal ISS will be sampled by a clock with the period of TS=50/fos. The MSS time prolongation will  
be started only, if the internal clock (1/TS) samples a transition of H==>L==>L (see x in the timing diagrams). The  
output MSS remains ‘high’ for the total period of time tsum = tdetect + tadd = (0.5÷1)ms + 96.5ms. To describe the behavior  
of the MSS - output after this period of time, following cases must be considered.  
The state on pin MSS will return to ‘low’, if the voltage on pin ISS has returned to ‘high’ and has been ‘high’  
continuously within this period of time plus 0.5ms.  
4
Case 3:  
remain in ‘high’ state for another tadd period .  
Case 4: After an interruption of the safing sensor closure of at least 0.5ms within the extension period tadd  
If the closure still exists after this period tadd plus 1ms, the output MSS will be triggered again and will  
a
retrigger will occur, if the following closure time is longer than 1ms. An interrupt less than 1ms does not have any effect  
on the origin time extension.  
Case 5:  
For testing purposes of the external safing sensor the squib drivers can be disabled externally via the  
pin ZKEN. Whenever this happens, and the time extension is activated (tclosure 1ms), the voltage on pin ZKEN is kept  
‘low‘ internally by the ASIC within this period (tadd) of time (see switch S in the following schematic).  
TLE6710  
Function description (VISSVVCC5+0.6 V)  
Safing sensor open  
VISS [V]  
VMSS  
tsum [100/fOS]  
----  
V
VCC5VISS(VVCC5/2)+0.1 'low'  
Safing sensor closed (tclosure0.5 100/fOS)  
Safing sensor closed (tclosure1 100/fOS)  
Safing sensor retrigger (tinterrupt0.5 100/fOS)  
VISS(VVCC5/2)-0.1  
VISS(VVCC5/2)-0.1  
VISS(VVCC5/2)-0.1  
'high'  
'high'  
'high'  
tclosure  
(0.5+96.5) tsum (1+96.5)  
(0.5+96.5) tsum (1+96.5)  
Version B  
May 05, 2001  
page 20  
Datasheet  
TLE 6710  
0,50  
50  
tclosure  
Detection with Time Extension  
Case 2: Triggering Mode  
tclosure  
tdetect  
193  
Case 3: Retriggering Mode  
193  
193  
Case 4: Retriggering Mode with Interruptions  
not valid  
valid  
193  
193  
Case 5: Testmode  
tclosure  
tdetect  
193  
Version B  
May 05, 2001  
page 21  
Datasheet  
TLE 6710  
Average Chip Temperature Measurement:  
A SPI command (9XXX)H (MTEMP) allows to measure the temperature dependent voltage of 4 diodes connected in  
series via the pin UZP. The diodes are supplied by a temperature constant current source which is generated in the  
oscillator circuit. The current depends on the resistor on pin ROS.  
IDIODES = IROS / 6 = 0.2V / RROS  
With ROS = 5kthe current will be 40µA. The temperature dependence of the voltage across the four diodes is  
approximately - 7 mV/K. The nominal value at room temperature (25°C) will be 2.9 V.  
The value will be divided by two after an overtemperature shut down of the lamp driver AWL2 (see chapter AWL2).  
Grounding Requirements for External Components on PCB:  
The external components from the following pins to ground are necessary to be grounded to pin GNDB. The  
connections have to be low resistive and without any voltage shift to the ground pin GNDB.  
Critical pins:  
ROS, TVZ, UZP, IMESS, RLM, ISENS  
Version B  
May 05, 2001  
page 22  
Datasheet  
TLE 6710  
C. Package Outline  
P-MQFP-64-1  
Version B  
May 05, 2001  
page 23  
Datasheet  
TLE 6710  
D. Pin Configuration  
(top view)  
Version B  
May 05, 2001  
page 24  
Datasheet  
TLE 6710  
E. Pin Definitions and Functions  
Pin  
No.  
1
2
3
Symbol  
Function  
ISENS  
Current measurement output of V/I-source for connection of an external resistor  
Frequency compensation capacitor terminal 2 for 5 V-buck converter  
Frequency compensation capacitor terminal 1 for 5 V-buck converter  
Analogue measurement and diagnostic output 0...5V  
External capacitor (COS=1nF) for oscillator  
KOM2  
KOM1  
UZP  
4
5
COS  
6
ROS  
External resistor (ROS=5k) for oscillator  
7
8
9
10  
11  
GNDB  
SVCC5  
EVZ2  
EVZ  
Ground terminal for analogue functions and digital logic  
The output of the buck converter (5V) is connected to an external inductance  
Connection for external stabilization capacitor  
Boost Converter Output  
The input of the boost converter is connected to an external inductance  
(100 µH)  
SVZ  
12  
13  
14  
GNDC  
RLM  
TVZ  
Ground terminal for step-up and step-down-converter  
Connection of external reference resistor for leakage current detection  
Feedback terminal of the boost converter regulation loop via an external resistive  
divider between EVZ and GNDC  
15  
16  
VCC5  
5V-supply terminal for feedback of the buck converter regulation loop and  
supply-input for all 5V-modules  
Connection of external reference resistor for firing circuit resistance  
measurement  
IMESS  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
VZ2  
ZP21  
ZP22  
M2  
RESQ  
AUSP  
MSS  
LH  
Buffered supply input voltage firing circuit 2  
Connection high-side-switch firing circuit 2  
Connection low-side-switch firing circuit 2  
Ground terminal for firing circuit2  
Open drain output for reset or power fail signal  
CMOS/TTL-level output of low supply voltage detection, low active  
CMOS/TTL-output for detection of short of safing sensor  
CMOS-level output for squib leakage to battery or firing current 2 >1.75A  
CMOS-level output for squib leakage to ground or firing current 1 >1.75A  
CMOS-level input for the Serial ISO 9141 Interface  
CMOS-level output signal of the Serial ISO 9141 Interface  
CMOS-level input for testing purposes (Watchdog functions)  
Ground terminal for firing circuit 1  
LL  
TXD  
RXD  
RTP  
M1  
ZP12  
ZP11  
VZ1  
Connection low-side-switch firing circuit 1  
Connection high-side-switch firing circuit 1  
Buffered supply input voltage firing circuit 1  
Version B  
May 05, 2001  
page 25  
Datasheet  
TLE 6710  
Pin Definitions and Functions (continued)  
Pin  
No.  
33  
34  
35  
36  
37  
38  
39  
40  
41  
42  
43  
44  
45  
46  
47  
48  
49  
50  
51  
52  
53  
Symbol  
Function  
ISS  
Detection input for short of safing sensor  
WDR  
UBATT  
UBRL  
AWL1  
GNDA1  
IASG1  
IASG2  
IASG3  
IASG4  
AWL2S  
AWL2D  
K
Connection of external reference resistor to EVZ for resistance measurement  
Unregulated high voltage supply input  
UBATT supply voltage connection  
Output of the warning lamp  
Ground terminal for AWL1  
Output of V/I-source 1  
Output of V/I-source 2  
Output of V/I-source 3  
Output of V/I-source 4  
Source terminal for AWL2  
Drain of AWL2 driver for general purpose  
High-voltage open drain output of the serial interface  
High-voltage input for the serial interface  
Input to program the L input to TTL-level, if connected to VCC5  
Input, control pin for warning lamp 1, must be left open for self conductance  
Buffered supply input voltage firing circuit 3  
Connection high-side-switch firing circuit 3  
Connection low-side-switch firing circuit 3  
Ground terminal for firing circuit 3  
L
LVCC  
AW1CT  
VZ3  
ZP31  
ZP32  
M3  
HSEN_EN12 Logic-level input to enable the high-side switches (MODE0) or squibs 1 & 2  
(MODE1)  
54  
LSEN_EN34  
Logic-level input to enable the low-side switches (MODE0) or squibs 3 & 4  
(MODE1)  
55  
56  
57  
58  
59  
60  
61  
62  
63  
64  
AWLEN  
SSQ  
CL  
MOSI  
MODE  
ZKEN  
M4  
ZP42  
ZP41  
VZ4  
Logic-level input to switch on the warning lamp  
Logic-level input to select SPI slave  
Logic-level clock input of SPI  
Logic-level master-out slave in input  
Logic-level input for the mode definition (MODE0 or MODE1)  
Logic-input/output open drain signal, enable firing HS- and LS-switch  
Ground terminal for firing circuit 4  
Connection low-side-switch firing circuit 4  
Connection high-side-switch firing circuit 4  
Buffered supply input voltage firing circuit 4  
Version B  
May 05, 2001  
page 26  
Datasheet  
TLE 6710  
F. Block Diagram and Application Circuit  
Version B  
May 05, 2001  
page 27  
Datasheet  
TLE 6710  
G. Absolute Maximum Ratings  
Maximum ratings are absolute ratings; exceeding just one of these values  
may cause irreversible damage to the integrated circuit.  
Maximum Ratings for junction temperature T from -40 to 150°C  
j
Limit Values  
No.  
Parameter  
Symbol  
min.  
typ.  
max.  
Unit  
Supply Pins  
Voltage  
1.1  
VUBATT, VUBRL,  
VSVZ, VEVZ,  
VVZ1,VVZ2,VVZ3, VVZ4,  
VAWL1, VAWL2D, VAWL2S,  
VISS, VTVZ  
VSVCC5  
VEVZ2  
-0.3  
-1.2  
-0.3  
40.0  
40.0  
44.0  
V
V
V
VVCC5  
IUBRL  
-0.3  
-30  
6.8  
3.0  
V
1.2  
1.3  
Current  
mA  
Squib Driver Pins  
Voltage  
VZP11,VZP12,  
VZP21, VZP22,  
VZP31,VZP32,  
VZP41,VZP42  
-0.3  
40.0  
|4.0|  
V
1.4  
1.5  
Current  
(see diagram A for timing  
characteristics)  
IZP11, IZP12,  
IZP21, IZP22,  
IZP31, IZP32,  
IZP41, IZP42  
A
Input-/ Output-Signal Pins  
Digital input voltages  
VRTP  
-0.3  
-0.3  
7.1  
V
VHSEN_EN12,  
VLSEN_EN34,  
VTXD, VAWLEN,  
VMOSI, VCL,  
VAW1CT, VSSQ, VMODE  
VVCC5  
+0.3  
V
1.6  
Digital input currents  
IHSEN_EN12, ILSEN_EN34,  
ITXD, IAWLEN,IMOSI, ICL,  
IRTP, IAW1CT, ISSQ,  
IMODE  
|10.0|  
mA  
1.7  
1.8  
Digital output voltages  
Digital output currents  
VRXD, VAUSP,VRESQ,  
VMSS, VLL, VLH, VZKEN  
-0.3  
VVCC5  
+0.3  
V
IRXD, IAUSP, IRESQ, IMSS,  
ILL, ILH, IZKEN  
|10.0|  
mA  
Version B  
May 05, 2001  
page 28  
Datasheet  
TLE 6710  
Absolute Maximum Ratings (continued)  
Limit Values  
No.  
Parameter  
Symbol  
min.  
typ.  
max.  
Unit  
Resistance Measurement Pins  
1.9  
Current output for squib resistance  
VIMESS  
-0.3  
6.8  
V
1.10 measurement  
IIMESS  
IIMESS  
-100.0  
-220.0  
100.0  
100.0  
mA  
mA  
1.10A For On-time ton< 5ms  
1.11 Voltage output for squib resistance  
1.12 measurement  
VUZP  
IUZP  
-0.3  
6.8  
V
-10.0  
10.0  
mA  
1.13 Reference input for squib resistance  
1.14 measurement  
VWDR  
IWDR  
-0.3  
40.0  
V
-100.0  
100.0  
mA  
Leakage Measurement Pins  
1.15 Input differential voltage  
VZPx1-VZPx2  
-40.0  
40.0  
V
1.16 Reference output for leakage resistance VRLM  
-0.3  
25.0  
10.0  
V
1.17 measurement  
IRLM  
-10.0  
mA  
ISO 9141 Interface Pins  
1.18 L input  
VL  
IL  
-1.0  
-2  
15  
2
V
1.19  
mA  
V
1.20 K output / input  
1.21  
VK  
IK  
-1  
40  
100  
-100  
mA  
1.21.A LVCC input voltage  
VLVCC  
-0.3  
6.8  
V
V/I-Source Pins  
1.22 IASGx voltage (x=1 to 4)  
1.23 ISENS output voltage  
1.24 ISENS output current  
VIASG1 to 4  
VISENS  
-0.6  
-0,3  
-6.0  
40  
6.8  
6.0  
V
V
IISENS  
mA  
Oscillator Pins  
1.25 ROS voltage  
1.26 ROS current  
1.27 COS voltage  
1.28 COS current  
VROS  
IROS  
VCOS  
ICOS  
-0,3  
-300  
-0.3  
-2  
6.8  
300  
6.8  
2
V
µA  
V
mA  
Compensation Pins  
1.29 KOM1, KOM2 voltage  
VKOM1, VKOM2  
-0,3  
6.8  
V
Version B  
May 05, 2001  
page 29  
Datasheet  
TLE 6710  
Absolute Maximum Ratings (continued)  
Limit Values  
No.  
Parameter  
Squib Deployments  
Symbol  
min.  
typ.  
max.  
Unit  
1.31 Number of firings per squib driver and  
lifetime of the IC.  
Nmax  
100  
Squib firing on / off timing  
characteristics see the following  
enclosed 'diagram A + B'  
cooling delay time between two cycles  
1min.; load=2Ω  
Temperatures  
1.32 Ambient temperature  
1.33 Storage temperature  
1.34 Junction temperature  
-40  
-55  
-40  
90  
150  
150  
°C  
°C  
°C  
ϑa  
ϑs  
ϑj  
Thermal Resistance  
1.35 Junction to ambient  
1.36 Junction to case  
1)  
Rthja  
Rthjc  
50  
K/W  
K/W  
15  
ESD Classification  
1.37  
1.38  
2000  
200  
V
V
Human Body Model (100pF/1.5k)  
Machine Model (200pF/0)  
±VHBM  
±VMM  
1)  
Condition:  
Printed circuit board (epoxi), t = 1.5mm  
Top side: copper connections to the pins ( W = 0.35mm, L > 10mm)  
CU  
CU  
Bottom side: Copper lattice (W = 5mm, W = 1mm)  
L
CU  
squib 1  
squib 2  
squib 3  
squib 4  
4ms  
10ms  
4ms  
1min  
4ms  
Diagram B  
Diagram A  
Squib firing on/off-timing characteristics  
Version B  
May 05, 2001  
page 30  
Datasheet  
TLE 6710  
H. Functional Range  
In the functional range the functions given in the circuit are fulfilled.  
Deviations from the characteristics are possible.  
T = -40 to + 125°C  
j
Limit Values  
No.  
Parameter  
Symbol  
min. typ. max.  
Unit  
Condition  
2.1  
Voltage on pins UBATT, AWL1, VUBATT  
-0.3  
-0.3  
20  
18  
V
V
AWL2D, AWL2S  
VAWL1  
VAWL2S  
VAWL2D  
2.2  
2.3  
2.4  
Voltage on pins UBATT, AWL1, VUBATT  
25  
40  
30  
V
t 15 min  
AWL2D, AWL2S during jump  
start  
VAWL1  
lamps off  
VAWL2S  
VAWL2D  
Voltage on pins UBATT, AWL1, VUBATT  
V
t 400ms  
lamps off  
AWL2D, AWL2S during load  
dump  
VAWL1  
VAWL2S  
VAWL2D  
dVUBATT/dt  
dVUBRL/dt,  
dVEVZ/dt,  
dVEVZ2/dt,  
dVVZx/dt,  
dVZPxx/dt,  
dVIASGx/dt  
VEVZ  
Rate of supply voltage rise  
V/µs  
2.5  
Supply voltage EVZ  
4,5  
33.0  
40.0  
44.0  
V
V
V
2.5.A Supply voltage EVZ  
2.6  
2.7  
VEVZ  
VEVZ2  
t 48 hours  
Supply voltage EVZ2  
10.0  
Supply voltage of squib drivers  
VVZ1, VVZ2,  
VVZ3, VVZ4 6.0  
40.0  
4.8 5.0 6.2  
V
V
2.8  
Supply voltage on pin VCC5  
VVCC5  
2.8 A Voltage on digital I/O pins  
Vdigital I/O  
VUBRL  
-0.3  
-0.3  
VVCC5 V  
2.9  
Reference input on pin UBRL  
for leakage measurement  
40.0  
V
t 400ms;  
25V: t 15 min;  
18V: continuous  
ISVCC5 600mA  
2.10 Voltage on pin SVCC5  
2.10A Voltage on pin SVZ  
2.11 Voltage on pin L  
2.12 Voltage on pin K  
2.13 Voltage on pin ZPx1 (x=1,2,3,4) VZPx1  
2.14 Voltage on pin IASGx  
2.15 Voltage on pin IASGx  
2.16 Voltage on pin IASGx  
2.17 Lifetime  
VSVCC5  
VSVZ  
VL  
-0.6  
-0.3  
-0.3  
-1.0  
-1.0  
-0.6  
40  
40  
6.8  
18  
40  
18  
25  
40  
15  
V
V
V
V
V
V
V
V
VK  
VUBATT = VEVZ = 8V  
VIASGx  
VIASGx  
VIASGx  
tlt  
t 15 min  
t 400ms  
years  
2.18 Operating time on battey  
Conditions:  
Tj = 90 °C  
Tj = 110 °C  
Tj = 125 °C  
Tj = 150 °C  
top  
10000 h  
7000  
4500  
3000  
General Conditions for operating range:  
1
Increasing or decreasing the supply voltages VVZ1, VVZ2, VVZ3, VVZ4, VEVZ, VEVZ2,VUBATT,  
VUBRL, VWDR, VVCC5 causes no incorrect firing of the squibs.  
2
Loosing the connection to pin WDR or one of the squib driver supply voltages  
VVZ1, VVZ2, VVZ3, or VVZ4, has no influence to the other squib driver function.  
During jump start and load dump conditions the IC must be able to fire the squibs  
Squib failures like shorts to ground or battery must not have an influence to other chip functions  
Maximum difference voltage of the squib connections: +/- (VZPx1 - VZPx2) = 40V  
3
4
5
Version B  
May 05, 2001  
page 31  
Datasheet  
TLE 6710  
I. AC/DC Characteristics  
AC/DC characteristics involve the spread of values guaranteed within the  
specified supply voltage range and ambient temperature range.  
Typical characteristics specify mean values expected over the production spread.  
Currents into pins have positive values and vice-versa.  
ATE tests will be performed with VEVZ=33V, VVZx=33V, unless otherwise specified under Test Condition.  
Supply currents:  
T = -40 to + 125°C, V  
=0 to 18V, V  
=0 to 18V  
j
UBATT  
UBRL  
V
=6 to 33V, V =15 to 33V, V  
=V  
V
=4.8 to 5.2V  
VZ1,2,3,4  
EVZ  
EVZ2 VZ1,2,3,4; VCC5  
Limit Values  
No.  
Parameter  
Symbol min. typ.  
max. Unit  
Test Condition  
3.1 Supply current on pin UBATT  
3.2 Quiescent current on pin VCC5 IVCC5  
3.3 Current on pin VCC5  
3.3A Current on pin VCC5  
3.4 Operating current on pin EVZ  
IUBATT  
1.5  
1
1
mA EVZ, VCC5 open  
mA Regulators inactive  
mA Regulators active,  
no diagnostic  
IVCC5  
IVCC5  
IEVZ  
2
6
mA Regulators active,  
diagnostic ON 1)  
mA drivers off  
30V regulator off,  
5V regulator off,  
no diagnostic,  
VEVZ2=open  
3.4A Operating current on pin EVZ  
IEVZ  
IEVZ  
6.5  
15  
mA drivers on, oscill. on  
30V regulator on,  
5V regulator on,  
no diagnostic,  
VEVZ2= VEVZ=30V 1)  
mA VEVZ2=30V, VEVZ=30V  
VUBATT=18V,  
3.5 Current on pin EVZ during  
squib leakage measurement  
VVCC5=4.8V,  
VTVZ=2.2V; oscill. on  
IRLM=1.5mA  
3.6 Current on pin EVZ2  
3.7 Current on pin EVZ2  
3.8 Current on pin EVZ2  
3.8A Current on pin EVZ2  
IEVZ2  
IEVZ2  
IEVZ2  
IEVZ2  
-3  
-0.8  
850  
500  
350  
mA VEVZ2=0V, VEVZ=30V  
drivers off  
µA  
µA  
µA  
VEVZ2=30V, VEVZ8V  
VVCC5=4.8V,drivers off  
VEVZ2=30V,VEVZ20V  
all drivers on  
VEVZ2=30V,VEVZ20V  
squib drivers OFF 1)  
drivers off,  
3.9 Quiescent currents on squib  
driver supply pins VZ2 to 4  
3.10 Quiescent current on squib  
driver supply pin VZ1  
IVZ2, IVZ3,  
IVZ4  
IVZ1  
0
0
20  
60  
µA  
µA  
µA  
V
measurement off  
driver off,  
measurement off  
pin voltage  
measurem. ON / OFF  
drivers off, squibs off,  
VEVZ=30V,  
3.10 Additional current on pins  
IVZ1  
A
EVZ2, VZx, UBATT, UBRL  
0
150  
0.9  
3.11 Voltage difference between pins VEVZ -  
EVZ and EVZ2  
VEVZ2  
0.3  
IEVZ2=-500µA  
1)  
Guaranteed by design  
Version B  
May 05, 2001  
page 32  
Datasheet  
TLE 6710  
AC/DC Characteristics (continued)  
Logic Inputs and Outputs:  
Inputs:  
HSEN_EN12, LSEN_EN34, TXD, AWLEN, MOSI, CL, SSQ, ZKEN, RTP, MODE  
RXD, AUSP, RESQ, MSS, ZKEN, LL, LH  
Outputs:  
T = -40 to + 125°C, V  
=4.8 to 5.2V, V =15 to 33V  
EVZ  
j
VCC5  
Limit Values  
No.  
Parameter  
Symbol min. typ.  
max. Unit  
Test Condition  
4.1 Input voltage - high level  
4.2 Input voltage - low level  
4.3 Input hysteresis  
VIH  
VIL  
VI  
2.4  
V
V
mV  
kΩ  
0.8  
200  
48  
20  
16  
4.4 Input pull-up resistance internal RIU  
VVCC5 = 5 V,  
VI = 0 V  
to VCC5 on pins:  
SSQ, TXD  
VMODE = 0 V (MODE0)  
LSEN_EN34  
4.4A Input pull-up resistance internal RIU_MOSI  
40  
16  
100 260  
48  
kΩ  
kΩ  
VVCC5 = 5 V,  
VI = 0 V  
to VCC5 on pin: MOSI  
4.5 Input pull-down resistor internal RID  
VI = 5 V  
to ground on pins:  
HSEN_EN12, AWLEN, RTP,  
MODE  
VMODE = 5 V (MODE1)  
LSEN_EN34  
4.6 Output voltage - low level  
VOL  
IOH  
0
0.4  
-50  
VVCC5 = 5 V,  
VEVZ = 8 V,  
IOUT = 1 mA  
VVCC5 = 5 V,  
VEVZ = 8 V,  
VOUT= 0 V  
VVCC5 = 5 V,  
VEVZ = 8 V,  
VOUT= 0 V  
4.7 Output current - high level;  
only pin ZKEN  
-220  
-440  
2.8  
µA  
µA  
V
4.7A Output current - high level;  
only pin RESQ  
IOH  
-100  
4.8 Output voltage - high level;  
except pins RESQ, ZKEN, LL,  
LH  
4.8A Output voltage - high level;  
only pins LL and LH  
4.11 Input voltage - high level for pin VIH  
AW1CT  
4.12 Input voltage - low level for pin  
AW1CT  
VOH  
VOH  
VVCC5  
VVCC5  
VVCC5 = 5 V,  
IOUT = -200 µA  
2.8  
4.2  
V
V
V
VVCC5 = 5 V,  
IOUT = -100 µA  
VIL  
0.8  
Version B  
May 05, 2001  
page 33  
Datasheet  
TLE 6710  
AC/DC Characteristics (continued)  
Low Battery Detection on pin UBATT (EVZ):  
T = -40 to + 125°C, V  
= 4,5 to 33 V  
j
EVZ  
Limit Values  
No.  
Parameter  
Symbol min. typ. max. Unit  
Test Condition  
5.1 Threshold voltage on pin  
UBATT reported to pin AUSP  
5.2 Hysteresis  
5.3 Threshold voltage on pin EVZ  
to start the boost converter  
V
4.10  
4.60  
V
V
VCC5  
decreases  
UBATT  
UBATT  
1)  
2)  
V
> 4.7 V  
V  
130  
250  
4.5  
mV  
V
UBATT  
V
V
V
increases  
4.6 V  
EVZ  
UBATT  
EVZ  
1) Output AUSP is low active and follows the input UBATT.  
The internal signal of AUSP enables the boost converter, so the regulator will not work,  
if VUBATT is less than the value of Spec 5.1.  
2) Not tested. Guaranteed by design. If VEVZ is less than the threshold value of Spec 5.3,  
the converters will stop to operate  
Oscillator for Boost (30V)-, Buck (5V)-Converter and Watchdog  
T = -40 to + 125°C, V  
= 8 to 33 V  
j
EVZ  
Limit Values  
No.  
Parameter  
Symbol min. typ. max. Unit  
Test Condition  
6.1 Frequency  
f
89  
1)  
103  
kHz VUBATT = 12 V; CCOS =  
OS  
1 nF; RROS = 4.99 kΩ  
6.2 Voltage on pin ROS  
6.2A Current on pin ROS  
6.3 Current on pin COS  
V
I
1.176 1.2 1.224  
V
µA  
µA  
R
R
R
V
= 5 kΩ  
= 5 kΩ  
= 5 kΩ  
0.5 V  
= 5 kΩ  
0.5 V  
= 5 kΩ  
1.9 V  
= 5 kΩ  
1.9 V  
= 1 nF,  
= 5 kΩ  
ROS  
ROS  
ROS  
ROS  
-240  
-140  
2)  
ROS  
COS  
I
I
I
I
COS  
6.3A Current ratio of pin COS to pin  
ROS  
/ I  
-7/12  
+840  
7/2  
R
COS ROS  
COS  
ROS  
V
COS  
6.4 Current on pin COS  
µA  
V
R
V
ROS  
COS  
6.4A Current ratio of pin COS to pin  
ROS  
/ I  
R
COS ROS  
ROS  
V
COS  
6.5 Difference of sawtooth  
thresholds (PSTV - VSTV)  
V  
1.2  
C
R
COS  
COS  
ROS  
Application information: Oscillator starts running at VEVZ 4.5 V  
1) Application Note: Formula for fos: fos = [1/(2 x CCOS x RROS) +/-5% ] + foffset  
foffset depends on the layout of the application board. Correlation between reference Board and the real application  
boards need to be performed with ‘golden devices TLE 6710’.  
Recommendation for RROS: 4.87kto 5.23knominal value+/- tolerance and +/- temperature depend.  
Formula for fos Reference Board measurement: fos = fRESQ x 12800  
2) IROS = VROS / RROS  
Version B  
May 05, 2001  
page 34  
Datasheet  
TLE 6710  
AC/DC Characteristics (continued)  
Boost Converter (30V):  
T = -40 to + 125°C, V  
= 4.75 to 20 V, V  
= 5 to 33 V  
j
UBATT  
EVZ  
Limit Values  
Symbol min. typ. max. Unit  
No.  
Parameter  
Test Condition  
VUBATT = 6 V;  
7.1 Switching current limiting  
7.2 Switching saturation voltage  
I
650  
950  
mA  
SVZ  
VTVZ = 0 V;  
VSVCC5 open;  
VVCC5 open;  
V
1
V
I
= 450 mA;  
SVZ  
SVZ  
V
V
= 6 V;  
UBATT  
= 0 V; V  
18 V  
18 V  
TVZ  
EVZ  
VSVCC5 open;  
V
I
open  
VCC5  
7.2A Switching on resistance  
7.3 Max. switch duty cycle  
Ron  
2.2  
90  
= 450 mA;  
SVZ-GNDC  
SVZ  
V
V
= 6 V;  
UBATT  
= 0 V; V  
TVZ  
EVZ  
VSVCC5 open;  
open  
V
VCC5  
D
85  
%
I
10 mA;  
SVZ  
30max  
V
EVZ  
18 V;  
7.4 Min. switch duty cycle  
D
t
0
%
30min  
7.5 Switch on time via pin COS  
0.2  
0.8  
µs  
I
= 300 mA;  
SVZ  
on30  
V
V
V
= 6 V;  
UBATT  
= 0 V; V  
18 V  
TVZ  
EVZ  
= 2.0 to 0.5V;  
COS  
sample: 0.1xV  
SVZmax  
7.6 Switch on slope via pin COS  
7.7 Switch off time via pin COS  
s
-250  
0.3  
-50 V/µs see: 7.5  
sample: 0.1xV  
and 0.9xV  
1)  
on30  
SVZmax  
SVZmax  
t
1.5  
µs  
I
= 300 mA;  
SVZ  
off30  
V
V
V
= 6 V;  
UBATT  
= 0 V; V  
18 V  
TVZ  
EVZ  
= 0.5 to 2.0V;  
COS  
sample: 0.9xV  
SVZmax  
7.8 Switch off slope via pin COS  
1) Not tested. Guaranteed by design.  
s
100  
280 V/µs see: 7.7  
sample: 0.1xV  
and 0.9xV  
1)  
off30  
SVZmax  
SVZmax  
Version B  
May 05, 2001  
page 35  
Datasheet  
TLE 6710  
AC/DC Characteristics (continued)  
Boost Converter (30V): (continued)  
T = -40 to + 125°C, V  
UBATT  
= 5.25 to 18 V, V  
EVZ  
= 5 to 33 V  
j
Limit Values  
No.  
Parameter  
Symbol min. typ. max. Unit  
Test Condition  
= 6 V;  
7.9 Overcurrent switch off time  
t
0.08  
0.5  
µs  
V
V
UBATT  
= 0 V; V  
offCL30  
18 V  
EVZ  
TVZ  
R
= 1 ; V  
= 12V;  
load  
load  
sample: 0.9xV  
SVZmax  
7.10 Overvoltage on pin EVZ for  
switch off the regulator  
Error Amplifier  
V
33.5  
39.5  
V
EVZ  
1)  
1)  
1)  
1)  
7.11 Input offset voltage  
-40  
34  
40  
70  
2
mV  
dB  
V  
EAVZ  
7.12 DC open loop gain  
7.12A Unity-Gain bandwidth  
7.12B Gain at f = 100 kHz  
A
OLVZ  
f
1.3  
18  
MHz  
dB  
U
A
100  
Reference  
1), 2)  
1), 2), 3)  
=33.5 to 40V  
7.13 Reference voltage  
V
V
2.75 2.8 2.85  
2.52 2.8 3.08  
V
V
VR  
VR  
7.14 Reference voltage  
V
V
EVZ  
7.15 Leakage current on pin TVZ  
I
-2  
1.5  
=2.52 to 3.08V  
µA  
TVZ  
TVZ  
SVZ Output  
7.16  
7.17  
V
2.65 2.8  
V
V
Switch on threshold via TVZ  
Switch off threshold via TVZ  
TVZ  
TVZ  
6)  
V
2.8 2.95  
Application characteristics (see: Application Circuit)  
7.A Output voltage range  
V
16  
30  
V
V
V
= 2.8 V  
EVZ  
TVZ  
(adjusted by an external  
divider)  
7.B Output voltage accuracy for  
5)  
a
0.95x  
1.05x  
regulator on at:  
VTVZ = 2.65 V;  
regulator off at:  
VTVZ = 2.95 V  
EVZ  
one determined V  
EVZ  
TVZ-divider resistors.  
via  
V
EVZ  
V
EVZ  
7.C Output power  
P
0.6  
W
V
= 5.5 V;  
EVZ  
VCC5  
SVCC5 open  
1)  
Error Amplifier characteristics of the packaged device cannot be measured, but are guaranteed by design. The reference voltage is measured  
only on wafer.  
2)  
3)  
5)  
6)  
Reference is supplied only via pin EVZ.  
No uncontrolled reset on pin RESQ is allowed, due to higher supply voltage V  
Accuracy of the external resistive TVZ-divider from EVZ to GNDB: 0%  
.
EVZ  
If the voltage on pin TVZ reaches 33V for a max. duration of 10 sec and returns to 2.8V (typ. value), the regulator must operate as specified.  
Version B  
May 05, 2001  
page 36  
Datasheet  
TLE 6710  
AC/DC Characteristics (continued)  
Buck Converter (5V):  
T = -40 to + 125°C, V  
= 8 to 33 V, V  
UBATT  
= 5.25 to 18 V  
j
EVZ  
Limit Values  
No.  
Parameter  
Symbol min. typ. max. Unit  
I -600 -250 mA  
SVCC5  
Test Condition  
8.1 Output current limit  
8.2 Switch saturation voltage  
V
-
3.9  
3.5  
1.5  
V
V
V
V
V
I
= 18 V V  
;
EVZ  
EVZ2  
EVZ  
V
= 3 V;  
TVZ  
SVCC5  
=-300mA; 47to Gnd  
SVCC5  
SVZ open, VCC5<4.6 V  
8.3 Switch saturation voltage  
8.3A Switch saturation voltage  
V
V
-
V
V
I
= 8.5 V V  
;
EVZ  
EVZ2  
EVZ  
= 3 V;  
TVZ  
SVCC5  
= -30 mA;  
SVCC5  
SVZ open; VCC5<4.6 V  
V
V
-
V
V
V
I
= 18 V;  
= 26 V;  
EVZ  
EVZ  
EVZ2  
SVCC5  
= 3 V;  
TVZ  
=-300mA;  
SVCC5  
SVZ open, VCC5<4.6 V  
= -300 mA;  
8.4 Switch on time via pin COS t  
0.2  
0.8  
µs  
I
SVCC5  
on5  
V
TVZ  
= 3 V;  
V
V
18 V;  
EVZ  
= 0.5 to 2.0V;  
COS  
sample: 0.5xV  
SWITCHmax  
8.5 Switch on slope via pin  
COS  
s
40  
100 V/µs see: 8.4  
1)  
on5  
sample: 0.75xV  
SWITCHmax  
SWITCHmax  
and 0.5xV  
8.6 Switch off time via pin  
KOM1  
t
0.8  
2.5  
µs  
I
= -300 mA;  
SVCC5  
off5  
V
= 3 V;  
TVZ  
V
V
18 V; V = 4.7V  
VCC5  
EVZ  
= 0 to 3V;  
KOM1  
sample: 0.5xV  
SWITCHmax  
8.7 Switch off slope via pin  
KOM1  
s
-700  
-100 V/µs see: 8.6  
sample: 0.75xV  
1)  
off5  
SWITCHmax  
and 0.5xV  
SWITCHmax  
1) Not tested. Guaranteed by design.  
Version B  
May 05, 2001  
page 37  
Datasheet  
TLE 6710  
AC/DC Characteristics (continued)  
Buck Converter (5V): (continued)  
T = -40 to + 125°C, V  
EVZ  
= 8 to 33 V  
j
Limit Values  
No.  
Parameter  
Symbol min. typ. max. Unit  
Test Condition  
8.8 Overcurrent switch off time t  
0.05  
0.8  
µs  
V
V
V
= 0V;  
= 3V;  
18 V;  
= 47;  
VCC5  
offCL5  
TVZ  
EVZ  
R
load  
sample: 0.5xV  
SWITCHmax  
8.9 Switch on time via pin TVZ  
t
10  
0.2  
0.2  
150  
1
µs  
µs  
µs  
I
= -300 mA;  
SVCC5  
onVZ5  
V
V
18 V;  
EVZ  
TVZ  
= 0 to 5 V;  
sample: 0.5xV  
SWITCHmax  
8.10 Switch off time via pin TVZ t  
I
V
V
= -300 mA;  
SVCC5  
EVZ  
TVZ  
offVZ5  
18 V;  
= 5 to 0 V;  
sample: 0.5xV  
SWITCHmax  
= -300 mA;  
18 V;  
8.10A Switch off time due to an  
overvoltage on pin VCC5  
t
1.5  
I
V
V
SVCC5  
EVZ  
TVZ  
offVCC5  
= 3V; V  
= 4.8V to 6.1V;  
= 0V;  
KOM1  
V
VCC5  
sample: 0.5xV  
V
SWITCHmax  
2 V;  
1)  
8.10B Overvoltage switch off  
threshold on pin VCC5  
8.11 Switch on threshold  
voltage via pin TVZ  
V
V
V
5.3  
6.1  
V
V
V
KOM2  
offVCC5  
2)  
1.51 1.70 1.85  
0.1 0.2 0.3  
(54..66%)  
(4..11%)  
TVZ  
8.12 Switch off threshold  
TVZ  
voltage via pin TVZ  
Error Amplifier  
8.13 Input offset voltage  
8.14 DC open loop gain  
8.15 Unity-Gain bandwidth  
8.16 Gain at f = 100 kHz  
8.17 Output voltage LOW on  
pin KOM2  
1)  
V  
-10  
60  
2
+10  
0.4  
mV  
dB  
MHz  
dB  
EAVCC  
1)  
1)  
1)  
A
OLVCC  
f
U
A
26  
100  
V
V
I
= 20 µA;  
KOM2  
KOM2  
V
I
= 3V  
KOM1  
8.18 Output voltage HIGH on  
pin KOM2  
V
2.5  
V
= -500 µA;  
= 0V  
KOM2  
KOM2  
V
KOM1  
Reference see No. 7.13: Reference of the 30 V Step-up Regulator  
SVCC5 Output  
8.19 Switch on threshold via pin V  
4.85 5.0  
5.0 5.15  
V
V
I
I
= 30mA  
= 30mA  
VCC5  
SVCC5  
VCC5  
8.20 Switch off threshold via pin V  
VCC5  
SVCC5  
VCC5  
1)  
2)  
Not tested. Guaranteed by design.  
The switching of the output transistor will ´be delayed by 10 to 150 us after reaching the threshold voltage.  
Version B  
May 05, 2001  
page 38  
Datasheet  
TLE 6710  
AC/DC Characteristics (continued)  
Buck Converter (5V): (continued)  
T = -40 to + 125°C, V  
= 8 to 33 V  
Application characteristics (see: Application Circuit)  
j
EVZ  
8.A Output voltage  
V
4.85  
5.15  
V
I
= 30mA  
VCC5 L  
VCC5  
T = 25°C  
V
I
V
I
a
EVZ  
= 30 V  
8.B Output voltage  
8.C Output voltage  
8.D Output power  
V
V
P
4.8  
4.8  
5.2  
5.2  
0.3  
V
V
= 10 to 60 mA  
18 V  
= 10 to 33 mA  
8.5 V  
VCC5  
VCC5  
VCC5L  
VCC5L  
EVZ  
VCC5L  
EVZ  
V
W
I
....... is the symbol for the output current of the buck converter output.  
VCC5L  
P is the symbol for the output power of the buck converter output.  
VCC5L  
.......  
Power On Reset of VCC5 & EVZ and Watchdog:  
T = -40 to + 125°C, V  
EVZ  
= 8 to 33 V  
j
Limit Values  
Symbol min. typ. max. Unit  
No.  
Parameter  
Test Condition  
V = 8 to 40 V  
EVZ  
9.1 Power-on reset, RESQ = H  
9.2 Power-down reset, RESQ = L  
V
V
4.75  
2.0  
7
V
V
V
VCC5  
VCC5  
EVZ  
4.50  
8.5  
9.2A Power-down reset threshold level V  
for RESQ high to low transition  
VEVZ decreasing;  
VVCC5 > 4.75V  
9.3 Power down reset delay time  
t
10  
150  
128  
µs  
V
decreases to  
VCC5  
4 V  
rdel  
9.4 Watchdog period (determined  
by oscillator frequency divider)  
9.5 Start of reset (after watchdog  
time-out)  
9.6 Reset duration (after watchdog  
time-out)  
T
t
128  
100 V  
fOS  
4.7 V  
VCC5  
VCC5  
VCC5  
WD  
64  
64  
64  
64  
100 V  
fOS  
4.7 V  
4.7 V  
sr  
t
t
100 V  
fOS  
rd  
9.7 Trigger window duration  
1
32  
32  
32  
65  
100 V  
fOS  
100 V  
fOS  
100 V  
fOS  
100 V  
fOS  
4.7 V  
4.7 V  
4.7 V  
4.7 V  
VCC5  
VCC5  
VCC5  
VCC5  
twd  
9.7A Trigger window duration without t  
32  
32  
64  
twdmax  
ts  
SPI triggering  
9.8 Start of trigger window  
t
t
9.9 Power-up reset extension  
pu  
Note: Reset threshold voltage is derivated from the reference for VCC5, so there is a linear function of the  
absolute value of VCC5. Power down reset: A hysteresis is included by design, but will not be tested.  
Logic functions and diagrams as defined in circuit description of chapter 'Watchdog'.  
If the pin RTP is 'High' and pin AW1CT is grounded (test mode B), the units for tests No. 9.4 to 9.9  
are 4/fos instead of 100/fos.  
Version B  
May 05, 2001  
page 39  
Datasheet  
TLE 6710  
AC/DC Characteristics (continued)  
ISO 9141 - Serial Interface:  
T = -40 to + 125°C, V  
UBATT  
= 8 to 18 V, V  
EVZ  
= 8 to 33 V, V 4.55V  
VCC5  
j
Limit Values  
No.  
Parameter  
Symbol  
min.  
typ. max. Unit  
Test Condition  
10.1 Output voltage on pin K  
10.2 Output voltage on pin K  
10.3 L pin input threshold low  
V
V
V
1.4  
1
V
V
V
I = 30 mA  
K
K
L
K
I = 30 mA at 25°C  
K
0.13x  
V =0V, V  
K
LVCC=open  
LVCC=open  
LVCC=open  
V
UBATT  
10.4 L pin input threshold high  
10.5 L pin hysteresis  
10.6 L pin input threshold (logic  
level) 'low level'  
V
0.19x  
UBATT  
V
V =0V, V  
K
L
V
1)  
V  
V
L
30  
150  
2
mV V =0V, V  
K
V
L
V =0V, V  
=V  
K
LVCC VCC5  
10.7 L pin input threshold (logic  
level) 'high level'  
V
L
3
V
V =0V, V  
K
V
LVCC= VCC5  
10.8 K pin input treshold low  
(to pin RXD)  
10.9 K pin input treshold high  
(to pin RXD)  
V
0.35x  
UBATT  
V
L = open  
L = open  
K
V
V
I
0.70x  
UBATT  
V
K
V
10.10 K pin input current  
-12  
12  
µA  
V
=0V;  
UBATT  
K
V =18V;  
K
V
=0V; V  
=0V  
=0V  
2V  
EVZ  
V =18V;  
VCC5  
VCC5  
VCC5  
10.10.A K pin input current  
10.10.B K pin input current  
10.11 K pin input current  
10.12 K pin input current  
10.12.A K pin input current  
I
I
I
I
I
-12  
-12  
-12  
-12  
-12  
12  
12  
12  
12  
12  
µA  
µA  
µA  
µA  
µA  
K
K
V
=0V; V  
EVZ  
V =18V;  
K
K
K
K
K
V
V
=0V; V  
=18V; V =0V;  
TXD  
UBATT  
K
VTXD=VVCC5 or open  
V = V  
UBATT  
- 1V;  
K
VTXD=VVCC5 or open  
= 0V or open;  
V
VCC5  
V =18V  
K
1)  
2)  
10.12.B K pin input peak current  
I
1
mA dV / dt 10 V/µs;  
K
K
VTXD=VVCC5 or open  
10.13 L pin input current  
10.14 Short-circuit current  
I
I
t
t
t
t
t
t
0
35  
1
0.5  
0.2  
0.1  
0.2  
0.1  
60  
100  
4
3
2
1
2
2
µA  
V = 6 V; V =0V or open  
L
K
Kr  
Kf  
RXDr  
RXDf  
K_RXDr  
K_RXDf  
L
K
mA max. 5 ms  
10.15 Rise time delay TXD to K  
10.16 Fall time delay TXD to K  
10.17 Rise time delay L to RXD  
10.18 Fall time delay L to RXD  
10.19 Rise time delay K to RXD  
10..20 Fall time delay K to RXD  
µs  
µs  
µs  
µs  
µs  
µs  
Sample point: 0.5 x V  
Sample point: 0.5 x V  
Sample point: 0.5 x V  
Sample point: 0.5 x V  
Sample point: 0.5 x V  
Sample point: 0.5 x V  
Kmax  
2)  
Kmax  
RXD  
RXD  
3)  
3)  
RXD  
RXD  
1) Not tested. Guaranteed by design.  
)
2
With 500 R external pull-up to battery and 10 nF to GND for test purposes only.  
3) Not tested. Guaranteed by design. Pin L is not connected.  
If the pin K operates within the maximum ratings (-1V to +40V), all other circuit blocks must work as defined  
by the specification. This function is not tested, but it is guaranteed by design.  
The allowed current into pin L is -0.3 to 2.0 mA. At IL = 1mA the voltage VL 7.0V  
Version B  
May 05, 2001  
page 40  
Datasheet  
TLE 6710  
AC/DC Characteristics (continued)  
Alarm Warning Lamp Driver (AWL1):  
T = -40 to + 125°C, V  
EVZ  
= 8 to 33 V  
j
Limit Values  
Symbol min. typ. max Unit  
No.  
Parameter  
Test Condition  
11.1 Output voltage  
V
2
3.2  
V
IAWL1 = 300mA 1)  
EVZ  
AWL1  
V
= 0 V  
11.2 Output voltage  
11.3 AWL1 leakage current  
V
I
0.6  
150  
V
µA  
IAWL1 = 300mA 1), 4)  
= 17.5 V, off;  
AWL1 measurement on  
V = 17.5 V, off;  
AWL1  
AWL1  
0
0
V
AWL1  
AWL1  
AWL1  
11.4 AWL1 leakage current  
I
50  
µA  
AWL1 measurement off  
11.4 AWL1 reverse voltage  
A
11.5 Output current limit static  
11.6 Temperature limitation  
(current will be reduced)  
11.7 Temperature limitation  
11.8 AWL1 Voltage to UZP output  
voltage ratio  
V
-0.2  
650  
V
IAWL1 = -100 µA  
AWL1  
VGNDA1 = 0 V  
I
T
400  
mA  
°C  
V
= 4 V  
AWL1  
AWL1  
AWL1  
150 170  
AWL1 switch is on;  
V
V
> 2 V  
> 2 V  
2)  
2)  
AWL1  
T
130  
-5%  
°C  
AWL1  
AWL1  
V
V
5
+5% V/V selection via SPI: UAWL1  
AWL1  
UZP  
/
VAWL1VEVZ-6V  
11.9 Current threshold for open load  
detection  
I
10  
0
35  
mA selection via SPI:  
AWL1  
IAWL1  
detection on pin UZP  
11.10 Voltage on pin UZP for open  
load  
V
0.4  
V
V
selection via SPI for  
lamp on and current  
measurement  
UZP  
I
< 10 mA  
AAWL1  
11.11 Voltage on pin UZP for  
standard load  
V
1.5  
-20  
VVCC5  
selection via SPI for  
lamp on and current  
measurement  
UZP  
I
> 30 mA  
AWL1  
11.12 Current on pin AW1CT  
IAW1CT  
0
µA  
VAW1CT=0V and 5V,  
VAWL1=12V 3)  
1) If V  
25 V, the warning lamp driver can not be switched on. This feature prevents a reduction of warning lamp lifetime.  
AAWL  
2) Limit values are guaranteed by design. The logic function is tested only on wafer.  
In case of a short circuit from an external voltage source (=12V) to pin AWL1 and voltage on pin UBATT is 0V, the chip will be  
warmed up to a temperature limitation value of approximately 150 °C. Proposal: Continuous operation with temperature limitation is not  
recommended.  
If a start up of the voltage on pin UBATT (4.5 to 18V) occurs immediately, following functions have to operate:  
a. Bandgap-Reference, Oscillator, Boost- and Buck-Converter;  
b. Generation of signal RESQ to 'high';  
c. SPI command transfer for  
1. trigger;  
2. measurement of chip temperature  
4. switch OFF lamp 1  
3. measurement of AWL1 voltage;  
3) Pin AW1CT could be connected to VCC5 or be open for default ON operation. For default OFF operation pin AW1CT has to be shorted;  
the maximum value of the external short circuit resistor to ground is 10k.  
No active clamping circuitry is included in the device.  
During start up the AWL1 lamp driver is ON if AW1CT is left open. It can be switched off if all three conditions are applied:  
1. RESQ = 'HIGH'; 2. AWLEN = 'HIGH'; 3. SPI: SAWL1D  
During start up the AWL1 lamp driver is OFF if AW1CT is connected to ground. It can be switched on if all following conditions  
occur: 1. RESQ = 'HIGH'; 2. AWLEN = 'HIGH'; 3. SPI: SAWL1D  
AWL1 lamp driver can be switched on/off by the SPI-command SAWL1B/SAWL1D (lamp 'bright' /'dark' ) according to the  
state of AW1CT.  
4) At the maximum voltage of 0.6V and a current of 300mA the maximum ON-resistance is Rds(on)max = 2.  
Version B  
May 05, 2001  
page 41  
Datasheet  
TLE 6710  
AC/DC Characteristics (continued)  
Alarm Warning Lamp and Multifunction Driver 2 (AWL2):  
T = -40 to + 125°C, V  
EVZ  
= 8 to 33 V  
j
Limit Values  
No.  
12.1 Output Voltage  
(used as low side switch)  
12.2 Drain Source  
Saturation Voltage  
Parameter  
Symbol min. typ. max Unit  
Test Condition  
VAWL2S = 0 V 2)  
IAWL2 = 200mA  
V
0.6  
1.0  
V
AWL2D  
V
V
VEVZ > VAWL2D + 6 V  
IAWL2 = 200mA  
DS  
(used as high side switch)  
VDS = VAWL2D - VAWL2S  
12.3 AWL2 leakage current  
I
0
0
20  
VAWL2 = 17.5 V  
lamp off,  
µA  
µA  
AWL2  
AWL2  
AWL2 measurement off  
12.4 AWL2 leakage current  
I
150  
VAWL2D = 17.5 V  
VAWL2S = 0 V  
lamp off,  
AWL2 measurement on  
12.4 AWL2 reverse voltage  
A
V
I
-0.2  
V
IAWL2D = -100 µA  
AWL2  
VAWL2S = 0 V  
12.5 Output current limit static  
250 400 600  
mA  
°C  
VDS 3V  
AWL2  
12.6 Over-Temperature shut down  
T
150  
190  
AWL2 power-switch  
AWL2  
turns off;  
SPI: MTEMP (9XXX)H  
T = 25°C 1)  
1)  
12.7 Voltage on pin UZP after over-  
temperature shut down  
V
1.45  
5
V
UZP  
12.8  
V
V
-5%  
-5%  
+5% V/V selection via SPI:  
UAWL2D  
AWL2D Voltage to UZP output  
voltage ratio  
AWL2D  
/
/
UZP  
VAWL2DVEVZ-6V  
12.9  
V
V
5
+5% V/V selection via SPI:  
UAWL2S  
AWL2S Voltage to UZP output  
voltage ratio  
AWL2S  
UZP  
VAWL2SVEVZ-6V  
1) Limit values are guaranteed by design. Logic function is tested only on wafer.  
Activating 'Average Chip Temperature' measurement, the typical temperature coefficient of the  
voltage on pin UZP after over temperature shut down is -4mV/K  
No active clamping circuitry is included in the device.  
If the AWL2 lamp driver is used as a high side switch to drive an inductive load, an external  
free-wheeling diode in parallel with the load must be used.  
AWL2 lamp driver only can be switched on by the SPI-command SAWL2B (lamp 'bright' or on)  
AWL2 lamp driver only can be switched off by the SPI-command SAWL2D (lamp 'dark' or off)  
2) At the maximum voltage of 0.6V and a current of 200mA the maximum ON-resistance is:  
Rds(on)max = 3.  
Version B  
May 05, 2001  
page 42  
Datasheet  
TLE 6710  
AC/DC Characteristics (continued)  
Voltage-/ Current-Sources (V/I):  
T = -40 to + 125°C, V  
= 4.8 to 5.2 V, V = 18 to 33 V; x=1,2,3,4  
j
VCC5  
EVZ  
Limit Values  
No.  
Parameter  
Symbol min.  
typ.  
max. Unit  
Test Condition  
13.1 Operating current on pin IASGx I  
-20  
-80  
-1  
-25  
mA  
mA  
t
t
V
t
V
R
I
5 ms  
IASGx  
on  
on  
13.2 Current limitation on pin IASGx  
13.2A Current limitation on pin IASGx  
I
I
5 ms, VISENS = 0V,  
IASGx  
= 0V  
IASGx  
-32  
-24  
mA  
V
5 ms, RISENS=2kΩ  
IASGx  
on  
= 0V  
IASGx  
13.3 Output voltage 1 on pin IASGx  
V
-7%  
-5%  
2.8  
2.2  
10  
+3%  
100kΩ  
IASGx  
IASGx  
= -1 to -20 mA  
= -0.5 mA  
IASGx  
I
IASGx  
2)  
SPI: (2XXX)H  
R
I
I
13.4 Difference of output voltage 2  
(5V) and output voltage 1  
(2.8V) on pin IASGx  
V  
+5%  
V
100kΩ  
IASGx  
IASGx  
= -1 to -20 mA  
= -0.5 mA  
IASGx  
IASGx  
2)  
SPI: (BXXX)H  
13.6 Current ratio accuracy  
IISENS / IIASG  
I
I
-5%  
0%  
7%  
15%  
I
= -1 mA to -20mA  
= -0.5 mA to -1mA  
1), 2)  
IASG  
IASGx/  
ISENS  
I
IASG  
13.7 Voltage on pin ISENS  
for IASG-current limit  
13.8 Voltage on pin ISENS  
V
V
I
Vvcc5  
Vvcc5  
+0.6  
Vvcc5  
+0.8  
2
V
V
R
V
20 k,  
= 0V  
ISENS  
ISENS  
IASGx  
R
V
ISENS  
ISENS open,  
=0V  
IASGx  
2)  
13.9 ISENS offset current  
13.9A ISENS offset current  
13.9B ISENS offset current  
-2  
-2  
-2  
µA VISENS=0V,  
ISENS  
ISENS  
ISENS  
measurement inactive  
2)  
I
I
2
2
µA VISENS=VVCC5 - 0.3V,  
measurement inactive  
µA pin IASGx open,  
VISENS=0V,  
2)  
measurement active  
SPI: SELx  
VISENS=0.4V to Vvcc5- 0.3V  
13.10 Voltage ratio VUZP / VISENS  
VUZP /  
VISENS  
-5%  
1.0  
+5%  
50  
13.11 Settling time on pin UZP for  
one measurement  
tUZP  
µs Starting with SPI  
command, ending at  
90% of the final value  
on pin UZP  
13.12 IASGx leakage current  
I
-2  
2
µA  
V
IASGx  
IASGx=0V and 5V; 2)  
measurement inactive  
I
1) Current ratio accuracy calculation:  
Current ratio calculation:  
a
ISENS = (10× ISENS 1)×100%  
I
IASGx  
I
IASGx  
1000  
=
I
ISENS  
100+ aISENS  
2) After characterization guaranteed by design.  
If the pin IASGx is open or shorted to ground, no latch-up or oscillation may occur (RISENS 20k).  
Version B  
May 05, 2001  
page 43  
Datasheet  
TLE 6710  
AC/DC Characteristics (continued)  
Squib Driver: Highside:A)  
T = -40 to + 150°C, V  
=6 to 33V, V  
=8.5 to 33V, VEVZ2 VVZx + 6V V  
=4.8 to 5.2V  
j
VZ1,2,3,4  
EVZ  
,
VCC5  
Limit Values  
No.  
Parameter  
Symbol  
min. typ. max.  
Unit  
Test Condition  
14.1 Saturation voltage of switch  
x=1,2,3,4  
VVZx-ZPx1  
1.75 2.0  
V
VEVZ = VEVZ2 = 21V, 1)  
VVZx=12V, -IZPx1=1.75A  
14.2 Output current limitation of  
switch x=1,2,3,4  
IZPx1  
-3.5  
24  
-2.25  
27  
A
V
VEVZ = VEVZ2 = 21V,  
VVZx - ZPx1 4V  
IZPx1= value of Spec.  
15.3 and 15.4  
14.2 Clamping voltage on pin Zpx1  
VZPx1  
A
during firing (x=1,2,3,4)  
2)  
14.3 Switch off time delay of switch  
x=1,2,3,4  
14.4 Switch on time delay of switch  
x=1,2,3,4  
toff  
ton  
0.1  
1
5
µsec Rload= 2.2Ω  
20  
µsec VEVZ = VEVZ2 = 33V,  
RZPx1 to +18V = 2.2,  
VVZx = 33V (I=0.23A)  
Trigger VZPx1=18.5V  
µsec VEVZ = VEVZ2 = 33V,  
RZPx1 to +18V = 2.2,  
VVZx = 33V (I=2A)  
14.5 Switch on time delay of switch  
x=1,2,3,4  
ton  
T
1
35  
Trigger VZPx1=22.4V  
14.6 Over temperature limitation  
A)  
180  
300  
°C  
not tested  
2)  
The limits are valid for a switch on duration of 4ms and a firing on- / off- timing characteristics  
as descript in chapter 'Absolute Maximum Ratings'.  
From one squib output ZPx1 a short to ground or a connection to the automotive  
supply voltage VBAT has no influence to other squib drivers, and vice versa.  
The maximum saturation voltage VVZx - VZPx1 = 2.6 V is guaranteed by design.  
The test conditions are VEVZ = VEVZ2 = 15 V, VVZx = 12V, -IZPx1 = 1.75 A  
1)  
2)  
Guaranteed by design  
Squib Driver: Lowside:A)  
T = -40 to + 150°C, V  
=6 to 33V, V  
=8.5 to 33V, VEVZ2 VVZx + 6V V  
=4.8 to 5.2V  
j
VZ1,2,3,4  
EVZ  
,
VCC5  
Limit Values  
No.  
Parameter  
Symbol  
min. typ. max.  
Unit  
Test Condition  
15.1 Saturation voltage of switch  
x=1,2,3,4  
VZPx2  
1.65 1.85  
V
VEVZ = VEVZ2 = 21V,  
IZPx2 = 1.75A  
2)  
15.2 Driver current detection of  
switch x (x=1 to LL, x=2 to LH)  
15.3 Output current limitation of  
switch x=1,2  
15.4 Output current limitation of  
switch x= 3,4  
IZPx2det  
IZPx2lim  
IZPx2lim  
1.75 2.0 2.25  
A
A
A
VZPx2 4V  
3)  
IZPx2det  
+0.25  
IZPx2de  
+0.75  
VZPx2 4V  
IZPx2det  
+0.25  
IZPx2de  
+0.75  
VZPx2 4V  
A)  
The limits are valid for a switch on duration of 4ms and a firing on- / off- timing characteristics as descript in  
chapter 'Absolute Maximum Ratings'. From one squib output ZPx1 a short to ground or a connection to the  
automotive supply voltage VBAT has no influence to other squib drivers, and vice versa.  
The hysteresis of the driver current detection is typically 50 mA.  
2)  
3)  
The value of the current limitation is always greater than the value of the current detection.  
Version B  
May 05, 2001  
page 44  
Datasheet  
TLE 6710  
AC/DC Characteristics (continued)  
Squib Driver: Lowside (continued):  
T = -40 to + 150°C, V  
=6 to 33V, V =8.5 to 33V V =4.8 to 5.2V  
, VCC5  
j
VZ1,2,3,4  
EVZ  
Limit Values  
min. typ. max.  
No.  
15.4 Switch off time delay of switch  
x=1,2,3,4  
Parameter  
Symbol  
Unit  
Test Condition  
toff  
0.1  
5
µsec Rload= 2.2Ω  
A
15.5 Switch on time delay of switch  
x=1,2,3,4  
ton  
3
20  
µsec Rload = 2.2,  
Vload = 12V (I=0.23A)  
Trigger VZPx2=11.5V  
µsec Rload= 2.2,  
15.6 Switch on time delay of switch  
x=1,2,3,4  
ton  
T
5
35  
Vload= 12V (I=2A)  
Trigger VZPx2=7.6V  
15.7 Over temperature limitation  
180  
300  
°C  
not tested, guaranteed by  
design  
Outputs LL and LH for Firing  
Current Detection:  
15.8 Voltage on pin LL  
15.9 Voltage on pin LH  
15.10 Response time to LL or LH if  
the squib current will be  
interrupted  
VLL  
VLH  
tLL, tLH  
0.8  
0.8  
3
V
V
IZP12>1.75A  
IZP22>1.75A  
1
1/fOS IZP12>1.75A to pin LL  
IZP22>1.75A to pin LH  
fOS = frequency of the  
oscillator  
15.11 Delay time to LL or LH if the  
firing current exceeds the value  
of Spec.No. 15.2  
tLLon, tLHoff  
10  
40  
µs  
Rsquib = 2.2Ω  
Vload = 8V  
to = signal SSQ from  
low to high  
Note: The timing measurements of No. 14.3, 14.4, 14.5, 15.4A, 15.5 and 15.6 will be started either with the rising edge  
of SSQ or a transition of HSEN_EN12 / LSEN_EN34 and stopped by the voltage transition (50%) on ZPx1 or ZPx2.  
Squib Driver: Highside and Lowside:  
T = -40 to + 150°C, V  
=6 to 33V, V  
=8.5 to 33V V =4.8 to 5.2V  
, VCC5  
j
VZ1,2,3,4  
EVZ  
Limit Values  
min. typ. max.  
3.0  
No.  
Parameter  
Symbol  
Unit  
Test Condition  
15.13 Total sum of saturation  
voltages of high and lowside  
switches x=1,2,3,4  
VVZx -VZPx1 +  
VZPx2  
V
see test conditions  
for specification 14.1  
and 15.1  
IZPx = 1.75A 2)  
of No.: 14.1 and 15.1  
15.14 Total absorbed energy of one  
high side switch  
WHS  
WLS  
120  
140  
mJ  
mJ  
starting  
temperature: 85°C  
Squib firing on / off  
timing see: Max. Rat.  
and No. 1.31 1)  
starting  
temperature: 85°C  
15.15 Total absorbed energy of one  
low side switch  
Squib firing on / off  
timing see: Max. Rat.  
and No. 1.31 1)  
1)  
2)  
WHS = IZPx1 x (VVZx - VZPx1) x ton  
On-Resistance of high and low side switches together:  
WLS = IZPx2 x VZPx2 x ton  
Ron [T=Tabs] = 1.71x {1 - 3.65 E-3 x (150°C - Tabs)}  
Tabs ... temperature in °C  
ATE-testing for 14.1, 15.1 and 15.13 will be performed at maximum 125°C, however with guard bands.  
Version B  
May 05, 2001  
page 45  
Datasheet  
TLE 6710  
AC/DC Characteristics (continued)  
Squib Resistance Measurement:  
T = -40 to + 125°C, V  
=15 to 33V, V =4.8 to 5.2V  
j
EVZ  
VCC5  
Limit Values  
min. typ. max. Unit  
No.  
Parameter  
Symbol  
Test Condition  
Basic reference current:  
16.1 Basic current on pin IMESS  
5)  
IMESS  
-6.2  
-4.8  
mA SPI: (4XXX)H  
RROS=5.0kΩ ± 0.1%  
Measurement current  
reference input WDR:  
16.2 Operating voltage range on pin VZPx1  
0
VEVZ-  
6
V
IWDR = 55mA  
SPI: (6XXX)H  
Zpx1, if the switch between pin  
WDR and pin Zpx1 is closed  
3)  
16.3 On resistance between pin  
RWDR-ZPx1  
8
30  
40  
IWDR = 40mA  
SPI: (6XXX)H  
IWDR = 5mA  
VEVZ = 30V,  
VZPx1 = 25V,  
SPI: (6XXX)H  
WDR and pin ZPx1  
3)  
16.3A On resistance between pin  
WDR and pin ZPx1  
RWDR-ZPx1  
10  
16.4 Current on pin WDR  
IWDR  
IWDR  
60.0  
200  
mA squib resistance <3Ω  
16.4A Short circuit current on pin  
60  
mA VWDR = VEVZ = 30V,  
WDR  
VZPx1 = 0V  
Measurement current  
output IMESS:  
16.5 Linear voltage range for  
VIMESS  
VIMESS  
0
VVCC5  
V
V
IWDR 55mA,  
measurement on pin IMESS  
SPI: (6XXX)H  
16.5A Clamping voltage on pin  
IMESS  
VVCC5  
VVCC5  
+ 0.6  
RIMESS ≥  
VVCC5 / 60mA  
4)  
16.6 Leakage current on pin IMESS IIMESS  
(measurement inactive)  
-10.0  
-0.2  
0
µA  
VZPx2 =33V  
(x=1,2,3,4)  
16.7 Current difference of the basic I1  
0.2  
%
SPI: (4XXX)H,  
VIMESS = 4.8V,  
IZPx2 = 0 and 55mA  
4)  
1)  
reference current on pin  
IMESS between IZPx2 (x=1,2,3,4)  
and -IIMESS  
16.8 Current difference of the basic IIMESS  
0
60  
µA 1. SPI: (4XXX)H,  
2. SPI: (6XXX)H with  
pin WDR = open and  
squibs connected  
reference current on pin  
IMESS between IWDR and -  
IIMESS (measurement of  
channel 1 to 4 active)  
VIMESS = 4.8V  
4)  
16.9 Current difference of the basic I2  
-0.2  
0.2  
%
SPI: (6XXX)H  
4)  
2)  
reference current on pin  
VIMESS = 4.8V,  
IMESS between IWDR and -  
IIMESS (measurement of  
channel 1 to 4 active)  
IWDR = 0 and 55mA,  
squibs connected  
(IIMESS2 - IIMESS1) - 55mA  
1)  
I
I
1
=
=
x 100  
x 100  
(IIMESS2: at IZPx2=55mA, IIMESS1: at IZPx2=0mA)  
55mA  
After characterization the values will be guaranteed by design.  
(IIMESS2 - IIMESS1) - 55mA  
55mA  
2)  
3)  
2
(IIMESS2: at IWDR=55mA, IIMESS1: at IWDR=0mA)  
After characterization the values will be guaranteed by design.  
Typical temperature dependence of the ON-resistance: Ron 125 °C = 2.5 x Ron -40 °C  
4) Garanteed by design.  
5)  
IIMESS = (VROS / RROS) x 275 / 12 (± 8 %)  
VROS specified under No. 6.2  
Version B  
May 05, 2001  
page 46  
Datasheet  
TLE 6710  
AC/DC Characteristics (continued)  
Squib Resistance Measurement: (continued)  
T = -40 to + 125°C, V  
=15 to 33V, V  
=4.8 to 5.2V, x=1,2,3,4  
Limit Values  
min. typ. max.  
j
EVZ  
VCC5  
No.  
Parameter  
Symbol  
Unit  
Test Condition  
UZP Voltage Output for  
Resistance Measurement:  
16.10 Voltage on pin UZP  
(measurement active)  
VUZP  
VUZP  
VUZP  
VUZP  
IUZP  
0.0  
VVCC5  
+ 0.6  
0.93 x  
VVCC5  
0.95 x  
VVCC5  
30  
-1.0  
80  
V
V
16.10 Voltage on pin UZP  
0.85 x  
VVCC5  
0.85x  
VVCC5  
0.0  
-3.0  
30  
VZPx1 = VZPx2  
VZPx1 = VZPx2  
A
(gain = 10 amplifier active)  
16.10 Voltage on pin UZP  
(gain = 30 amplifier active)  
V
B
16.11 Voltage on pin UZP  
(measurement inactive)  
16.12 Current on pin UZP  
(measurement active)  
16.13 internal pull down resistor on  
pin UZP  
mV  
mA  
kΩ  
VZPx1-VZPx2 = 0V  
VUZP = 0V  
VUZP = 3V  
RUZP  
(measurement inactive)  
), ), )  
1 2  
0
Measurement amplifier  
(gain = 10)  
16.14 Voltage gain  
a10  
9.90  
45  
10.30  
VZPX1-VZPX2=400mV  
VCM = VZPX2 ± 0.4V,  
the value of VZPX2 is  
the actual  
measurement result  
of No. 16.21  
16.18 Common mode rejection ratio  
CMRR10  
dB  
VCM = VZPX2 ± 0.4V,  
the value of VZPX2 is  
the actual  
measurement result  
3)  
of No. 16.21  
), ), )  
1 2  
0
Measurement amplifier  
(gain = 30)  
16.19 Voltage gain  
a30  
29.0  
50  
32.0  
VZPX1-VZPX2=140mV  
VCM = VZPX2 ± 0.4V,  
the value of VZPX2 is  
the actual  
measurement result  
of No. 16.21  
16.20 Common mode rejection ratio  
CMRR30  
dB  
VCM = VZPX2 ± 0.4V,  
the value of VZPX2 is  
the actual  
measurement result  
3)  
of No. 16.21  
)
0
The 'Gain-10-Amplifier' measurements will be done between pin UZP (as an output)  
and pins ZPx1 , ZPx2 (as differential inputs).  
1)  
2)  
3)  
From one squib output ZP11 / ZP12 (or ZP21 / ZP22, ZP31 / ZP32, ZP41 / ZP42) a short to  
ground or a connection to the automotive supply voltage VBAT has no influence to the other  
squib resistance measurement function and vice-versa.  
A squib difference voltage > 0.4 V has no influence to the other squib resistance measurement function  
and vice-versa. In this case the output voltage on pin UZP will be set to values as specified under  
No. 16.10.  
CMRR = 20 x log(ax x VZPx2 / VUZP)  
Version B  
May 05, 2001  
page 47  
Datasheet  
TLE 6710  
AC/DC Characteristics (continued)  
Squib Resistance Measurement: (continued)  
T = -40 to + 125°C, V  
=15 to 33V, V  
=4.8 to 5.2V, x=1,2,3,4  
Limit Values  
min. typ. max.  
j
EVZ  
VCC5  
No.  
Parameter  
Pins ZP12, ZP22,ZP32, ZP42  
voltage regulator  
Symbol  
Unit  
Test Condition  
16.21 Regulated voltage on pins  
ZPx2  
VZPx2  
7.5  
8.5  
V
VIMESS = 4.8V  
IIMESS = -5.0mA to -60mA  
16.22 Voltage difference of the  
regulated voltage on pins ZPx2  
1. SPI: (4XXX)H;  
2. SPI: (6XXX)H  
with IWDR = 55mA,  
squibs connected,  
VIMESS = 4.8V  
VZPx2  
100  
-65  
mV  
mA  
16.23 Current limit on pin IMESS  
IIMESS  
-220  
VZPx2 =40V,  
RIMESS = 0Ω  
activated by SPI  
ton < 5ms  
Settling Time  
16.24 Total settling time on pin UZP  
tUZP  
5
200  
µs  
IIMESS = -5.0 to -60mA  
for 90% of the final  
value on pin UZP  
no capacitance on  
pins ZPx  
initial VZPx to 0...33V  
Pin IMESS Voltage  
1)  
Measurement Amplifier  
(gain = 2)  
16.25 Voltage gain  
a2  
1.90  
1.95  
2.25  
2.05  
20  
VIMESS = 340mV to  
1V  
16.25 Voltage gain  
A
a2  
VIMESS = 1V to 2.5V  
2)  
16.26 Input offset voltage  
Vos  
mV  
1)  
2)  
The 'Gain-2-Amplifier’ measurements will be done between pin UZP (as an output)  
and pin IMESS (as input).  
Will be guaranteed by design after characterization. ( Vos = VUZP/2 - VIMESS )  
Version B  
May 05, 2001  
page 48  
Datasheet  
TLE 6710  
AC/DC Characteristics (continued)  
Squib Leakage Measurement:  
T = -40 to + 125°C, V  
=15 to 33V, V  
=4.8 to 5.2V; V  
=5.25V to 20 V, (¾ x V  
)+2.5V V  
EVZ  
j
EVZ  
VCC5  
UBRL  
UBRL  
Limit Values  
No.  
Parameter  
Symbol  
min. typ. max.  
Unit  
Test Condition  
Outputs LL and LH for  
Leakage Measurement:  
17.1 Voltage on pin LL  
VLL  
VLH  
0.8  
0.8  
V
V
leakage to ground  
VZPx1 < 1 / 4 x VUBRL  
VZPx1 is decreasing  
17.2 Voltage on pin LH  
leakage to battey  
VZPx1 > 3 / 4 x VUBRL  
VZPx1 is increasing  
Reference output RLM:  
17.3 Output voltage on pin RLM  
VRLM  
0.31x  
VUBRL  
0.35 x  
VUBRL  
V
RRLM = 2k to 20k,  
IRLM=-0.2 to -3.5mA  
17.4 Output current on pin RLM  
during measurement  
IRLM  
-3.5  
0
mA stable state  
17.5 Dynamic output voltage  
on pin RLM  
VRLM  
0.2 x  
VUBRL  
0.46x  
VUBRL  
V
RRLM = 220Ω  
VUBRL = 6V  
17.6 Dynamic output current  
capability on pin RLM  
IRLM  
-6.0  
mA  
RRLM = 220Ω  
VUBRL = 6V  
17.7 Current ratio of pin RLM to pin  
ZPx1  
17.8 Current ratio of pin RLM to pins  
ZPx1  
17.9 Resistance ratio of resistor on  
pin RLM to leakage resistance  
IRLM/IZPx1  
IRLM/IZPx1  
RRLM/Rleak  
0.9  
1.1  
stable state,  
IRLM = -3.5mA  
0.75  
1.25  
dynamic state,  
IRLM = -6mA  
4/3  
Leakage detection voltages:  
17.10 Leakage low threshold voltage  
VZPx1  
VZPx1  
VZPx1  
-5%  
-5%  
1/4  
x
5%  
5%  
V
V
V
leakage to ground  
VZPx1 is decreasing  
target: VLL = 'low'  
leakage to battery  
VZPx1 is increasing  
target: VLH = 'low'  
VUBRL  
17.11 Leakage high threshold voltage  
17.12 Leakage detection hysteresis  
3/4  
x
VUBRL  
-20% 1/48 20%  
leakage to ground or  
leakage to battery  
x
VUBRL  
Reference input UBRL:  
17.13 Internal resistor at pin UBRL  
Settling time  
17.14 Total settling time on pins  
LL or LH  
RUBRL  
35  
150  
50  
kΩ  
VUBRL < 24V  
tLL  
tLH  
µs  
IRLM = -0.5 mA  
no capacitance on  
pins ZPx1 and ZPx2  
initialise:  
VZPx2 = 0 to 33V  
17.15 LL output response after Squib Low tdLL  
30  
30  
µs  
µs  
no external leakage  
Side Switch activation via LSEN  
17.16 LH output response after Squib High tdLH  
no external leakage  
Side Switch activation via HSEN  
Note: The pin RLM is protected against a short circuit to ground during leakage measurement  
(ton 400ms). In this case the minimum expected current IRLM -100mA and IZPx1 100mA.  
Version B  
May 05, 2001  
page 49  
Datasheet  
TLE 6710  
AC/DC Characteristics (continued)  
Internal Dummy Squib Resistance:  
T = -40 to + 125°C; V  
=15 to 33V  
j
EVZ  
Limit Values  
No.  
Parameter  
Squib outputs:  
Symbol  
min. typ. max.  
Unit  
Test Condition  
18.1 Leakage current of switch  
x=1,2,3,4  
IZPx  
-20.0  
-20.0  
10  
20.0  
20.0  
50  
µA  
switch off;  
ZPx1=ZPx2  
VVZx=33V  
VZPx=16,5V  
switch off;  
ZPx1=ZPx2  
VVZx=33V  
VZPx=0V  
no firing or measure  
VZPx1-VZPx2 = 20V,  
VZPx1-VZPx2 VEVZ  
18.1 Leakage current of switch  
IZPx  
µA  
A
x=1,2,3,4  
18.2 Internal dummy resistor from  
ZPx1 to ZPx2 (x=1,2,3,4)  
RZPx1-ZPx2  
kΩ  
Supply Voltage Measurements:  
T = -40 to + 125°C, V  
=4.8 to 5.2V; V  
=6 to 33V, V  
=V  
=15 to 33V, V  
=V  
=6 to 18 V  
j
VCC5  
VZ1,2,3,4  
EVZ EVZ2  
UBATT UBRL  
Limit Values  
No.  
Parameter  
Symbol  
min.  
typ.  
max. Unit  
Test Condition  
UZP Voltage Output for Supply  
Voltage Measurements:  
19.1 Voltage on pin UZP  
(measurement inactive)  
19.2 Voltage on pin UZP  
(measurement active)  
VUZP  
VUZP  
0.0  
0
30  
mV  
VVCC5  
+0.6  
V
19.3 UBATT Voltage to UZP output VUBATT/VUZP -5%  
voltage ratio  
5
5
8
8
8
5%  
5%  
5%  
5%  
5%  
selection via SPI:  
MUB1  
VUBATT VEVZ-6V  
19.4 UBRL Voltage to UZP output  
voltage ratio  
VUBRL/VUZP  
VEVZ / VUZP  
VEVZ2 / VUZP  
VVZx / VUZP  
-5%  
-5%  
-5%  
-5%  
selection via SPI:  
MUB2  
VUBRL VEVZ-6V  
selection via SPI:  
MEVZ1  
VEVZ +6V  
selection via SPI:  
MEVZ2  
VEVZ2 +6V  
selection via SPI:  
MVZx  
19.5 EVZ Voltage to UZP output  
voltage ratio  
19.6 EVZ2 Voltage to UZP output  
voltage ratio  
19.7 VZx Voltage to UZP output  
voltage ratio (x=1,2,3,4)  
VVZx +6V  
19.8 Total settling time on pin UZP  
tUZPM  
200  
+7%  
5%  
µs  
V
for 90% of the final  
value on pin UZP  
selection via SPI:  
REF; (AAAA)H  
selection via SPI:  
MZPx  
VZPx1 VEVZ-6V  
19.9 Reference Voltage on UZP pin VUZP  
-7%  
-5%  
2.8  
5
19.10 ZPx1 Voltage to UZP output  
voltage ratio  
VZPx1/VUZP  
Version B  
May 05, 2001  
page 50  
Datasheet  
TLE 6710  
AC/DC Characteristics (continued)  
Detection of Safing Sensor Closure:  
T = -40 to + 125°C, V  
=4.8 to 5.2V;  
j
VCC5  
=V  
V
=6 to 40V, V  
=15 to 40V, V  
=V  
=6 to 18 V  
VZ1  
EVZ EVZ2  
UBATT UBRL  
Limit Values  
typ. max. Unit Test Condition  
No.  
Parameter  
Symbol  
min.  
20.1 Threshold voltage on pin ISS for VISS  
the choice between LS - and HS -  
detection  
V
+ 0.6  
V
+ 1.2  
V
VCC5  
+ 1.8  
V
VMSS='low',  
VISS decreases,  
VVZ1VISS-0.3V  
VEVZ5V  
VCC5  
VCC5  
High Side Detection:  
20.2 Threshold voltage of difference  
between pins ISS and VZ1  
VISS-VVZ1  
0.3  
2.0  
10  
0.4  
2.3  
0.6  
2.5  
V
VMSS='low',  
VISS-VVZ1  
increases  
20.3 Threshold voltage of difference  
between pins ISS and VZ1 in  
case of firing  
VISS-VVZ1  
20.4 Hysteresis of difference between (VISS -  
150  
mV  
V
pins ISS and VZ1  
Low Side Detection:  
VVZ1)  
0)  
20.4A Threshold voltage on pin ISS  
VISS  
V
/2  
V
/2  
V
/2  
VMSS='high',  
VISS decreases  
VCC5  
- 0.1  
VCC5  
VCC5  
+ 0.1  
20.4B Time limit for VISS < threshold for tISSMIN  
time prolonguation on pin MSS  
0.5  
1
100  
fOS  
100  
fOS  
100  
fOS  
2)  
2)  
2)  
20.4C VMSS time prolonguation (starting tSUM  
from VISS exceeding threshold)  
97  
97.5  
20.4D Time limit for a valid retrigger for tRTRIG  
VISS > threshold  
0.5  
Current source from pin VZ1 to  
ground:  
20.5 Current on pin VZ1  
IVZ1  
1.2  
1)  
6
mA RROS=5kΩ  
selection via  
SPI: SMSSH  
20.6 Current on pin ISS  
20.7 Current on pin ISS  
IISS  
IISS  
50  
200  
µA NO firing  
µA Firing active  
0)  
Guaranteed by design.  
V
ROS  
1)  
2)  
IVZ1min,max 15  
1 0.6  
RROS  
Accelerated testing can be performed by the test mode C, described in the chapter  
‘Watchdog Operation and Generation of the Squib Driver Enable Signal ZKEN’.  
If the pin RTP is set to VVCC5 + 2 x Vdiode, the units for 20.4B, 20.4C, 20.4 D are 4/fos instead of 100/fos.  
Version B  
May 05, 2001  
page 51  
Datasheet  
TLE 6710  
AC/DC Characteristics (continued)  
Average Chip Temperature Measurement:  
T = -40 to + 150°C, V  
=15 to 33V, V =4.8 to 5.2V  
VCC5  
j
EVZ  
Limit Values  
No.  
Parameter  
Symbol  
min. typ. max.  
Unit  
Test Condition  
T = 25 °C;  
21.1  
VUZP  
2.7  
1)  
3.1  
V
Voltage on pin UZP  
RROS=5k,  
SPI: MTMP  
(9XXX)H  
21.2  
1)  
dVUZP/dT  
-7.5  
-6.0 mV/K SPI: MTMP  
(9XXX)H  
Temperature coefficient of the  
voltage on pin UZP  
Calculation of the voltage on pin UZP at T = 25 °C depending on the value of the resistor on pin ROS:  
5 k  
VUZP 2.9V + 4  
26mV ln  
( 7%)  
RROS  
Version B  
May 05, 2001  
page 52  
Datasheet  
TLE 6710  
J. Serial Peripheral Interface (SPI)  
J.1: SPI Timing Characteristics:  
T = -40 to + 125°C, V  
=4.8 to 5.2V;  
VCC5  
j
Limit Values  
No.  
Parameter  
Symbol  
tlead  
min. typ. max.  
Unit  
ns  
22.1  
40  
100  
25  
SSQ Lead Time  
SSQ Lag Time  
22.2  
22.3  
ns  
tlag  
tf  
ns  
Fall Time for SSQ, CL, MOSI  
Rise Time for SSQ, CL, MOSI  
MOSI Data Setup Time  
MOSI Data Hold Time  
MOSI Data Valid Time  
Clock frequency  
22.4  
25  
ns  
tr  
22.5  
40  
ns  
tSU  
th  
22.6  
40  
ns  
22.10  
22.12  
120  
ns  
tv  
2)  
0
4
MHz  
fCL  
Note :  
2)  
All timing is shown with respect to 20% and 70% of VVCC5.  
Parameter No.: 22.10 is necessary, if 68HC11 is used.  
TLE 6710 function is independent of this parameter.  
SPI Timing  
Version B  
May 05, 2001  
page 53  
Datasheet  
TLE 6710  
J.2: SPI Commands:  
J.2.1: General Information on SPI Command Structure:  
The TLE 6710 hardware can be configured as MODE0- or MODE1. With a ‘low’ or ‘open’ on pin MODE, after start up  
the system works in the MODE0-default mode and decodes SPI instruction commands. A MODE1 operation requires  
an initializing SPI ‘Mode command’ (FExx)H and a ‘high’ on pin MODE before starting with SPI instructions like  
diagnostic, control or firing commands. If the software and hardware settings for the mode definition do not fit together,  
then the transmission of all SPI-commands will be prevented.  
All functions e.g. 'Firing' or 'Measurement' are controlled by a 16 bit instruction command. The 16 bit word consists of  
two bytes (8 bit) and will be decoded by the decoder logic circuit of the TLE 6710 and latched for some functions.  
After a Watchdog activated 'reset' all internal control registers and decoded signals are reset to its inactive default  
value.  
Byte A: FUNCTION - BYTE  
Byte B: SELECTION - BYTE  
a7  
a6  
a5  
a4  
a3  
a2  
a1  
a0  
b7  
b6  
b5  
b4  
b3  
b2  
b1  
b0  
MSB  
LSB MSB  
LSB  
Function Byte:  
a0:  
indicates valid control command  
a1..a3 control bits  
a4..a7 SPI command bits  
Selection Byte  
b0..b1 channel select  
b2..b3 function select, firing and test commands  
b4..b6 switch or measurement select  
b7  
not used except firing and test commands  
in case of firing command: b0..b7 selects the squib driver transistors, all  
combinations are allowed.  
If RESQ=0 is generated, then the SPI-control register is reset to its inactive default value. All commands will be  
interrupted.  
Default states:  
1. MODE0 (pin MODE = 0 or open)  
2. all squib drivers off,  
3. all measurements off  
4. Lamp Driver 1(AWL1) depends on AW1CT.  
See table in the description ‘Alarm Warning Lamp Driver (AWL1)  
5. Lamp Driver 2 (AWL2) is off  
6. Watchdog Trigger signal is low,  
7. Safing Sensor Closure Detection: Current source to ground = 0mA  
J.2.2: Summary of SPI Commands:  
Version B  
May 05, 2001  
page 54  
Datasheet  
TLE 6710  
Code  
(hex)  
0000  
Name  
Short Description  
NOMEAS  
CTRL  
Deactivate all measurements, no change of latched status via  
control command (J.2.9)  
0xxx  
1xxx  
2xxx  
Control Commands for Lamps, Watchdog and Safing Sensor  
Detection (only if used as a stand alone command!!)  
Supply Voltage and Lamp Measurement Command,  
Squib Leakage Measurement with squib switches in OFF state  
V/I-Sources Command; Set IASGx (x=1,2,3,4) voltage source to  
low voltage: 2.8 V  
MSUPL  
VIM28  
3xxx  
4xxx  
5555  
6xxx  
MFSUP  
RES5  
OSC  
Firing Voltage Measurement Command  
Resistance measurement 'reference current' active (5mA)  
100kHz Test Mode Command  
Resistance measurement 'main current' active (defined on WDR  
Pin) and 'reference current' active (5mA)  
RES40  
7xxx  
RES5H  
Resistance measurement with 'activated high side-switch and  
'reference current' active (5mA)  
8xxx  
9xxx  
AAAA  
Bxxx  
FIRE  
MTEMP  
REF  
Firing Command  
Temperature measurement  
2.8V Reference Test Mode Command  
V/I-Sources Command; Set IASGx (x=1,2,3,4) voltage source to  
high voltage: 5.0 V  
VIM5  
Cxxx  
MSQL  
Squib Leakage Measurement Command  
with one of eight squib switches in ON state  
This command could be reserved for future purposes  
not used  
Dxxx  
Exxx  
FExx  
MODE3  
RESET  
Latch Command for the MODE1. First command after start up. Pin  
MODE must be ‘high’ during transmission  
Reset by SPI Command. Deactivate all measurements. Reset all  
latched control commands (J.2.9) to it’s default state. Does not  
change the MODE1 to MODE0!  
FFFF  
J.2.3: Firing Commands: (8XXX)H  
Byte A: FUNCTION - BYTE  
Byte B: SELECTION - BYTE  
a7  
a6  
a5  
a4  
a3  
a2  
a1  
a0  
b7  
b6  
b5  
b4  
b3  
b2  
b1  
b0  
MSB  
LSB MSB  
LSB  
x
x
x
x
1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0  
1
0
0
0
b7 = 1: High-Side-Switch of squib 4 active  
b6 = 1: High-Side-Switch of squib 3 active  
b5 = 1: High-Side-Switch of squib 2 active  
b4 = 1: High-Side-Switch of squib 1 active  
b3 = 1: Low-Side-Switch of squib 4 active  
b2 = 1: Low-Side-Switch of squib 3 active  
b1 = 1: Low-Side-Switch of squib 2 active  
b0 = 1: Low-Side-Switch of squib 1 active  
Also more than one switch can be activated, all combinations may be allowed.  
Hardware requirements depending on MODE0- or MODE1  
Mode  
MODE ZKEN ZKEN_int HSEN_EN12 LSEN_EN34 Function  
MODE0  
MODE1  
MODE1  
MODE1  
0
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
0
0
1
1
(8xxx)H: firing of HSx and / or LSx  
(8xxx)H: firing of squib 1 and 2  
(8xxx)H: firing of squib 3 and 4  
(8xxx)H: firing of squibs 1 to 4  
For MODE1 operation an initializing SPI ‘Mode command’ needs to be sent once after start up. If RESQ = 0 is  
generated, then the measurement will be interrupted and the ASIC will return to it’s default state of the MODE0. A soft  
reset (FFFF)H does not change the mode.  
Version B  
May 05, 2001  
page 55  
Datasheet  
TLE 6710  
J.2.4: Squib Resistance Measurement-, Squib Voltage Measurement-  
and IMESS-pin Voltage Measurement Commands:  
Resistance measurement  
(4XXX) H  
'reference current' active (5.5 mA)  
Byte A: FUNCTION - BYTE  
Byte B: SELECTION - BYTE  
a7  
a6  
a5  
a4  
a3  
a2  
a1  
a0  
b7  
b6  
b5  
b4  
b3  
b2  
b1  
b0  
MSB  
LSB MSB  
LSB  
x
x
x
x
X
x
x
x
0/1 0/1  
0
1
0
0
0/1 0/1  
Resistance measurement  
(6XXX) H  
'main current' active (defined on pin WDR) and  
'reference current' active (5.5 mA)  
Byte A: FUNCTION - BYTE  
Byte B: SELECTION - BYTE  
a7  
a6  
a5  
a4  
a3  
a2  
a1  
a0  
b7  
b6  
b5  
b4  
b3  
b2  
b1  
b0  
MSB  
LSB MSB  
LSB  
x
x
x
x
x
x
x
x
0/1 0/1  
0
1
1
0
0/1 0/1  
Resistance measurement  
(7XXX)H  
'activated high side-switch’ (current defined on pin VZx) and  
'reference current' active (5.5 mA)  
Byte A: FUNCTION - BYTE  
Byte B: SELECTION - BYTE  
a7  
a6  
a5  
a4  
a3  
a2  
a1  
a0  
b7  
b6  
b5  
b4  
b3  
b2  
b1  
b0  
MSB  
LSB MSB  
LSB  
x
x
x
x
x
x
x
x
0/1 0/1  
0
1
1
1
0/1 0/1  
b0..b1 : Channel select  
b1  
0
b0 channel select  
0
1
0
1
Channel 1  
Channel 2  
Channel 3  
Channel 4  
0
1
1
b2..b3 : Selection of the functions on pin UZP  
b3  
b2 additional functions select  
0
0
1
1
0
1
0
1
Gain 10 Amplifier to UZP  
Gain 30 Amplifier to UZP  
Gain 2 Amplifier to UZP  
Squib Voltage to UZP  
[-VUZP / (VZPx1 - VZPx2) = 10]  
[-VUZP / (VZPx1 - VZPx2) = 30]  
[VUZP / VIMESS = 2]  
(x=1,2,3,4)  
(x=1,2,3,4)  
[VZPx1 = 5 x VUZP]  
(x=1,2,3,4)  
Version B  
May 05, 2001  
page 56  
Datasheet  
TLE 6710  
Hardware requirements depending on MODE0 - or MODE1  
Mode  
MODE ZKEN ZKEN_int HSEN_EN12 LSEN_EN34 Function  
MODE0  
MODE0  
MODE0  
MODE1  
MODE1  
MODE1  
0
0
0
1
1
1
x
x
x
x
x
x
1
1
1
1
1
1
x
x
1
0
0
0
x
x
1
0
0
0
(4xxx)H: reference current  
(6xxx)H: reference + WDR main current  
(7xxx)H: reference + HSx main current  
(4xxx)H: reference current  
(6xxx)H: reference + WDR main current  
(7xxx)H: reference + HSx main current  
For MODE1 operation an initializing SPI ‘Mode command’ needs to be sent once after start up. If RESQ = 0 is  
generated, then the measurement will be interrupted and the ASIC will return to it’s default state of the MODE0. A soft  
reset (FFFF)H does not change the mode.  
J.2.5: Firing Voltage Measurement Commands:  
(3XXX)H  
Byte A: FUNCTION - BYTE  
Byte B: SELECTION - BYTE  
a7  
a6  
a5  
a4  
a3  
a2  
a1  
a0  
b7  
b6  
b5  
b4  
b3  
b2  
b1  
b0  
MSB  
LSB MSB  
LSB  
x
x
x
x
x
x
x
x
x
x
1/0 1/0  
0
0
1
1
b0..b1 : channel select  
b1  
0
b0 channel select  
0
1
0
1
Firing voltage VZ1 measurement channel 1 active  
Firing voltage VZ2 measurement channel 2 active  
Firing voltage VZ3 measurement channel 3 active  
Firing voltage VZ4 measurement channel 4 active  
0
1
1
Version B  
May 05, 2001  
page 57  
Datasheet  
TLE 6710  
J.2.6: Squib Leakage Measurement Commands with one of eight squib switches in ON-state:  
(CXXX)H  
Byte A: FUNCTION - BYTE  
Byte B: SELECTION - BYTE  
a7  
a6  
a5  
a4  
a3  
a2  
a1  
a0  
b7  
b6  
b5  
b4  
b3  
b2  
b1  
b0  
MSB  
LSB MSB  
LSB  
x
x
x
x
x
1/0 1/0 1/0  
x
x
1/0 1/0  
1
1
0
0
b0..b1 : channel select  
b1  
0
b0 channel select  
0
1
0
1
Leakage measurement channel 1 active  
Leakage measurement channel 2 active  
Leakage measurement channel 3 active  
Leakage measurement channel 4 active  
0
1
1
b4..b6 : HS-/ LS-switch selection  
b6  
0
b5  
0
b4 HS-/ LS-switch selection  
0
1
0
1
0
1
0
1
Low-Side-Switch of squib 1 ON  
Low-Side-Switch of squib 2 ON  
Low-Side-Switch of squib 3 ON  
Low-Side-Switch of squib 4 ON  
High-Side-Switch of squib 1 ON  
High-Side-Switch of squib 2 ON  
High-Side-Switch of squib 3 ON  
High-Side-Switch of squib 4 ON  
0
0
0
1
0
1
1
0
1
0
1
1
1
1
Hardware requirements depending on MODE0 - or MODE1  
Mode  
MODE ZKEN ZKEN_int HSEN_EN12 LSEN_EN34 Function  
MODE0  
MODE0  
MODE1  
MODE1  
0
0
1
1
x
x
x
x
1
1
1
1
1
x
0
0
x
0
0
0
(Cxxx)H: measurement with HSx on  
(Cxxx)H: measurement with LSx on  
(Cxxx)H: measurement with HSx on  
(Cxxx)H: measurement with LSx on  
For MODE1 operation an initializing SPI ‘Mode command’ needs to be sent once after start up. If RESQ = 0 is  
generated, then the measurement will be interrupted and the ASIC will return to it’s default state of the MODE0. A soft  
reset (FFFF)H does not change the mode.  
Version B  
May 05, 2001  
page 58  
Datasheet  
TLE 6710  
J.2.7: Voltage-/ Current-Sources (V/I) Commands:  
V/I-Sources Command; Set IASGx (x=1,2,3,4) voltage source to low voltage: 2.8 V (2XXX)H  
Byte A: FUNCTION - BYTE  
Byte B: SELECTION - BYTE  
a7  
a6  
a5  
a4  
a3  
a2  
a1  
a0  
b7  
b6  
b5  
b4  
b3  
b2  
b1  
b0  
MSB  
LSB MSB  
LSB  
x
x
x
x
x
x
x
x
x
x
1/0 1/0  
0
0
1
0
V/I-Sources Command; Set IASGx (x=1,2,3,4) voltage source to high voltage: 5.0 V (BXXX)H  
Byte A: FUNCTION - BYTE  
Byte B: SELECTION - BYTE  
a7  
a6  
a5  
a4  
a3  
a2  
a1  
a0  
b7  
b6  
b5  
b4  
b3  
b2  
b1  
b0  
MSB  
LSB MSB  
LSB  
x
x
x
x
x
x
x
x
x
x
1/0 1/0  
1
0
1
1
b0..b1 : source select  
b1  
0
b0 source select  
0
1
0
1
IASG1 voltage source active  
IASG2 voltage source active  
IASG3 voltage source active  
IASG4 voltage source active  
0
1
1
Version B  
May 05, 2001  
page 59  
Datasheet  
TLE 6710  
J.2.8: Supply Voltage-, Lamp-Measurement and Squib Leakage Measurement with squib switches in OFF-state  
Commands: (1XXX)H  
Byte A: FUNCTION - BYTE  
Byte B: SELECTION - BYTE  
a7  
a6  
a5  
a4  
a3  
a2  
a1  
a0  
b7  
b6  
b5  
b4  
b3  
b2  
b1  
b0  
MSB  
LSB MSB  
LSB  
x
x
x
x
x
1/0 1/0 1/0  
x
1/0 1/0 1/0  
0
0
0
1
b0..b1 : channel select  
b2 : Leakage Measurement active or inactive  
b2  
1
b1  
0
b0 channel select  
0
1
0
1
x
Leakage measurement channel 1 active  
1
0
Leakage measurement channel 2 active  
Leakage measurement channel 3 active  
Leakage measurement channel 4 active  
Leakage measurement INACTIVE  
1
1
1
1
0
x
b4..b6 : select measurement channel  
Name  
UEVZ  
b6  
0
b5  
0
b4 select voltage measurement  
0
1
0
1
0
1
0
1
EVZ voltage measurement active  
EVZ2 voltage measurement active  
UBATT voltage measurement active  
UBRL voltage measurement active  
AWL1 voltage measurement active  
AWL1 current measurement active  
AWL2D voltage measurement active  
AWL2S voltage measurement active  
UEVZ2  
UUBATT  
UUBRL  
UAWL1  
IAWL1  
0
0
0
1
0
1
1
0
1
0
UAWL2D  
UAWL2S  
1
1
1
1
Version B  
May 05, 2001  
page 60  
Datasheet  
TLE 6710  
J.2.9: Control Commands for Lamps, Watchdog and Safing Sensor Detection:  
(0XXX)H : If used as a stand alone command  
Byte A: FUNCTION - BYTE  
Byte B: SELECTION - BYTE  
a7  
MSB  
a6  
a5  
a4  
a3  
a2  
a1  
a0  
LSB MSB  
1/0  
b7  
b6  
b5  
b4  
b3  
b2  
b1  
b0  
LSB  
x
1/0 1/0 1/0  
x
x
x
x
x
x
x
0
0
0
0
(XXXX)H, except (5XXX)H and (FXXX)H: If used during transmission of other commands  
Byte A: FUNCTION - BYTE  
Byte B: SELECTION - BYTE  
a7  
MSB  
x
a6  
a5  
a4  
a3  
a2  
a1  
a0  
LSB MSB  
1/0  
b7  
b6  
b5  
b4  
b3  
b2  
b1  
b0  
LSB  
x
x
x
x
1/0 1/0 1/0  
x
x
x
x
x
x
x
a0:  
if its value is 0: no valid control command is transmitted  
if its value is 1: a valid control command is transmitted,  
bit a1..a3 will act as stated in the following table;  
a1,a2 selects actions; a3 defines on/off state  
Name  
a3  
0
a2  
0
a1  
0
Function  
SAWL1B  
SAWL2D  
WDTRL  
SMSSL  
Lamp Driver 1 (AWL1) = ON (AW1CT is open)  
Lamp Driver 2 (AWL2) = OFF  
(default)  
(default)  
(default)  
(default)  
0
0
1
0
1
0
Watchdog Trigger = 0 (LOW)  
0
1
1
Safing Sensor Closure Detection: Current = 0mA  
Lamp Driver 1 (AWL1) = OFF (AW1CT is open)  
Lamp Driver 2 (AWL2) = ON  
SAWL1D  
SAWL2B  
WDTRH  
SMSSH  
1
0
0
1
0
1
1
1
0
Watchdog Trigger = 1 (HIGH)  
1
1
1
Safing Sensor Closure Detection: Current 1.2 mA  
If RESQ=0 is generated, then the SPI-control register is reset to its inactive default value:  
Lamp Driver 1(AWL1) is activated if AW1CT is open,  
Lamp Driver 2 (AWL2) is deactivated,  
Watchdog Trigger signal is low,  
Safing Sensor Closure Detection: Current source to ground = 0mA  
The Control Commands can be transmitted alone as a 16bit word [command (0XXX)H ] or in combination with other  
commands [command (XXXX)H ]. The Control Command is latched and active till reprogramming via SPI.  
Version B  
May 05, 2001  
page 61  
Datasheet  
TLE 6710  
J.2.10: Oscillator Frequency Test Mode Command: (5555)H  
If RESQ=0 is generated, then the test mode is interrupted and the SPI-decoder is reset.  
After activating the 'Oscillator Frequency Test Mode' the internal generated oscillator frequency is reported to the pin  
LL and LH. The signal shape is the inverted curve of the FOSC signal in the description of ‘Oscillator for...’.  
Byte A: FUNCTION - BYTE  
Byte B: SELECTION - BYTE  
a7  
a6  
a5  
a4  
a3  
a2  
a1  
a0  
b7  
b6  
b5  
b4  
b3  
b2  
b1  
b0  
MSB  
LSB MSB  
LSB  
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
J.2.11: 2.8V Reference Test Mode Command: (AAAA)H  
If RESQ=0 is generated, then the test mode is interrupted and the SPI-decoder is reset.  
After activating the '2.8 V Reference Test Mode' the internal generated voltage reference is reported to the pin UZP.  
Byte A: FUNCTION - BYTE  
Byte B: SELECTION - BYTE  
a7  
a6  
a5  
a4  
a3  
a2  
a1  
a0  
b7  
b6  
b5  
b4  
b3  
b2  
b1  
b0  
MSB  
LSB MSB  
LSB  
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
J.2.12: Reset by SPI Command: (FFFF)H  
By applying this command, the SPI-decoder is reset to its default state. Measurements will be interrupted. Latched  
control commands (J.2.9) return to it’s default value. If the system works in the MODE1, then this command will not  
change the state of MODE1 operation. This command has no effect on the RESQ pin.  
Byte A: FUNCTION - BYTE  
Byte B: SELECTION - BYTE  
a7  
a6  
a5  
a4  
a3  
a2  
a1  
a0  
b7  
b6  
b5  
b4  
b3  
b2  
b1  
b0  
MSB  
LSB MSB  
LSB  
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
Version B  
May 05, 2001  
page 62  
Datasheet  
TLE 6710  
J.2.13: Average Chip Temperature Test Mode Command: (9XXX)H  
If RESQ=0 is generated, then the test mode is interrupted and the SPI-decoder is reset to its default state. After  
activating the 'Average Chip Temperature Test Mode' an internal generated temperature stable reference current  
(approx. 40 µA) supplies four serial connected bipolar diodes, which are distributed on the chip surface. The  
temperature dependent voltage drop (approx. -7mV/K) is reported to the pin UZP.  
The voltage on pin UZP will be divided by two and it’s temperature dependence will be reduced to approximately  
-3.5mV/K, if the Alarm Warning Lamp Driver AWL2 goes into the over temperature shut down. Then the signal on pin  
UZP can be interpreted as a digital information of an AWL2 over temperature shut down. A SAWL2D command to  
switch off the lamp AWL2 after temperature decreasing returns the ASIC to the ‘Average Chip Temperature Test  
Mode’.  
Byte A: FUNCTION - BYTE  
Byte B: SELECTION - BYTE  
a7  
MSB  
a6  
a5  
a4  
a3  
a2  
a1  
a0  
b7  
b6  
b5  
b4  
b3  
b2  
b1  
b0  
LSB  
x
LSB MSB  
x
x
x
x
x
x
x
x
x
x
x
1
0
0
1
Version B  
May 05, 2001  
page 63  
Datasheet  
TLE 6710  
Application Notes  
1. It is recommended that a RC snubber is connected directly to pin SVZ to reduce ringing due to  
Boost converter switching.  
2. If pins ZPx1 and ZPx2 are connected to inductive loads/wiring then it may be necessary to add  
protection devices to reduce negative transients caused by external shorts to ground during  
deployment.  
3. IASGx pins connected to loads with chassis ground reference may require protection against  
negative voltage offsets.  
4. An open/disconnected M1 pin cannot be detected with a Leakage Measurement which turns  
on the LS driver of channel 1, i.e. C000 Hex. Instead a cross coupled Leakage Measurement  
must be performed. That is, look for leakage on channel 2 while activating the LS driver of  
channel 1, i.e. C001 Hex.  
5. Due to the low VZx leakage currents a longer delay time or external discharge resistor is  
necessary t detect an open VZx pin with a voltage measurement via UZP.  
6. When AWL2 is configured as a low side driver it is necessary to add an external discharge  
resistor to detect an open load with the driver off.  
7. It is recommended that a low ESR capacitor is used for the VCC5 output of the Buck converter  
to reduce ripple.  
8. A series diode connection is required for the VZx pins to prevent reverse current flow through  
the high side driver transistor body diode charging up the deployment caps due to external  
short to battery.  
9. It is recommended that a MOV is connected to the battery line of the airbag module to prevent  
violations of the maximum ratings. The MOV is not required in case of an existing central load  
dump protection.  
10.If the UBRL pin voltage is protected against negative voltages by an external blocking diode,  
the series resistor to UBRL is not required.  
Version B  
May 05, 2001  
page 64  
Datasheet  
TLE 6710  
Edition 05.2001  
Published by Infineon Technologies AG i. Gr.,  
Bereichs Kommunikation, St.-Martin-Strasse 53  
D-81541 München  
© Infineon Technologies AG2001  
All Rights Reserved.  
Attention please!  
The information herein is given to describe certain  
components and shall not be considered as  
warranted characteristics.  
Terms of delivery and rights to technical change  
reserved.  
We hereby disclaim any and all warranties,  
including but not limited to warranties of non-  
infringement, regarding circuits, descriptions and  
charts stated herein.  
Infineon Technologiesis an approved CECC  
manufacturer.  
Information  
For further information on technology, delivery  
terms and conditions and prices please contact  
your nearest Infineon Technologies Office in  
Germany  
or  
our  
Infineon  
Technologies  
Representatives worldwide (see address list).  
Warnings  
Due to technical requirements components may  
contain dangerous substances. For information on  
the types in question please contact your nearest  
Infineon Technologies Office.  
Infineon Technologies Components may only be  
used in life-support devices or systems with the  
express written approval of Infineon Technologies,  
if a failure of such components can reasonably be  
expected to cause the failure of that life-support  
device or system, or to affect the safety or  
effectiveness of that device or system. Life support  
devices or systems are intended to be implanted in  
the human body, or to support and/or maintain and  
sustain and/or protect human life. If they fail, it is  
reasonable to assume that the health of the user or  
other persons may be endangered.  
Version B  
May 05, 2001  
page 65  

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