TLE7189FXUMA1 [INFINEON]
AC Motor Controller, 0.01A, PQCC48, GREEN, PLASTIC, VQFN-48;
| 型号： | TLE7189FXUMA1 |
| 厂家： | 
Infineon |
| 描述： | AC Motor Controller, 0.01A, PQCC48, GREEN, PLASTIC, VQFN-48 电动机控制 |
| 文件： | 总29页 (文件大小：497K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Data Sheet, Rev. 2.2, Jan. 2016
TLE7189F
3-Phase Bridge Driver IC
Automotive Power
TLE7189F
Table of Contents
Table of Contents
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1
2
3
3.1
3.2
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin Assignment TLE7189F . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4
General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Default State of Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.1
4.2
4.3
5
5.1
Description and Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
MOSFET Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Output Stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Operation at Vs<12V - Integrated Charge Pumps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Sleep Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Protection and Diagnostic Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Short Circuit Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Dead Time and Shoot Through Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Under Voltage Shut Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Over Voltage Shut Down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Over Temperature Warning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
VCC Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
ERR Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Shunt Signal Conditioning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.1.1
5.1.2
5.1.3
5.1.4
5.2
5.2.1
5.2.2
5.2.3
5.2.4
5.2.5
5.2.6
5.2.7
5.2.8
5.3
5.3.1
6
Application Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
6.1
Layout Guide Lines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
7
8
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Data Sheet
2
Rev. 2.2, 2016-01-28
3-Phase Bridge Driver IC
TLE7189F
1
Overview
Features
•
Compatible to very low ohmic normal level input N-channel
MOSFETs
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
PWM frequency up to 30kHz
Fulfils specification down to 5.5V supply voltage
Short circuit protection with adjustable detection level
Three integrated current sense amplifiers
0 to 100% duty cycle
Low EMC sensitivity and emission
Control inputs with TTL characteristics
Separate input for each MOSFET
Separate source connection for each MOSFET
Integrated minimum dead time
PG-VQFN-48
Shoot through protection
Disable function and sleep mode
Detailed diagnosis
Over temperature warning
VQFN-48 package with exposed pad for excellent cooling
Green Product (RoHS compliant)
AEC (Automotive Electronics Council) qualified
•
•
•
•
SIL3 supporting features:
VCC check: Over- and under voltage check of 5V µC supply
Test functions for short circuit detection and VCC check
High voltage rated inputs
Description
The TLE7189F is a driver IC dedicated to control the 6 to 12 external MOSFETs forming the converter for high
current 3 phase motor drives in the automotive sector. It incorporates features like short circuit detection, diagnosis
and high output performance and combines it with typical automotive specific requirements like full functionality
even at low battery voltages. Its 3 high side and 3 low side output stages are powerful enough to drive MOSFETs
with 400nC gate charge with approx. 150ns fall and rise times.
Type
Package
Marking
TLE7189F
PG-VQFN-48
TLE7189F
Data Sheet
3
Rev. 2.2, 2016-01-28
TLE7189F
Block Diagram
2
Block Diagram
CL1
CH1
CB1
CL2
CH2
CB2
VS
Charge Pump 1
Under voltage det.
Charge Pump 2
Under voltage det.
INH
VDH
Floating HS driver
Short circuit detection
GH1
SH1
ERR1
ERR2
ENA
Diagnostic logic
Under voltage
Over voltage
Overtemperature
Short circuit
Reset
Floating LS driver
Short circuit detection
GL1
SL1
SCDL
VCC failure
L
E
V
E
L
VCT
Floating HS driver
Short circuit detection
GH2
SH2
VCC voltage
check
S
H
I
F
T
E
R
Floating LS driver
Short circuit detection
VS_OA
GL2
SL2
IL1
IH1
Input control
Shoot through
protection
IL2
IH2
Floating HS driver
Short circuit detection
GH3
SH3
dead time
IL3
IH3
Floating LS driver
Short circuit detection
GL3
SL3
VS_OA
AGND
ISP1
ISN1
GND1
GND2
GND3
3x Current sense OpAmp
Bias reference buffer
ISP2
ISN2
ISP3
ISN3
VRI VRO
VO1 VO2 VO3
Figure 1
Block Diagram
Data Sheet
4
Rev. 2.2, 2016-01-28
TLE7189F
Pin Configuration
3
Pin Configuration
3.1
Pin Assignment TLE7189F
SL1
GL1 VDH CB1 GND3 CL2
VS
CL1
CH1 CH2 ERR2 ERR1
36
35
34
33
32
31
30
29
28
27
26
25
37
38
39
40
41
42
43
44
45
46
47
48
24
GND1
SH1
GH1
CB2
GL2
IH2
23
IL2
22
IH1
21
IL1
20
IH3
19
SL2
IL3
TLE 7189 F
Topview
18
GH2
SH2
GH3
SH3
GND2
GL3
ENA
17
SCDL
16
VCT
15
INH
14
AGND
13
ISP3
1
2
3
4
5
6
7
8
9
10
11
12
SL3 VS_OA VO1 ISN1 ISP1 VRI
VRO VO2 ISN2 ISP2 VO3 ISN3
Figure 2
Pin Configuration
Data Sheet
5
Rev. 2.2, 2016-01-28
TLE7189F
Pin Configuration
3.2
Pin Definitions and Functions
Pin
1
Symbol
Function
SL3
Connection to source low side switch 3
2
VS_OA
Voltage supply I-DC Link OpAmps and voltage reference buffer / input for VCC
check
3
VO1
ISN1
ISP1
VRI
Output of OpAmp 1 for shunt signal amplification
- Input of OpAmp 1 for shunt signal amplification
+ Input of OpAmp 1 for shunt signal amplification
Input of bias reference amplifier
4
5
6
7
VRO
VO2
ISN2
ISP2
VO3
ISN3
ISP3
AGND
INH
Output of bias reference amplifier
8
Output of OpAmp 2 for shunt signal amplification
- Input of OpAmp 2 for shunt signal amplification
+ Input of OpAmp 2 for shunt signal amplification
Output of OpAmp 3 for shunt signal amplification
- Input of OpAmp 3 for shunt signal amplification
+ Input of OpAmp 3 for shunt signal amplification
Analog ground especially for the current sense OpAmps
Inhibit pin (active low)
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
VCT
SCDL
ENA
IL3
Input pin for VCC check test
Input pin to adjust short circuit detection level
Enable pin (active high)
Input for low side switch 3 (active high)
Input for high side switch 3 (active low)
Input for low side switch 1 (active high)
Input for high side switch 1 (active low)
Input for low side switch 2 (active high)
Input for high side switch 2 (active low)
Error signal 1
IH3
IL1
IH1
IL2
IH2
ERR1
ERR2
CH2
CH1
CL1
Error signal 2
+ terminal for pump capacitor of charge pump 2
+ terminal for pump capacitor of charge pump 1
- terminal for pump capacitor of charge pump 1
Voltage supply
VS
CL2
- terminal for pump capacitor of charge pump 2
Logic and power ground
GND3
CB1
VDH
GL1
SL1
Buffer capacitor for charge pump 1
Connection to drain of high side switches for short circuit detection
Output to gate low side switch 1
Connection to source low side switch 1
Logic and power ground
GND1
SH1
GH1
Connection to source high side switch 1
Output to gate high side switch 1
Data Sheet
6
Rev. 2.2, 2016-01-28
TLE7189F
Pin Configuration
Pin
40
41
42
43
44
45
46
47
48
Symbol
CB2
Function
Buffer capacitor for charge pump 2
Output to gate low side switch 2
Connection to source low side switch 2
Output to gate high side switch 2
Connection to source high side switch 2
Output to gate high side switch 3
Connection to source high side switch 3
Logic and power ground
GL2
SL2
GH2
SH2
GH3
SH3
GND2
GL3
Output to gate low side switch 3
Data Sheet
7
Rev. 2.2, 2016-01-28
TLE7189F
General Product Characteristics
4
General Product Characteristics
4.1
Absolute Maximum Ratings
Absolute Maximum Ratings 1)
-40 °C ≤ Tj ≤ 150 °C; all voltages with respect to ground, positive current flowing into pin (unless otherwise
specified)
Pos.
Parameter
Symbol
Limit Values
Max.
Unit Conditions
Min.
Voltages
4.1.1
Supply voltage
VS1
-4.0
45
V
with 10Ω and
1µF
4.1.2
4.1.3
4.1.4
4.1.5
Supply voltage
VS2
-0.3
-0.3
-0.3
-0.3
45
47
18
6.0
V
V
V
V
–
Supply voltage
VS3
tp<200ms
Voltage range at IHx, ILx, ENA, VCT
VDP1
–
–
Voltage range at ERRx, VOx, VRI, VRO, VDP2
SCDL
4.1.6
Voltage range at ERRx, VRI, SCDL
Voltage range at VOx
Voltage range at INH
VDP3
VVO
-0.3
-0.3
-0.3
-0.3
-7
18
V
V
V
V
V
V
V
V
V
V
V
with 10kΩ2)
with 1kΩ2)
4.1.7
18.0
18.0
18.0
7
4.1.8
VINH
VVS_OA
VSL
–
–
–
–
–
–
–
–
4.1.9
Voltage range at VS_OA
Voltage range at SLx
4.1.10
4.1.11
4.1.12
4.1.13
4.1.14
4.1.15
4.1.16
Voltage range at SHx
Voltage range at GLx
VSH
-7
45
VGL
-7
18
Voltage range at GHx
Voltage difference Gxx-Sxx
Voltage range at VDH
Voltage range at VDH
VGH
-7
55
VGS
-0.3
-0.3
-7.0
15
VVDH1
VVDH2
55
55
with 100Ω
200ms; 10x
4.1.17
Voltage range at VDH
VVDH3
-9.0
55
V
with 100Ω 1ms;
10x
4.1.18
4.1.19
Voltage range at VDH
Voltage range at VDH
VVDH4
VVDH5
-0.3
-7.0
20
28
V
V
V
V
INH=low
INH=low with
100Ω 200ms;
10x
4.1.20
4.1.21
Voltage range at VDH
Voltage range at VDH
VVDH6
-9.0
-0.3
28
28
V
V
VINH=low with
100Ω 200ms;
10x
VVDH7
VINH=low; 5min;
3x
4.1.22
4.1.23
4.1.24
4.1.25
4.1.26
Voltage range at CL1
VCL1
VCH1
VCP1
VCL2
VCH2
-0.3
-0.3
-0.3
-0.3
-0.3
25
25
25
25
55
V
V
V
V
V
–
Voltage range at CH1, CB1
Voltage difference CH1-CL1
Voltage range at CL2
–
–
–
Voltage range at CH2, CB2
–
Data Sheet
8
Rev. 2.2, 2016-01-28
TLE7189F
General Product Characteristics
Absolute Maximum Ratings (cont’d)1)
-40 °C ≤ Tj ≤ 150 °C; all voltages with respect to ground, positive current flowing into pin (unless otherwise
specified)
Pos.
Parameter
Symbol
Limit Values
Unit Conditions
Min.
-0.3
-2
Max.
25
4.1.27
4.1.28
Voltage difference CH2-CL2
VCP2
V
V
–
–
DC voltage difference between VDH and VVDHVS
+2
VS3)
4.1.29
4.1.30
Voltage range at ISPx, ISNx
Output current range at VOx
VISI
-5
5
V
–
–
IVOx
-10
10
mA
External components
4.1.31
4.1.32
4.1.33
Gate resistor
RG
2
–
Ω
V
V
–
Min. Voltage rating of CB2 capacitor
Min. Voltage rating of CB2 capacitor
VCCB2a
VCCB2b
-20
-31
20
+31
–
VS > 20V;
V
INH=low
Temperatures
4.1.34
4.1.35
4.1.36
Junction temperature
TJ
-40
-55
–
150
150
260
°C
°C
°C
–
–
–
Storage temperature
Tstg
Tsol
Lead soldering temperature
(1/16’’ from body)
4.1.37
Peak reflow soldering temperature4)
Tref
–
–
260
5
°C
–
–
Thermal Resistance
4.1.38
Junction to case
RthJC
K/W
ESD Susceptibility
4.1.39
4.1.40
ESD Resistivity5)
ESD Resistivity (charge device model)6) VESD
VESD
-2
–
2
kV
V
750
1) Not subject to production test, specified by design.
2) after 50h the chip must be replaced; resistor in series
3) High frequent transient ringing above 1MHz exceeding the +/-2V is allowed
4) Reflow profile IPC/JEDEC J-STD-020C
5) ESD susceptibility HBM according to EIA/JESD 22-A 114B
6) ESD susceptibility CDM according to EIA/JESD 22-C 101
Note:Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Note:Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are
not designed for continuous repetitive operation.
4.2
Functional Range
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
5.5
Max.
20
4.2.1
4.2.2
Supply voltage1)
Supply voltage1)
VS1
VS2
V
DC
5.5
28
TA=25°C; t<1min
Data Sheet
9
Rev. 2.2, 2016-01-28
TLE7189F
General Product Characteristics
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Max.
100
25
4.2.3
4.2.4
Duty cycle2)
0
0
%
–
D
PWM frequency
fPWM
kHz
Total gate charge
400nC
4.2.5
4.2.6
Quiescent current3)
IQ
–
–
30
30
µA
µA
VS ,VVDH<20 V
Quiescent current into VDH
IQ_VDH
V
VDH<20V;
VS pin open
fPWM=20kHz
4.2.7
Supply current at Vs
IVs
VS=170nC:
VS = 5.5V
VS = 14V
VS= 18V
–
–
110
110
90
mA
mA
90
VS = 20V
4.2.8
4.2.9
Supply current at Vs
(device disabled by ENA)
IVs(o)
–
60
40
VS=5.5V... 20V
VS=20V... 28V
Supply current at VS_OA
IVs_OA
IVDH1
–
–
30
mA
mA
V
VS_OA=4.8 ... 5.2V
VS=5.5V... 20V;
SHx=0V
VS=5.5V... 20V;
VS=VVDH=VSHx
IHx=low
Operation mode
4.2.10 Current flowing into VDH pin
(device not in sleep mode)
1.5
V
4.2.11 Current flowing into VDH pin
(device not in sleep mode)
IVDH2
150
650
µA
;
V
4.2.12 Voltage difference CB2-VDH
4.2.13 Junction temperature
VCB2VDH -0.3
TJ -40
20
V
150
°C
1) For proper start up minimum Vs=6.5V is required
2) Duty cycle is referred to the high side input command (IHx); The duty cycles can be driven continuously and fully operational
3) total current consumption from power net (Vs and VDH)
Note:Within the functional range the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the related electrical characteristics table.
Note:If the voltage difference between CB2 and SHx is smaller than 2V during normal operation, there is a risk
that the high side output can switch on and off without a corresponding input signal. As soon as this supply
voltage recovers and the input signal changes, the output stage is automatically aligned to the input again.
Data Sheet
10
Rev. 2.2, 2016-01-28
TLE7189F
General Product Characteristics
4.3
Default State of Inputs
Table 1
Default State of Inputs
Characteristic
State
Low
Remark
Default state of ILx (if ILx left open -pull down)
Default state of IHx (if IHx left open - pull up)
Default state of ENA (if ENA left open - pull down)
Default state of VCT (if VCT left open - pull up)
Default state of INH (if INH left open - pull down)
Low side MOSFETs off
High side MOSFETs off
Device/outputs disabled
Device/outputs disabled
Sleep mode, IQ < 30 µA
–
High
Low
High
Low
Default state of SCDL (if SCDL left open - internal
voltage divider)
Typ. 1.4V
Default State of sense amplifier output VOx
(ISPx=ISNx=0V)
Zero ampere equivalent
–
Status of the Device and the Outputs when
ENA=INH=high & VCT=low1)
Device active and outputs 5.5....28V; No VCC check
functional failure
1) No special start up procedure is required
Note:The load condition “C=22nF; RLoad=1Ω” in the paragraph “Electrical characteristics / Dynamic characteristic”
means that RLoad is connected between the output Gxx and the positive terminal of the C. The negative
terminal of the C is connected to GND and the corresponding Sxx. The voltage is measured at the positive
terminal of the C.
Note:Within the functional range the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the related electrical characteristics table.
Data Sheet
11
Rev. 2.2, 2016-01-28
TLE7189F
Description and Electrical Characteristics
5
Description and Electrical Characteristics
5.1
MOSFET Driver
5.1.1
Output Stages
The 3 low side and 3 high side powerful push-pull output stages of the TLE7189F are all floating blocks, each with
its own source pin. This allows the direct connection of the output stage to the source of each single MOSFET,
allowing a perfect control of each gate-source voltage even when 200A are driven in the bridge with rise and fall
times clearly below 1µs.
All 6 output stages have the same output power and thanks to the used charge pump principle they can be
switched all up to 30kHz.
Its output stages are powerful enough to drive MOSFETs with 400nC gate charge with approx. 150ns fall and rise
times or even to run 12 MOSFETs with 200nC each with fall and rise times of approx. 150ns.
Maximum allowed power dissipation, max. junction temperature and the capabilities of the charge pump limit the
use for higher frequencies.
Each output stage has its own short circuit detection block. For more details about short circuit detection see
Chapter 5.2.1.
100Ω
To Vbat
VS
INH
CL1 CH1
CB1 CL2 CH2
Charge pump 2
VDH
CB2
Charge pump 1
CB2
SCD
UVLO
Under voltage lock out
Error logic
Reset
+
-
ERR1
ERR2
ENA
Power On Reset
Under voltage
Over voltage
Over temperature
Short circuit+disable
GHx
SHx
VSCP
+3.3V
Level
shifter
SCD
SCD
Floating HS driver 3x
CB1
SCD
R1
SCDL
SCD
lock
/ unlock
R2
short circuit filter
IH1
IL1
IH2
IL2
IH3
IL3
+
-
ON
ON
/
/
OFF
OFF
Input logic
GLx
SLx
shoot through
protection
VSCP
Level
shifter
dead time
Floating LS driver 3x
Shuntx
P-GND
GND
Figure 3
Block Diagram of Driver Stages including Short Circuit Detection
Data Sheet
12
Rev. 2.2, 2016-01-28
TLE7189F
Description and Electrical Characteristics
5.1.2
Operation at Vs<12V - Integrated Charge Pumps
The TLE7189F provides a feature tailored to the requirements in 12V automotive applications. Often the operation
of an application has to be assured even at 9V supply voltage or lower. Normally bridge driver ICs provide in such
conditions clearly less than 9V to the gate of the external MOSFETs, increasing their RDSon and the associated
power dissipation.
The TLE7189F has two charge pump circuitries for external capacitors.
The operation of the charge pumps is independent upon the pulse pattern of the MOSFETs.
The output of the charge pumps are regulated. The first charge pump doubles the supply voltage as long as it is
below 8V. At 8V supply voltage and above, charge pump 1 regulates its output to 15V typically. Above 15V supply
voltage, the output voltage of charge pump 1 will increase linearly. Yet, the output will not exceed 25V.
Charge pump 2 is regulated as well but it is pumped to the voltage on Vs. Normally VDH and Vs are in the same
voltage range. The driver is not designed to have significant different voltages at VDH compared to Vs. This would
lead to reduced supply voltages for the high side output stages.
Charge pump 1 supplies the low side MOSFETS and output stages for the low side MOSFETs with sufficient
voltage to assure 10V at the MOSFETs´ gate even if the supply voltage is below 10V. Charge pump 2 supplies
the output stages for the high side MOSFETs with sufficient voltage to assure 10V at the MOSFETs´ gate. In
addition, the charge pump 1 supplies most of the internal circuits of the driver IC, including charge pump 2. Output
of charge pump 1 is the buffer capacitor CB1 which is referenced to GND.
Charge pump 2 supplies the high side MOSFETs and the output stages for the high side MOSFETs with sufficient
voltage to assure 10V at the high side MOSFET gate. Output of charge pump 2 is buffer capacitor CB2 which is
referenced to VDH.
This concept allows to drive all external MOSFETs in the complete duty cycle range of 0 to 100% without taking
care about recharging of any bootstrap capacitors.
This simplifies the use in all applications especially in motor drives with block wise commutation.
The charge pumps are only deactivated when the device is put into sleep mode via INH.
The size of the charge pump capacitors (pump capacitors CPx as well as buffer capacitors CBx) can be varied
between 1µF and 4.7µF. Yet, larger capacitor values result in higher charge pump voltages and less voltage ripple
on the charge pump buffer capacitors CBx (which supply the internal circuits as well as the external MOSFETs,
pls. see above). Besides the capacitance values the ESR of the buffer capacitors CBx determines the voltage
ripple as well. It is recommended to use buffer capacitors CBx that have small ESR.
Pls. see also Chapter 5.1.3 for capacitor selection.
5.1.3
Sleep Mode
When the INH pin is set to low, the driver will be set to sleep mode. The INH pin switches off the complete supply
structure of the device and leads finally to an under voltage shut down of the complete driver. Enabling the device
with the INH pin means to switch on the supply structure. The device will run through power on reset during wake
up. It is recommended to perform a Reset by ENA after Wake up to remove possible ERR signals; Reset is
performed by keeping ENA pin low until the charge pump voltages have ramped up.
Enabling and disabling with the INH pin is not very fast. For fast enable / disable the ENA pin is recommended.
When the TLE7189F is in INH mode (INH is low) or when the supply voltage is not available on the Vs pin, then
the driver IC is not supplied, the charge pumps are inactive and the charge pump capacitors are discharged. Pin
CB2 (+ terminal of buffer capacitor 2) will decay to GND. When the battery voltage is still applied to VDH (- terminal
of buffer capacitor 2) the buffer capacitor 2 will slowly charged to battery voltage, yet with reversed polarity
compared to the polarity during regular operation. Hence, it is important to use a buffer capacitor 2 (CB2) that can
withstand both, +25 V during operation mode and -VBAT during INH mode, e.g. a ceramic capacitor. In case of load
dump during INH mode, the negative voltage across CB2 will be clamped to -31 V (CB2 referenced to VDH).
Data Sheet
13
Rev. 2.2, 2016-01-28
TLE7189F
Description and Electrical Characteristics
5.1.4
Electrical Characteristics
Electrical Characteristics MOSFET drivers - DC Characteristics
VS = 5.5 to 20V, Tj = -40 to +150 °C, fPWM < 25kHz, all voltages with respect to ground, positive current flowing into
pin (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
5.1.1
5.1.2
Low level output voltage
High level output voltage
VG_LL
–
9
–
–
0.2
13
V
V
I
Load=30mA
VS=8... 20V;
Load=-2mA
VS=5.5... 8V;
Load=-2mA
VS=5.5... 8V;
VG_HL1
I
5.1.3
5.1.4
5.1.5
5.1.6
High level output voltage, Low Side VG_HL2
High level output voltage, High Side VG_HL3
High level output voltage difference dVG_H
7.5
6.5
–
–
–
–
–
13
V
V
V
V
I
13
I
Load=-2mA
1.0
0.2
I
Load=-100mA;
VS=20V
Gate drive output voltage
VGS_D
–
V
V
ENA=low or
VCT=high;
5.5V<VS<28V
Load=10mA
UVLO; VS<=5.5V;
Load=2mA
I
5.1.7
5.1.8
5.1.9
Gate drive output voltage
Tj=-40°C
Tj=25°C
VGS1
–
–
–
–
–
–
V
V
V
1.4
1.2
1.0
I
Tj=150°C
Gate drive output voltage high side VGS2
Over voltage or
VS=open or
Tj=-40°C
Tj=25°C
Tj=150°C
1.4
1.2
1.0
V
INH=low;
Load=2mA
Over voltage;
Load=2mA
I
Gate drive output voltage low side VGS3
0.2
I
5.1.10 Low level input voltage of Ixx, ENA VI_LL
5.1.11 High level input voltage of Ixx, ENA VI_HL
–
–
1.0
–
V
–
2.0
50
100
–
–
V
–
5.1.12 Input hysteresis of IHx, ILx, ENA
5.1.13 Input hysteresis of IHx, ILx, ENA
5.1.14 Low level input voltage of INH
5.1.15 High level input voltage of INH
5.1.16 IHx pull up resistor
dVI1
dVI2
VI_LL
VI_HL
RIHx
–
–-
mV
mV
V
VS=5.5... 8V
200
–
–-
VS=8... 20V
0.75
–
–
–
2.1
18
18
27
–
–
V
30
30
45
5
42
42
63
–
kΩ
kΩ
kΩ
μA
mA
V
IHx<5.5V
VILx<5.5V
VINH; VENA<5.5V
5.1.17 ILx pull down resistor
RILx
5.1.18 INH, ENA pull down resistor
5.1.19 Quiescent current VDH
RINEN
IQVDH
ISHx
25°C; VINH=low
5.1.20 Output bias current SHx
-1.6
-1.0
-0.3
VS=5.5...20V;
V
SHx=0...(VS+1);
VILx=low; VIHx=high
5.1.21 Output bias current SLx
ISLx
-1.6
-1.0
-0.3
mA
VS=5.5...20V;
V
SLx=0...7V;
VILx=low; VIHx=high
Data Sheet
14
Rev. 2.2, 2016-01-28
TLE7189F
Description and Electrical Characteristics
Electrical Characteristics MOSFET drivers - Dynamic Characteristics
VS = 5.5 to 20V, Tj = -40 to +150 °C, fPWM < 25kHz, all voltages with respect to ground, positive current flowing into
pin (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
220
–
Typ.
400
-1.5
Max.
5.1.22 Fixed internal dead time
5.1.23 Turn on current, peak
tDT
600
–
ns
A
–
IG(on)1
V
Gxx-VSxx=0V;
VS=8...20V;
Load=22nF;
C
R
Load=1Ω
5.1.24 Turn on current, peak
5.1.25 Turn off current, peak
IG(on)2
IG(off)
tG_rise
–
–
–
-0.8
1.5
–
–
A
V
Gxx-VSxx=0V;
VS=5.5...8V;
Load=22nF;
C
R
Load=1Ω
A
V
Gxx-VSxx=10V;
VS=8...20V;
Load=22nF;
Load=1Ω
Load=22nF;
Load=1Ω
C
R
5.1.26 Rise time (20-80%)
Tj = -40°C
ns
C
400
400
700
R
150
150
Tj = 25°C
Tj = 150°C
5.1.27 Fall time (20-80%)
Tj = -40°C
tG_fall
–
ns
C
R
Load=22nF;
Load=1Ω;
230
230
500
Tj = 25°C
Tj = 150°C
5.1.28 Input propagation time (low on)
5.1.29 Input propagation time (low off)
5.1.30 Input propagation time (high on)
5.1.31 Input propagation time (high off)
tP(ILN)
tP(ILF)
tP(IHN)
tP(IHF)
tP(an)
90
0
190
100
190
100
–
290
200
290
200
70
ns
ns
ns
ns
ns
C
Load=22nF;
R
Load=1Ω
90
0
5.1.32 Absolute input propagation time
difference (all channels turn on)
–
5.1.33 Absolute input propagation time
difference (all channels turn off)
tP(af)
–
–
–
–
–
–
–
–
–
–
–
–
50
ns
ns
ns
ns
ns
ms
5.1.34 Absolute input propagation time
difference (1channel high off - low on)
tP(1hfln)
tP(1lfhn)
tP(ahfln)
tP(alfhn)
tINH_Pen1
180
180
180
180
20
C
Load=22nF;
R
Load=1Ω
5.1.35 Absolute input propagation time
difference (1channel low off - high on)
5.1.36 Absolute input propagation time
difference (all channel high off - low on)
5.1.37 Absolute input propagation time
difference (all channel low off - high on)
5.1.38 Wake up time; INH low to high
Driver fully
functional;
VS=6.5...8V;
V
ENA=low;
C
CPx=CCBx=4,7µF
Data Sheet
15
Rev. 2.2, 2016-01-28
TLE7189F
Description and Electrical Characteristics
Electrical Characteristics MOSFET drivers - Dynamic Characteristics
VS = 5.5 to 20V, Tj = -40 to +150 °C, fPWM < 25kHz, all voltages with respect to ground, positive current flowing into
pin (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
5.1.39 Wake up time; INH low to high
tINH_Pen2
–
–
10
10
5
ms
Driver fully
functional;
VS=8...20V;
V
ENA=low;
C
CPx=CCBx=4,7µF
5.1.40 Wake up time logic functions; INH low tINH_log
–
–
–
–
ms
ms
Driver fully
functional;
VS=6.5...8V;
to high
V
ENA=low;
C
CPx=CCBx=4,7µF
5.1.41 Wake up time logic functions; INH low tINH_log
Driver fully
functional;
VS=8...20V;
to high
V
ENA=low;
C
CPx=CCBx=4,7µF
5.1.42 INH propagation time to disable the
output stages
tINH_Pdi1
tINH_Pdi2
tINH_Pdi3
VVsWU
fCP
–
–
10
8
µs
µs
µs
V
VS=5.5...8V
VS=8...20V
–
5.1.43 INH propagation time to disable the
output stages
–
–
5.1.44 INH propagation time to disable the
entire driver IC
–
–
300
–
5.1.45 Supply voltage Vs for Wake up
6.5
38
–
diagnostic,
OpAmp working
5.1.46 Charge pump frequency
55
72
kHz
–
Data Sheet
16
Rev. 2.2, 2016-01-28
TLE7189F
5.2
Protection and Diagnostic Functions
Short Circuit Protection
5.2.1
The TLE7189F provides a short circuit protection for the external MOSFETs. It is a monitoring of the drain-source
voltage of the external MOSFETs. As soon as this voltage is higher than the short circuit detection limit, a capacitor
will be charged. The high side and the low side output stage of the same half bridge use the same capacitor (see
Figure 3 ). This capacitor is discharged permanently with a current which is about 2 times smaller than the
charging current. This charging and discharging ratio is specified with the help of duty cycle where a short is
detected or not detected.
After a delay of about 12µs all external MOSFETs will be switched off until the driver is reset by the ENA pin. The
error flag is set.
The drain-source voltage monitoring of the short circuit detection for a certain external MOSFET is active as soon
as the corresponding input is set to "on" and the dead time is expired.
The short circuit detection level is adjustable in an analogue manner by the voltage setting at the SCDL pin. There
is a 1:1 translation between the voltage applied to the SCDL pin and the drain-source voltage limit. E.g. to trigger
the SCD circuit at 1V drain-source voltage, the SCDL pin must be set to 1V as well. The drain-source voltage limit
can be chosen between 0.7 ... 2.5V.
If the SCDL pin is left open, the short circuit detection level will be set internally to a specified value. In case SCDL
is connected to GND the detection level is low. If SCDL is connected to 3.3V, the detection level is about 3.2V.
In the TLE7189F the short circuit detection functionality can be tested by setting the SCDL pin to voltages lower
than 0.4V, switching off the low side MOSFETs and switching on one or more high side MOSFETs. In this test, a
short circuit will be detected even without current in the external MOSFET (VDH-SHx > VTSCD1).
This test function can be used as well to detect an open VDH pin. If VDH is open during this test, no SCD error
will be reported.
A setting of 5V at the SCDL pin will disable the short circuit protection function.
5.2.2
Dead Time and Shoot Through Protection
In bridge applications it has to be assured that the external high side and low side MOSFETs are not "on" at the
same time, connecting directly the battery voltage to GND. The dead time generated in the TLE7189F is fixed to
a minimum value. This function assures a minimum dead time if the input signals coming from the µC are faulty.
The exact dead time of the bridge is usually controlled by the PWM generation unit of the µC.
In addition to this dead time, the TLE7189F provides a locking mechanism, avoiding that both external MOSFETs
of one half bridge can be switched on at the same time. This functionality is called shoot through protection.
If the command to switch on both high and low side switches in the same half bridge is given at the input pins, the
command will be ignored. The conflicting input signals will not generate an error message.
5.2.3
Under Voltage Shut Down
The TLE7189F has an integrated under voltage shut down, to assure that the behavior of the device is predictable
in all voltage ranges.
If the voltage of a charge pump buffer capacitors CBx reaches the under voltage shut down level for a minimum
specified filter time, the gate-source voltage of all external MOSFETs will be actively pulled to low. In this situation
the short circuit detection of this output stage is deactivated to avoid a latching shut down of the driver.
As soon as the charge pump buffer voltage recovers, the output stage condition will be aligned to the input patterns
automatically.This allows to continue operation of the motor in case of under voltage shut down without a reset by
the µC.
Data Sheet
17
Rev. 2.2, 2016-01-28
TLE7189F
Under voltage shut down will not occur when VS > 6V, QG < 250nC, fPWM < 25kHz, and the charge pump capacitors
Cxx = 4.7 µF.
5.2.4
Over Voltage Shut Down
The TLE7189F has an integrated over voltage shut down to avoid destruction of the IC at high supply voltages.The
voltage is measured at the Vs and the VDH pin. When one of them or all of them exceed the over voltage shut
down level for more than the specified filter time then the external MOSFETs are switched off. In addition, over
voltage will shut down the charge pumps and will discharge the charge pump capacitors. This results in an under
voltage condition which will be indicated on the ERRx pins. During over voltage shut down the external MOSFETs
and the charge pumps remain off until a reset is performed.
5.2.5
Over Temperature Warning
If the junction temperature is exceeding typ. 155°C an error signal is given as warning. The driver IC will continue
to operate in order not to disturb the application.
The warning is removed automatically when the junction temperature is cooling down.
It is in the responsibility of the user to protect the device against over temperature destruction.
5.2.6
VCC Check
To assure a high level of system safety, the TLE7189F provides an VCC check.
The 5.0V system supply connected to the VS_OA pin is checked by an internally monitoring for over- and under
voltage. An internal filter time is integrated to avoid faulty triggering.
The VCC check is active when the signal on the ENA pin is high and inactive when ENA signal is low (=driver IC
disabled).
In case of under- or over voltage at VS_OA, the VCC check will disable the driver IC and is latched. To restart the
output stages, a reset has to be performed with the ENA pin.
The VCT pin decides about the over voltage and under voltage detection level.
5.2.7
ERR Pins
The TLE7189F has two status pins to provide diagnostic feedback to the µC. The outputs of these pins are 5V
push pull stages, they are either High or Low.
Table 2
Overview of error conditions
INH
ENA
High
High
High
High
Low
X
ERR1
Low
ERR2
Low
Driver conditions
High
High
High
High
High
Low
Under voltage or VCC check error
Over temperature or over voltage
Short circuit detection
Low
High
Low
High
High
High
Low
High
High
Low
No errors observed
No errors will be reported
ERR output tristate - low secured by pull down
Table 3
Behavior at different error conditions
Error condition
Short circuit detection
Under voltage
restart behavior
Latch, reset must be performed at ENA pin All external Power -MOSFETs
Auto restart All external Power -MOSFETs
Latch, reset must be performed at ENA pin All external Power -MOSFETs
Shuts down...
Over voltage
Data Sheet
18
Rev. 2.2, 2016-01-28
TLE7189F
Error condition
Over temperature warning Self clearing
VCC check
restart behavior
Shuts down...
Nothing
Latch, reset must be performed at ENA pin All external Power -MOSFETs
Note:All errors do NOT lead to sleep mode. Sleep mode is only initiated with the INH pin. The latch and restart
behavior allows to distinguish between the different error types combined at the ERR signals.
Table 4
Priorisation of Errors
Priority
Error
1
2
3
4
5
VCC check
Short circuit detection
Under voltage detection
Over voltage detection
Over temperature
Reset of ERROR registers and Disable
The TLE7189F can be reset with the help of the enable pin ENA. If the ENA pin is pulled to low for a specified
minimum time, the error registers are cleared and the external MOSFETs are switched off actively.
During disable only the errors under voltage shut down and over temperature warning are shown. Other errors are
not displayed.
5.2.8
Electrical Characteristics
Electrical Characteristics - Protection and diagnostic functions
VS = 5.5 to 20V, Tj = -40 to +150 °C, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
Over temperature
5.2.1
5.2.2
Over temperature warning
Tj(OW)
135
–
155
20
175
–
°C
°C
–
–
Hysteresis for over temperature
warning
dTj(OW)
Short circuit detection
5.2.3
5.2.4
Filter time of short circuit protection tSCP(off)
Maximum duty cycle for no SCD1) DSCDmax
8
–
12
–
16
30
µs
%
Default
f
PWM=100kHzatIHx
or ILx and at static
applied SC
5.2.5
minimum duty cycle for periodic
SCD1)
DSCDmin 70
–
–
%
fPWM=100 kHz at
IHx or ILx and at
static applied SC
5.2.6
5.2.7
Voltage range on VSCD pin to
adjust the Vds limit
VSCDLa1 0.7
–
–
2.5
V
V
Short circuit
detection is active
Short circuit detection level
VSCDLa2 2.64
3.63
Short circuit
detection is active
V
SCDL=3.3V
Data Sheet
19
Rev. 2.2, 2016-01-28
TLE7189F
Electrical Characteristics - Protection and diagnostic functions (cont’d)
VS = 5.5 to 20V, Tj = -40 to +150 °C, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
VSCDL(dis) 4.5
Typ.
Max.
5.2.8
Short circuit disable voltage at
VSCD pin
–
5.5
V
Short circuit
detection is
disabled
5.2.9
Accuracy of SCD
ASC(off)1
ASC(off)2
0.85
–
–
1.15
1.3
–
–
V
2.5V
SCDL(off) set to 1...
(VSCDL /VDS(off)
5.2.10 Accuracy of SCD
(VSCDL /VDS(off)
)
0.7
V
1V
SCDL(off) setto0.7...
)
5.2.11 SCDL pull up resistor
5.2.12 SCDL pull down resistor
5.2.13 SCDL default voltage
Test of short circuit detection
RSCDU
RSCDD
VSCDLop
–
–
–
400
160
1.4
–
–
–
kΩ
kΩ
V
Not tested
Not tested
Open pin
VSCDT
5.2.14 SCDL voltage for SCD test
activation
–
–
0.4
V
–
–
tSCDT
5.2.15 Filter time for SCD test activation
0.5
-80
2.5
–
–
–
µs
VTSCD1
5.2.16 VDH-SHx voltage for SCD
detection in SCD test mode
mV
VTSCD2
5.2.17 VDH-SHx voltage with no SCD
detection in SCD test mode
–
–
-350
mV
ERR pins
5.2.18 High level output voltage of ERRx VOHERR
5.2.19 Low level output voltage of ERRx VOLERR
4.0
-0.1
2.7
–
–
–
5.2
0.4
112
V
I
I
V
Load= -0.2mA
Load= 0.2mA
V
RERR
ERR<5.5V; VINH=low
5.2.20 ERR pull down resistor
kΩ
tPD(ERR)
5.2.21 Propagation time difference ERR1
and ERR2
–
–
200
ns
–
Over- and under voltage
5.2.22 Over voltage shut down
5.2.23 Over voltage filter time
5.2.24 Under voltage shut down CB1
5.2.25 Under voltage shut down CB2
VOV(off)
tOV
28
30
7.4
4.6
–
–
33
60
9.0
6.8
–
V
–
–
–
µs
V
VUV1
8.2
–
CB1 to GND
CB2 to VDH
–
VUV2
V
5.2.26 Hysteresis of under voltage shut
down on CB1 and CB2
VHUV1,2
1.0
V
5.2.27 Under voltage filter time on CB1
and CB2
tUV
3.5
5
7
µs
–
Enable and reset
5.2.28 Reset time to clear ERR registers tRes1
3.0
–
–
–
–
–
µs
µs
µs
–
–
–
5.2.29 Low time of ENA signal without
reset
tRes0
1.0
4.0
5.2.30 ENA propagation time (for enable / tPENA
–
disable)
Data Sheet
20
Rev. 2.2, 2016-01-28
TLE7189F
Electrical Characteristics - Protection and diagnostic functions (cont’d)
VS = 5.5 to 20V, Tj = -40 to +150 °C, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
5.2.31 Return time to normal operation at tAR
–
–
1.0
µs
–
auto-restart
VCC Check
5.2.32 Under voltage detection level
5.2.33 Over voltage detection level
5.2.34 Over voltage detection level
VVCU
4.3
5.3
3.3
10
–
–
4.7
5.8
4.3
25
1.0
–
V
V
V
V
–
VCT=low
VCT=low
VCT=high
VVCOl
VVCOh
–
V
–
V
5.2.35 Over- and under voltage filter time tVC
–
µs
V
5.2.36 Low level input voltage of VCT
5.2.37 High level input voltage of VCT
5.2.38 VCT pull down resistor
VVCT_LL
–
–
VVCT_HL 2.0
–
V
–
RVCT
V
VCT<5.5V
27
45
63
kΩ
tVCT
5.2.39 Filter time for VCT test
1.3
2
3.0
µs
–
1) Parameters describe the behavior of the internal SCD circuit. Therefore only internal delay times are considered. In
application dead-/ delay times determined by application circuit (switching times of MOSFETs, adjusted dead time) have
to be considered as well.
Data Sheet
21
Rev. 2.2, 2016-01-28
TLE7189F
5.3
Shunt Signal Conditioning
The TLE7189F incorporates three fast and precise operational amplifiers for conditioning and amplification of the
shunt signals sensed in the three phases. Additionally, one reference bias buffer is integrated to provide an
adjustable bias reference for the three OpAmps. The voltage divider on the VRI pin should be less than 50 kΩ, the
filtering capacitor less than 1.2 µF - if needed at all. The gain of the OpAmps is adjustable by external resistors
within a range of 3 to 20 or more, as long as the band width satisfies the need of the application.
In the circuit example below VO1 provides the reference voltage VVRO, when the shunt voltage is zero. VVRO is
normally half of the regulated voltage provided from an external voltage regulator for the ADC used to read the
current sense signal. The additional buffer allows bi-directional current sensing and permits the adaptation of the
reference bias to different µC I/O voltages. The reference buffer assures a stable reference voltage even in the
high frequency range.
The reference bias buffer is used for all of the OpAmps. The OpAmps of the TLE7189F demonstrate low offset
voltages and very little drift over temperature, thus allowing accurate phase current measurements.
3.3V
Adjustable
bias
reference
CVRI < 1.2 µF (if needed)
RVRI
VRI
RVRI < 50 kOhm
CVRI
RVRI
+
VRO
Rfb
Bias
Reference
-
Rfb
Rs
Rfb
ISP1
+
I-DC Link
OpAmp1
Shunt
Rs
-
ISN1
Rfb
TLE7189
Rs
+
ISP2
ISN2
I-DC Link
Rs
OpAmp2
-
Dependent on
customer specific
requirements additional
filtering can be
necessary
Rs
Rs
+
ISP3
ISN3
I-DC Link
OpAmp3
-
VO3 VO2
VO1
1k
1k
to ADCs
Figure 4
Shunt Signal Conditioning Block Diagram
Data Sheet
22
Rev. 2.2, 2016-01-28
TLE7189F
5.3.1
Electrical Characteristics
Electrical Characteristics - Current sense signal conditioning
VS = 5.5 to 20V, VVSOA = 5V, Tj = -40 to +150 °C, fPWM < 25kHz, all voltages with respect to ground, positive current
flowing into pin (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
100
5
Typ.
500
–
Max.
5.3.1
5.3.2
5.3.3
Series resistors
RRS
1000
20
Ω
–
–
–
Resistor ratio (gain ratio)
Resistor ratio (gain ratio)
R
R
Rfb/RRS1
Rfb/RRS2
1kΩ and 200pF at
VOx
3
–
20
–
5.3.4
5.3.5
5.3.6
5.3.7
Input differential voltage (ISPx -
ISNx)
VIDR
-800
-800
-800
-1.58
–
–
–
–
800
mV
mV
mV
mV
–
Input voltage (Both Inputs - GND) VLL1
(ISP - GND) or (ISN -GND)
2200
1500
1.28
VS=8 ... 20V
Input voltage (Both Inputs - GND) VLL2
(ISP - GND) or (ISN -GND)
Input offset voltage of the I-DC link VIO1
OpAmp, including drift over
temperature range
RRS=500Ω;
V
V
CM=0V;VO=1.65V;
VRI=1.65V
5.3.8
5.3.9
Input offset voltage of reference
buffer
VIO2
-3
–
2
mV
–
VRI input range
VRI
IIB
1.2
–
–
2.6
–
V
–
5.3.10 Input bias current
-300
µA
V
CM=0V;
VOx=open
V
VRI=1.65V
5.3.11 Input bias current of reference
buffer
IIBRB
0.6
1.4
2.4
µA
V
VRI=1.2 ... 2.6V;
5.3.12 High level output voltage of VOx
5.3.13 Low level output voltage of VOx
5.3.14 Output voltage of VOx
VOH
VOL
VOR
4.0
–
–
4.5
V
V
V
IOx=-3mA;
VRI=1.2 ... 2.6V;
IOx=3mA
IN(SS)=0V;
Gain=15;
VRI=1.65V
V
-0.1
0.2
V
1.623 1.65
1.668
V
5.3.15 Output short circuit current
5.3.16 Differential input resistance1)
5.3.17 Common mode input capacitance1)
ISC
–
–
–
–
–
-5
–
mA
kΩ
pF
db
short to GND
RRI
100
–
–
10
–
10kHz
–
CICM
CMRR
5.3.18 Common mode rejection ratio at
80
DC
CMRR =
20*Log((Vout_diff/Vin_diff) *
(Vin_CM/Vout_CM))
5.3.19 Common mode suppression2) with
CMS = 20*Log(Vout_CM/Vin_CM)
Freq =100kHz
–
–
db
VIN=360mV*
sin(2*π*freq*t);
RRS=500Ω;
CMS
62
43
33
Freq = 1MHz
Freq = 10MHz
R
V
Rfb=7500Ω;
VRI=1.65, 2.5V
Data Sheet
23
Rev. 2.2, 2016-01-28
TLE7189F
Electrical Characteristics - Current sense signal conditioning (cont’d)
VS = 5.5 to 20V, VVSOA = 5V, Tj = -40 to +150 °C, fPWM < 25kHz, all voltages with respect to ground, positive current
flowing into pin (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
5.3.20 Slew rate
ISC
–
10
–
V/µs
Gain>= 5;
R
Load=1.0kΩ;
CLoad=500pF
5.3.21 Large signal open loop voltage gain AOL
80
10
–
100
20
–
–
–
dB
MHz
°
–
(DC)
5.3.22 Unity gain bandwidth
R
C
Load=1kΩ;
Load=100pF
Gain>= 5;
Load=1kΩ;
Load=100pF
Load=1kΩ;
Load=100pF
Gain=15;
Load=1kΩ;
Load=500pF;
GBW
5.3.23 Phase margin1)
ΦM
50
R
C
5.3.24 Gain margin1)
5.3.25 Bandwidth
AM
–
12
–
–
–
db
R
C
BWG
1.6
MHz
R
C
RRS=500Ω
5.3.26 Output settle time to 98%
5.3.27 Output rise time 10% to 90%
5.3.28 Output fall time 90% to 10%
tset
–
–
–
1
–
–
1.8
1
µs
µs
µs
Gain=15;
R
C
Load=1kΩ;
Load=500pF;
tIrise
tIfall
1
0.2<VVO< 4.0V;
RRS=500Ω
1) Not subject to production test; specified by design
2) Without considering any offsets such as input offset voltage, internal miss match and assuming no tolerance error in
external resistors.
Data Sheet
24
Rev. 2.2, 2016-01-28
TLE7189F
Application Description
6
Application Description
In the automotive sector there are more and more applications requiring high performance motor drives, such as
electro-hydraulic or electric power steering. In these applications 3 phase motors, synchronous and
asynchronous, are used, combining high output performance, low space requirements and high reliability.
Reverse
polarity
switch
VS=12V
RVS
10 Ω *)
C
xxxx µF
P-GND
RVDH
100 Ω
V_Bridge
INH VS VDH
VS_OA
>2 Ω
SCDL
VRI
GH1
SH1
>2 Ω
>2 Ω
GH2
SH2
GH3
SH3
CH2
CCP2
1µF
CL2
CB2
CCB2
1 µF
ceramic
TLE7189
V_Bridge
CH1
CCP1
1 µF
µC
>2 Ω
CL1
CB1
and/or
System
ASIC
GL1
SL1
CCB1
2.2µF
see 4.1.2: all
pump capacitors
1μF to 4.7μF
>2 Ω
>2 Ω
GL2
SL2
ENA
ERR1
ERR2
RERR *)
RERR *)
GL3
SL3
IL1
IH1
IL2
IH2
VRO
ISP3
IL3
IH3
ISP2
ISP1
VCT
Shunt
ISN3
ISN2
ISN1
VO3
VO2
VO1
GND
GND
RO *)
capacitors for
shunt signal
conditioning only if
additional filtering
is desired
*) see max. Ratings
P-GND
Figure 5
Application Circuit - TLE7189F
Note:This is a very simplified example of an application circuit. The function must be verified in the real application.
Data Sheet
25
Rev. 2.2, 2016-01-28
TLE7189F
Application Description
6.1
Layout Guide Lines
Please refer also to the simplified application example.
•
•
•
Three separated bulk capacitors CB should be used - one per half bridge
Three separated ceramic capacitors CC should be used - one per half bridge
Each of the 3 bulk capacitors CB and each of the 3 ceramic capacitors CC should be assigned to one of the half
bridges and should be placed very close to it
•
•
The components within one half bridge should be placed close to each other: high side MOSFET, low side
MOSFET, bulk capacitor CB and ceramic capacitor CC (CB and CC are in parallel) and the shunt resistor form
a loop that should be as small and tight as possible. The traces should be short and wide
The three half bridges can be separated; yet, when there is one common GND referenced shunt resistor for
the three half bridges the sources of the three low side MOSFETs should be close to each other and close to
the common shunt resistor
•
•
•
VDH is the sense pin used for short circuit detection; VDH should be routed (via Rvdh) to the common point
of the drains of the high side MOSFETs to sense the voltage present on drain high side
CB2 is the buffer capacitor of charge pump 2; its negative terminal should be routed to the common point of
the drains of the high side MOSFETs as well - this connection should be low inductive / resistive
Additional R-C snubber circuits (R and C in series) can be placed to attenuate/suppress oscillations during
switching of the MOSFETs, there may be one or two snubber circuits per half bridge, R (several Ohm) and C
(several nF) must be low inductive in terms of routing and packaging (ceramic capacitors)
the exposed pad on the backside of the VQFN is recommended to connect to GND
•
Data Sheet
26
Rev. 2.2, 2016-01-28
TLE7189F
Package Outlines
7
Package Outlines
Figure 6
PG-VQFN-48
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant with
government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e
Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
You can find all of our packages, sorts of packing and others in our
Dimensions in mm
Infineon Internet Page “Products”: http://www.infineon.com/products.
Data Sheet 27
Rev. 2.2, 2016-01-28
TLE7189F
Revision History
8
Revision History
Version
Date
Changes
V0.1
V1.0
V2.0
V2.1
2005-11
Proposal for Target Data Sheet
Preliminary Data Sheet
Data Sheet
2007-02-26
2007-03-29
2007-05-30
5.1.25 + 26: turn on current - sign changed
5.3.10: Input bias current - sign changed
5.3.15: Output short circuit current - sign changed
Description of OpAmp slightly changed
Names of some parameters changed
V2.2
2016-01-28
package adjustments
Data Sheet
28
Rev. 2.2, 2016-01-28
Edition 2016-01-28
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2016 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances. For information on the types in
question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support
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and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
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