TLE72702EXUMA1 [INFINEON]
Fixed Positive LDO Regulator, 5V, 0.3V Dropout, PDSO14, GREEN, PLASTIC, SSOP-14;
| 型号： | TLE72702EXUMA1 |
| 厂家： | 
Infineon |
| 描述： | Fixed Positive LDO Regulator, 5V, 0.3V Dropout, PDSO14, GREEN, PLASTIC, SSOP-14 光电二极管 输出元件 调节器 |
| 文件： | 总20页 (文件大小：378K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Data Sheet, Rev. 1.01, July 2009
TLE7270-2
5-V Low Dropout Voltage Regulator
Automotive Power
5-V Low Dropout Voltage Regulator
TLE7270-2
1
Overview
Features
•
•
•
•
•
•
•
•
•
•
•
Ultra Low Current Consumption 20 µA
Output Voltage 5 V 2%
Output Current up to 300 mA
Power-On and Undervoltage Reset
Reset Low Down to VQ = 1 V
Very Low Dropout Voltage
Output Current Limitation
Overtemperature Shutdown
Wide Temperature Range From -40 °C up to 150 °C
Green Product (RoHS compliant)
AEC Qualified
PG-SSOP-14 Exposed Pad
Description
The TLE7270-2 is a monolithic integrated low dropout voltage regulator
for load currents up to 300 mA. An input voltage up to 42 V is regulated
to VQ,nom = 5.0 V with a precision of 2%. Due to its integrated reset
circuitry featuring power on timing and output voltage monitoring the IC is
well suited as µ-controller supply. The sophisticated design allows to
achieve stable operation even with ceramic output capacitors down to
470 nF. The device is designed for the harsh environment of automotive
applications. Therefore it is protected against overload, short circuit and
overtemperature conditions by the implemented output current limitation
and the overtemperature shutdown circuit. The TLE7270-2 can be also
used in all other applications requiring a stabilized 5 V voltage.
PG-TO252-5
Due to its ultra low quiescent current of typically 20 µA the TLE7270-2 is
dedicated for use in applications permanently connected to VBAT. An
integrated output sink current circuitry keeps the voltage at the Output pin
Q below 5.5 V even in case of occuring reverse currents. Thus connected
devices are protected from overvoltage damage. For applications
requiring extremely low noise levels the Infineon voltage regulator family
TLE 42XX and TLE 44XX is more suited than the TLE7270-2. A mV-
range output noise on the TLE7270-2 caused by the charge pump
operation is unavoidable due to the ultra low quiescent current concept.
PG-TO263-5
Type
Package
PG-SSOP-14 Exposed Pad
PG-TO252-5
PG-TO263-5
Marking
7270-2E
7270-2D
7270-2G
TLE7270-2E
TLE7270-2D
TLE7270-2G
Data Sheet
2
Rev. 1.01, 2009-07-23
TLE7270-2
Block Diagram
2
Block Diagram
TLE7270-2
I
Q
Overtemperature
Shutdown
Reset
Generator
with
RO
DT
Bandgap
Selectable
Timing
1
Reference
Charge
Pump
GND
AEB 03520.VSD
Figure 1
Block Diagram
Data Sheet
3
Rev. 1.01, 2009-07-23
TLE7270-2
Pin Configuration
3
Pin Configuration
3.1
Pin Assignment PG-SSOP-14 Exposed Pad
ꢁ
ꢂ
ꢃ
ꢄ
ꢅ
ꢆ
ꢇ
ꢁꢄ
ꢁꢃ
ꢁꢂ
ꢁꢁ
ꢁꢉ
ꢈ
QꢀFꢀ
52
QꢀFꢀ
QꢀFꢀ
,
QꢀFꢀ
QꢀFꢀ
*1'
QꢀFꢀ
'7
QꢀFꢀ
4
ꢊ
QꢀFꢀ
QꢀFꢀ
7/(ꢇꢂꢇꢉꢋꢂB3,1&21),*B6623ꢋ
ꢁꢄꢀ69*
Figure 2
Pin Configuration (top view)
3.2
Pin Definitions and Functions PG-SSOP-14 Exposed Pad
Pin No.
Symbol Function
1,3,5,7
n.c.
non connected
can be open or connected to GND
2
RO
Reset Output
open collector output with integrated pull-up resistor;
optional external pull-up resistor of ≥ 10 kΩ to pin Q;
leave open if reset function not needed
4
6
GND
DT
Ground
Delay Timing
connect to GND or Q to choose the Power On Reset Delay Time
8,10,11,12,14 n.c.
non connected
can be open or connected to GND
9
Q
Output
block to ground with a capacitor close to the IC terminals, respecting the values given
for its capacitance and ESR in “Functional Range” on Page 6
13
I
Input
block to ground directly at the IC with a ceramic capacitor
Pad
–
Exposed Pad
connect to GND and heatsink area
Data Sheet
4
Rev. 1.01, 2009-07-23
TLE7270-2
Pin Configuration
3.3
Pin Assignment PG-TO252-5, PG-TO263-5
GND
Ι
Q
GND
RO DT
I
RO
DT Q
AEP02825_7270
IEP02528
Figure 3
Pin Configuration (top view)
3.4
Pin Definitions and Functions PG-TO252-5, PG-TO263-5
Pin No.
Symbol Function
1
I
Input
block to ground directly at the IC with a ceramic capacitor
2
RO
Reset Output
open collector output with integrated pull-up resistor;
optional external pull-up resistor of ≥ 10 kΩ to pin Q;
leave open if reset function not needed
3
4
5
GND
DT
Q
Ground
internally connected to heat slug
Delay Timing
connect to GND or Q to choose the Power On Reset Delay Time
Output
block to ground with a capacitor close to the IC terminals, respecting the values given
for its capacitance and ESR in “Functional Range” on Page 6
Heat Slug
–
Heat Slug
internally connected to GND;
connect to GND and heatsink area
Data Sheet
5
Rev. 1.01, 2009-07-23
TLE7270-2
General Product Characteristics
4
General Product Characteristics
4.1
Absolute Maximum Ratings
Absolute Maximum Ratings1)
Tj = -40 °C to 150 °C; all voltages with respect to ground, (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Test Condition
Min.
Max.
Input I
4.1.1
Voltage
VI
-0.3
45
V
–
Output Q, Reset Output RO, Delay Time DT
4.1.2
Voltage
VQ, VRO
,
,
-0.3
-0.3
6
V
V
–
VDT
4.1.3
Voltage
VQ, VRO
6.2
t < 10 s2)
VDT
Temperature
4.1.4
4.1.5
Junction temperature
Storage temperature
Tj
Tstg
-40
-50
150
150
°C
°C
–
–
ESD Susceptibility
4.1.6
4.1.7
Human Body Model (HBM)3)
Voltage
-
-
3
1.5
kV
kV
–
–
Charged Device Model (CDM)4) Voltage
1) not subject to production test, specified by design
2) exposure to these absolute maximum ratings for extended periods (t > 10 s) may affect device reliability
3) ESD susceptibility Human Body Model “HBM” according to AEC-Q100-002 - JESD22-A114
4) ESD susceptibility Charged Device Model “CDM” according to ESDA STM5.3.1
Note:Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Note:Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are
not designed for continuous repetitive operation.
4.2
Functional Range
Parameter
Pos.
Symbol
Limit Values
Unit Remarks
Min.
Max.
42
–
4.2.1
4.2.2
4.2.3
4.2.4
Input voltage
Output Capacitor’s
Requirements
VI
CQ
ESR(CQ)
Tj
5.5
470
–
V
nF
Ω
–
1)
2)
10
Junction temperature
-40
150
°C
–
1) the minimum output capacitance requirement is applicable for a worst case capacitance tolerance of 30%
2) relevant ESR value at f = 10 kHz
Note:Within the functional or operating range, the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the Electrical Characteristics table.
Data Sheet
6
Rev. 1.01, 2009-07-23
TLE7270-2
General Product Characteristics
4.3
Thermal Resistance
Note:This thermal data was generated in accordance with JEDEC JESD51 standards. For more information, go
to www.jedec.org.
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
TLE7270-2E (PG-SSOP-14 Exposed Pad)
4.3.1
Junction to Case1)
RthJC
–
14
–
K/W
measured to
exposed pad
2)
4.3.2
4.3.3
4.3.4
Junction to Ambient1)
RthJA
RthJA
RthJA
–
–
–
47
141
66
–
–
–
K/W
K/W
K/W
footprint only3)
300 mm² heatsink
area3)
4.3.5
RthJA
–
56
–
K/W
600 mm² heatsink
area3)
TLE7270-2D (PG-TO252-5)
4.3.1
4.3.2
4.3.3
4.3.4
Junction to Case1)
RthJC
RthJA
RthJA
RthJA
–
–
–
–
6
–
–
–
–
K/W
K/W
K/W
K/W
measured to tab
2)
Junction to Ambient1)
32
115
62
footprint only3)
300 mm² heatsink
area3)
4.3.5
RthJA
–
47
–
K/W
600 mm² heatsink
area3)
TLE7270-2G (PG-TO263-5)
4.3.1
Junction to Case1)
RthJC
–
6
–
K/W
measured to
exposed pad
2)
4.3.2
4.3.3
4.3.4
Junction to Ambient1)
RthJA
RthJA
RthJA
–
–
–
27
75
47
–
–
–
K/W
K/W
K/W
footprint only3)
300 mm² heatsink
area3)
4.3.5
RthJA
–
38
–
K/W
600 mm² heatsink
area3)
1) Not subject to production test, specified by design.
2) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product
(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm³ board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu).
Where applicable a thermal via array under the exposed pad contacted the first inner copper layer.
3) Specified RthJA value is according to Jedec JESD 51-3 at natural convection on FR4 1s0p board; The Product
(Chip+Package) was simulated on a 76.2 × 114.3 × 1.5 mm3 board with 1 copper layer (1 x 70µm Cu).
Data Sheet
7
Rev. 1.01, 2009-07-23
TLE7270-2
Electrical Characteristics
5
Electrical Characteristics
5.1
Electrical Characteristics Voltage Regulator
Electrical Characteristics
VI =13.5 V; Tj = -40 °C to 150 °C; all voltages with respect to ground (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Measuring Condition
Min. Typ. Max.
Output Q
5.1.1
Output Voltage
Output Voltage
Dropout Voltage
VQ
VQ
Vdr
4.9
4.9
–
5.0
5.0
250
5.1
5.1
500
V
0.1 mA < IQ<300 mA
6 V < VI < 16 V
0.1 mA < IQ<100 mA
6 V < VI < 40 V
5.1.2
5.1.3
V
mV
IQ = 200 mA
1)
Vdr = VI – VQ
5.1.4
5.1.5
Load Regulation
Line Regulation
∆VQ, lo
∆VQ, li
– 40 15
40
20
mV
mV
IQ = 5 mA to 250 mA
Vl = 10 V to 32 V
– 20
5
IQ = 5 mA
1)
5.1.6
5.1.7
5.1.8
5.1.9
Output Current Limitation
IQ
IQ
301
–
–
–
–
800
–
mA
mA
dB
mV/K
Output Current Limitation
VQ = 0V
fr = 100 Hz; Vr = 0.5 Vpp
–
Power Supply Ripple Rejection2)
Temperature Output Voltage Drift
PSRR
–
–
60
0.5
dVQ
----------
dT
–
Current Consumption
5.1.10 Quiescent Current
Iq
Iq
–
–
20
–
30
40
µA
µA
IQ = 0.1 mA
Tj = 25 °C
IQ = 0.1 mA
Tj ≤ 80 °C
Iq = II – IQ
5.1.11 Quiescent Current
Iq = II – IQ
1) Measured when the output voltage VQ has dropped 100 mV from the nominal value obtained at VI = 13.5 V.
2) not subject to production test, specified by design
Data Sheet
8
Rev. 1.01, 2009-07-23
TLE7270-2
Electrical Characteristics
5.2
Typical Performance Characteristics Voltage Regulator
Current Consumption Iq versus
Junction Temperature TJ
Current Consumption Iq versus
Input Voltage VIQ
1_Iq-Tj.vsd
3_IQ-VI.VSD
Iq [µA]
Tj = 25°C
Iq [µA]
VI = 13.5V
100
40
30
20
10
IQ = 100 µA
IQ = 50mA
IQ = 10mA
IQ = 0.2mA
10
1
0.01
0
10
20
30
40
VI [V]
-40 -20
0
20 40 60 80 100 120 140
Tj [°C]
Current Consumption Iq versus
Output Current IQ
Output Voltage VQ versus
Junction Temperature TJ
5A_VQ-TJ.VSD
2_IQ-IQ.VSD
30
VI = 13.5 V
Iq [µA]
VQ [V]
VI = 13.5 V
Tj = 25 °C
5.05
5.00
20
Tj = -40 °C
15
10
5
IQ =100µA...100mA
4.95
4.90
-40 -20
0
20 40 60 80 100 120 140
0
100
200
300
IQ [mA]
Tj [°C]
Data Sheet
9
Rev. 1.01, 2009-07-23
TLE7270-2
Electrical Characteristics
Dropout Voltage Vdr versus
Output Current IQ
Maximum Output Current IQ versus
Junction Temperature Tj
6_VDR-IQ.VSD
8_IQMAX-TJ.VSD
600
620
VI = 13.5 V
Vdr [mV]
IQ [mA]
Tj = 150 °C
400
300
200
100
580
560
540
Tj = 25 °C
Tj = -40 °C
520
500
-40 -20
0
20 40 60 80 100 120 140
0
100
200
300
Tj [°C]
IQ [mA]
Dropout Voltage Vdr versus
Maximum Output Current IQ versus
Input Voltage VI
Junction Temperature
9_SOA.VSD
7_VDR-TJ.VSD
600
600
Tj = 125 °C
Tj = 25 °C
IQlim
IQ [mA]
Vdr [mV]
IQ = 250 mA
400
300
200
100
400
300
200
100
IQ = 150mA
IQ = 10 mA
-40 -20
0
20 40 60 80 100 120 140
0
10
20
30
40
Tj [°C]
VI [V]
Data Sheet
10
Rev. 1.01, 2009-07-23
TLE7270-2
Electrical Characteristics
Region of Stability
Output Voltage VQ Start-up behavior
12_ESR-IQ.VSD
100
14_VI-time_startup.vsd
C
Q = 470nF ...10 µF
ESR
[Ω]CQ
VQ [V]
T
j = 25 °C
EN = HIGH
10
5.05
5.00
4.90
4.80
I
Load = 5mA
1
Stable
Region
0.1
0.01
1
2
3
4
5
0
50
100
150
200
Q [mA]
t [ms]
I
Power Supply Ripple Rejection PSRR versus
Frequency f
Load Regulation ∆VQ versus
Output Current Change ∆IQ
18a_dVQ-dIQ_Vi6V.vsd
13_PSRR.VSD
0
80
VI = 6V
PSRR
∆VQ
[dB]
[mV]
IQ = 0.1 mA
-10
-15
-20
-25
-30
60
50
40
30
IQ = 30 mA
Tj = -40 °C
Tj = 25 °C
IQ = 100 mA
V
RIPPLE = 1 V
VIN = 13.5 V
CQ = 10 µF Tantalum
Tj = 25 °C
Tj = 150 °C
0
50
100
150
250
10
100
1k
10k
100k
f [Hz]
∆IQ [mA]
Data Sheet
11
Rev. 1.01, 2009-07-23
TLE7270-2
Electrical Characteristics
Load Regulation ∆VQ versus
Output Current Change dIQ
Line Regulation ∆VQ versus
Input Voltage Changed VI
19_dVQ-dVI__150C.vsd
18b_dVQ-dIQ_Vi135V.vsd
0
0
Tj =150 °C
VI = 13.5V
IQ = 1mA
IQ = 10mA
IQ = 100mA
∆VQ
∆VQ
[mV]
[mV]
-2
-10
-15
-20
-25
-30
Tj = -40 °C
Tj = 25 °C
-3
-4
-5
-6
IQ = 200mA
Tj = 150 °C
0
50
100
150
250
0
5
10 15 20 25 30 35 40 45
∆IQ [mA]
∆VI [V]
Load Regulation ∆VQ versus
Output Current Change ∆IQ
Line Regulation ∆VQ versus
Input Voltage Changed VI
19_dVQ-dVI_25C.vsd
18c_dVQ-dIQ_Vi28V.vsd
0
0
Tj = 25 °C
VI = 28
∆VQ
∆VQ
[mV]
[mV]
IQ = 1mA
-2
-10
-15
-20
-25
-30
IQ = 10mA
IQ = 100mA
IQ = 200mA
-3
Tj = -40 °C
Tj = 25 °C
-4
-5
-6
Tj = 150 °C
0
50
100
150
250
0
5
10 15 20 25 30 35 40 45
∆VI [V]
∆IQ [mA]
Data Sheet
12
Rev. 1.01, 2009-07-23
TLE7270-2
Electrical Characteristics
Line Regulation ∆VQ versus
Input Voltage Change VI
Load Transient Response Peak Voltage ∆VQ
19_dVQ-dVI_-40C.vsd
0
Tj =40 °C
IQ
∆VQ
20_Load Trancient vs time 125.vsd
[mA]
[mV]
Tj = 125 °C
VI = 13.5 V
100
0
IQ = 1mA
IQ = 10mA
-2
IQ = 100mA
-3
IQ = 200mA
VQ
[V]
5.10
-4
-5
-6
5.00
4.90
4.80
0
80
160
240
t [µs]
0
5
10 15 20 25 30 35 40 45
∆VI [V]
Load Transient Response Peak Voltage ∆VQ
Line Transient Response Peak Voltage ∆VQ
20_Load Trancient vs time 25.vsd
21_Line Trancient vs time 25.vsd
VI
IQ
[mA]
[V]
Tj = 25 °C
VI = 13.5 V
Tj = 25 °C
15.5
13.5
11.5
100
0
VQ
[V]
VQ
[V]
5.05
5.00
4.95
5.00
4.90
4.80
0
0.8
1.6
2.4
0
80
160
240
t [µs]
t [ms]
Data Sheet
13
Rev. 1.01, 2009-07-23
TLE7270-2
Electrical Characteristics
Line Transient Response Peak Voltage ∆VQ
I
21_Line Trancient vs time 125.vsd
VI
[V]
Tj = 125 °C
15.5
13.5
11.5
VQ
[V]
5.05
5.00
4.95
0
0.8
1.6
2.4
t [ms]
5.3
Electrical Characteristics Reset Function
The Reset function informs e.g. the microcontroller in case the output voltage has fallen below the lower threshold
VRT of typ. 4.65 V. The headroom VRH between the output voltage and the reset threshold is typically 350 mV.
Connecting the regulator to a battery voltage at first the reset signal remains LOW. When the output voltage has
reached the reset threshold VRT the reset output RO remains still LOW for the reset delay time tRD. Afterwards
the reset output turns HIGH.
Electrical Characteristics Reset
VI =13.5 V; – 40 °C < Tj < 150 °C; all voltages with respect to ground (unless otherwise specified)
Pos.
Parameter
Symbol Limit Values
Unit Conditions
Min.
Typ.
Max.
5.3.1
5.3.2
5.3.3
Output Undervoltage Reset
Switching Threshold
Output Undervoltage Reset
Headroom
VRT
VRH
4.50
4.65
4.80
V
VQ decreasing
VI = 6V
–
–
–
350
0.2
–
mV
V
Reset Output Low Level Voltage VROL
0.4
RRO = 10 kΩ;
VQ > 1 V
5.3.4
5.3.5
Integrated Reset Pull Up Resistor RRO
15
10
30
–
45
–
kΩ
kΩ
–
–
Optional External Reset Pull Up RRO,ext
Resistor
5.3.6
Power On Reset Delay Time
tRD
10
16
22
ms
pin DT connected to
GND
5.3.7
5.3.8
Power On Reset Delay Time
Reset Reaction Time
tRD
tRR
80
–
128
–
176
12
ms
µs
pin DT connected to Q
–
Data Sheet
14
Rev. 1.01, 2009-07-23
TLE7270-2
Electrical Characteristics
5.4
Typical Performance Characteristics Reset Function
Reset Threshold VRT versus Junction Temperature Reset Delay tRD versus
TJ
Junction Temperature TJ at fast timing (DT
connected to GND)
26_VRT VS TEMP.VSD
27_RESETDELAY VS TEMP.VSD
VI = 13.5 V
22
tRD
VQ [V]
VI = 13.5 V
[ms]
4.90
4.80
4.70
4.60
18
16
14
12
Reset Release
Threshold
Reset Trigger
Threshold
-40 -20
0
20 40 60 80 100 120 140
-40 -20
0
20 40 60 80 100 120 140
Tj [°C]
Tj [°C]
Data Sheet
15
Rev. 1.01, 2009-07-23
TLE7270-2
Package Outlines
6
Package Outlines
0.35 x 45˚
1)
0.1 C D
0.1
3.9
+0.06
0.19
0.08
C
C
0.64
0.25
0.65
2)
0.05
0.2
0.25
6
M
M
0.2
D 8x
0.15
C A-B D 14x
D
Bottom View
0.2
3
A
1
7
14
8
1
7
14
8
Exposed
Diepad
B
0.1 C A-B 2x
1)
0.1
4.9
Index Marking
1) Does not include plastic or metal protrusion of 0.15 max. per side
2) Does not include dambar protrusion
PG-SSOP-14-1,-2,-3-PO V02
Figure 4
PG-SSOP-14 Exposed Pad
Data Sheet
16
Rev. 1.01, 2009-07-23
TLE7270-2
Package Outlines
+0.15
-0.05
6.5
A
+0.05
-0.10
5.7 MAX.1)
2.3
+0.08
-0.04
B
(5)
0.5
+0.20
0.9
-0.01
0...0.15
0.15 MAX.
per side
+0.08
0.1
5 x 0.6
1.14
0.5
-0.04
0.1 B
4.56
M
0.25
A B
1) Includes mold flashes on each side.
All metal surfaces tin plated, except area of cut.
Figure 5
PG-TO252-5
Data Sheet
17
Rev. 1.01, 2009-07-23
TLE7270-2
Package Outlines
4.4
0.2
10
0.1
1.27
B
0...0.3
A
8.5 1)
0.05
2.4
0.1
0...0.15
4 x 1.7
0.1
5 x 0.8
0.5
0.1
8˚ MAX.
M
0.25
A B
0.1 B
1) Typical
Metal surface min. X = 7.25, Y = 6.9
All metal surfaces tin plated, except area of cut.
GPT09113
Figure 6
PG-TO263-5
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant with
government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e
Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
For further information on alternative packages, please visit our website:
http://www.infineon.com/packages.
Dimensions in mm
Data Sheet
18
Rev. 1.01, 2009-07-23
TLE7270-2
Revision History
7
Revision History
Revision
1.01
Date
2009-07-23
Changes
updated version data sheet:
in “Electrical Characteristics Voltage Regulator” on Page 8, former Item
5.1.12 “Current Consumption, Regulator Disabled” removed, in Condition of
Item 5.1.10 and Item 5.1.11 “VEN = 5 V” removed: Non relevant information as
TLE7270-2 does not implement Enable Feature
1.0
2009-06-01
initial version data sheet
Data Sheet
19
Rev. 1.01, 2009-07-23
Edition 2009-07-23
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2009 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances. For information on the types in
question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
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