TLS810B1EJ V50 [INFINEON]

TLS810B1 是一个线性稳压器,具有较宽的输入电压范围,低电压差和超低静态电流的特点。稳压器的输入电压范围为 2.75 V 至 42 V,静态电流极低,仅  5.5 μA,,非常适合汽车或任何永久连接电池的其他电源系统。TLS810B1xxV50 是固定的 5 V 输出版本,精度为 2%,且输出电流能力达 100 mA。TLS810B1 中实施的新调节概念结合了快速调节和高稳定性,输出端只需要一个 1 μF 的小型陶瓷电容即可。跟踪区域已经在 2.75V 的输入电压开始(扩展工作范围)。因此,TLS810B1 也适用于需要在启动条件下运行的汽车系统。内部保护功能,例如,输出电流限制和超温关断,可保护设备免受因输出对地短路、过电流和过热等故障造成的直接损坏。通过“启用”功能,可以打开和关闭器件。在设备关闭时,电流消耗通常小于 1 μA。;
TLS810B1EJ V50
型号: TLS810B1EJ V50
厂家: Infineon    Infineon
描述:

TLS810B1 是一个线性稳压器,具有较宽的输入电压范围,低电压差和超低静态电流的特点。稳压器的输入电压范围为 2.75 V 至 42 V,静态电流极低,仅  5.5 μA,,非常适合汽车或任何永久连接电池的其他电源系统。TLS810B1xxV50 是固定的 5 V 输出版本,精度为 2%,且输出电流能力达 100 mA。TLS810B1 中实施的新调节概念结合了快速调节和高稳定性,输出端只需要一个 1 μF 的小型陶瓷电容即可。跟踪区域已经在 2.75V 的输入电压开始(扩展工作范围)。因此,TLS810B1 也适用于需要在启动条件下运行的汽车系统。内部保护功能,例如,输出电流限制和超温关断,可保护设备免受因输出对地短路、过电流和过热等故障造成的直接损坏。通过“启用”功能,可以打开和关闭器件。在设备关闭时,电流消耗通常小于 1 μA。

电池 稳压器
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TLS810B1xxV50  
Ultra Low Quiescent Current Linear Voltage Regulator  
1
Overview  
Quality Requirement Category: Automotive  
Features  
Ultra Low Quiescent Current of 5.5 µA  
Wide Input Voltage Range of 2.75 V to 42 V  
Output Current Capacity up to 100 mA  
Off Mode Current Less than 1 µA  
Low Drop Out Voltage of typ. 200 mV @ 100 mA  
Output Current Limit Protection  
Overtemperature Shutdown  
Enable  
Available in PG-DSO-8 EP Package  
Available in PG-TSON-10 Package  
Wide Temperature Range  
Green Product (RoHS Compliant)  
AEC Qualified  
Applications  
Applications with direct battery connection  
Automotive general ECUs  
Infotainment, alarm, dashboard  
RKE, immobilizer, gateway  
Data Sheet  
www.infineon.com/power  
1
Rev. 1.2  
2016-12-20  
TLS810B1xxV50  
Ultra Low Quiescent Current Linear Voltage Regulator  
Overview  
Description  
The TLS810B1 is a linear voltage regulator featuring wide input voltage range, low drop out voltage and ultra  
low quiescent current.  
With an input voltage range of 2.75 V to 42 V and ultra low quiescent of only 5.5 µA, the regulator is perfectly  
suitable for automotive or any other supply systems connected permanently to the battery.  
The TLS810B1xxV50 is the fixed 5 V output version with an accuracy of 2 % and output current capability up to  
100 mA.  
The new regulation concept implemented in TLS810B1 combines fast regulation and very good stability while  
requiring only a small ceramic capacitor of 1 μF at the output.  
The tracking region starts already at input voltages of 2.75 V (extended operating range). This makes the  
TLS810B1 also suitable to supply automotive systems that need to operate during cranking condition.  
Internal protection features like output current limitation and overtemperature shutdown are implemented  
to protect the device against immediate damage due to failures like output short circuit to GND, over-current  
and over-temperature.  
The device can be switched on and off by the Enable feature. When the device is switched off, the current  
consumption is typically less than 1 µA.  
Type  
Package  
Marking  
810B1V50  
810B1V5  
TLS810B1EJV50  
TLS810B1LDV50  
PG-DSO-8 EP  
PG-TSON-10  
Data Sheet  
2
Rev. 1.2  
2016-12-20  
TLS810B1xxV50  
Ultra Low Quiescent Current Linear Voltage Regulator  
Table of Contents  
1
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1  
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
2
3
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Pin Assignment in PG-DSO-8 EP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Pin Definitions and Functions in PG-DSO-8 EP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Pin Assignment in PG-TSON-10 Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
Pin Definitions and Functions in PG-TSON-10 Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
3.1  
3.2  
3.3  
3.4  
4
General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
4.1  
4.2  
4.3  
5
Block Description and Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
Voltage Regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
Typical Performance Characteristics Voltage Regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
Current Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15  
Typical Performance Characteristics Current Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17  
Typical Performance Characteristics Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18  
5.1  
5.2  
5.3  
5.4  
5.5  
5.6  
6
Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19  
Application Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19  
Selection of External Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19  
Input Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19  
Output Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19  
Thermal Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20  
Reverse Polarity Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21  
Further Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21  
6.1  
6.2  
6.2.1  
6.2.2  
6.3  
6.4  
6.5  
7
8
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22  
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24  
Data Sheet  
3
Rev. 1.2  
2016-12-20  
TLS810B1xxV50  
Ultra Low Quiescent Current Linear Voltage Regulator  
Block Diagram  
2
Block Diagram  
I
Q
Current  
Limitation  
EN  
Enable  
Bandgap  
Reference  
Temperature  
Shutdown  
GND  
Figure 1  
Block Diagram TLS810B1  
Data Sheet  
4
Rev. 1.2  
2016-12-20  
TLS810B1xxV50  
Ultra Low Quiescent Current Linear Voltage Regulator  
Pin Configuration  
3
Pin Configuration  
3.1  
Pin Assignment in PG-DSO-8 EP Package  
1
2
8
7
I
Q
N.C.  
N.C.  
3
4
6
5
EN  
N.C.  
N.C.  
GND  
Figure 2  
Pin Configuration TLS810B1 in PG-DSO-8 EP package  
3.2  
Pin Definitions and Functions in PG-DSO-8 EP Package  
Pin Symbol Function  
1
I
Input  
It is recommended to place a small ceramic capacitor (for example 100 nF) to GND, close to  
the IC terminals, in order to compensate line influences.  
2
3
N.C.  
EN  
Not connected  
Enable  
Integrated pull-down resistor.  
Enable the IC with high level input signal.  
Disable the IC with low level input signal.  
4
5
6
7
8
GND  
N.C.  
N.C.  
N.C.  
Q
Ground  
Not connected  
Not connected  
Not connected  
Output  
Connect an output capacitor CQ to GND close to the IC’s terminals, respecting the values  
specified for its capacitance and ESR in Table 2 “Functional Range” on Page 8.  
Pad  
Exposed Pad  
Connect to heatsink area.  
Connect to GND.  
Data Sheet  
5
Rev. 1.2  
2016-12-20  
TLS810B1xxV50  
Ultra Low Quiescent Current Linear Voltage Regulator  
Pin Configuration  
3.3  
Pin Assignment in PG-TSON-10 Package  
TSON-10  
I
N.C.  
EN  
1
2
3
4
5
10  
9
N.C.  
Q
8
N.C.  
N.C.  
N.C.  
7
GND  
N.C.  
6
Figure 3  
Pin Configuration TLS810B1 in PG-TSON-10 package  
3.4  
Pin Definitions and Functions in PG-TSON-10 Package  
Pin Symbol Function  
1
I
Input  
It is recommended to place a small ceramic capacitor (for example 100 nF) to GND, close to  
the IC terminals, in order to compensate line influences.  
2
3
N.C.  
EN  
Not connected  
Enable  
Integrated pull-down resistor.  
Enable the IC with high level input signal.  
Disable the IC with low level input signal.  
4
5
6
7
8
9
N.C.  
GND  
N.C.  
N.C.  
N.C.  
Q
Not connected  
Ground  
Not connected  
Not connected  
Not connected  
Output  
Connect an output capacitor CQ to GND close to the IC’s terminals, respecting the values  
specified for its capacitance and ESR in Table 2 “Functional Range” on Page 8.  
10  
N.C.  
Not connected  
Pad  
Exposed Pad  
Connect to heatsink area.  
Connect to GND.  
Data Sheet  
6
Rev. 1.2  
2016-12-20  
TLS810B1xxV50  
Ultra Low Quiescent Current Linear Voltage Regulator  
General Product Characteristics  
4
General Product Characteristics  
4.1  
Absolute Maximum Ratings  
Table 1  
Absolute Maximum Ratings1)  
Tj = -40°C to +150°C; all voltages with respect to ground (unless otherwise specified)  
Parameter  
Symbol  
Values  
Typ.  
Unit  
Note or  
Test Condition  
Number  
Min.  
-0.3  
-0.3  
Max.  
45  
Voltage Input I, Enable EN  
Voltage  
VI, VEN  
V
V
P_4.1.1  
P_4.1.2  
Voltage Output Q  
Voltage  
VQ  
7
Temperatures  
Junction Temperature  
Storage Temperature  
ESD Absorption  
Tj  
-40  
-55  
150  
150  
°C  
°C  
P_4.1.3  
P_4.1.4  
Tstg  
ESD Susceptibility to GND  
ESD Susceptibility to GND  
VESD,HBM -2  
2
kV  
V
HBM2)  
P_4.1.5  
VESD,CDM -750  
750  
CDM3) at all pins P_4.1.6  
1) Not subject to production test, specified by design.  
2) ESD susceptibility, HBM according to ANSI/ESDA/JEDEC JS001 (1.5 k, 100 pF)  
3) ESD susceptibility, Charged Device Model “CDM” according JEDEC JESD22-C101  
Notes  
1. Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute  
maximum rating conditions for extended periods may affect device reliability.  
2. Integrated protection functions are designed to prevent IC destruction under fault conditions described in the  
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are  
not designed for continuous repetitive operation.  
Data Sheet  
7
Rev. 1.2  
2016-12-20  
TLS810B1xxV50  
Ultra Low Quiescent Current Linear Voltage Regulator  
General Product Characteristics  
4.2  
Functional Range  
Table 2  
Functional Range  
Parameter  
Symbol  
Values  
Unit Note or  
Test Condition  
Number  
Min.  
Typ.  
Max.  
42  
1)  
Input Voltage Range  
VI  
VQ,nom+Vdr  
2.75  
V
V
P_4.2.1  
P_4.2.2  
2)  
Extended Input Voltage  
Range  
VI,ext  
42  
Enable Voltage Range  
Output Capacitor  
VEN  
0
42  
V
P_4.2.3  
P_4.2.4  
P_4.2.5  
P_4.2.6  
3)4)  
4)  
CQ  
1
µF  
Output Capacitor’s ESR  
Junction temperature  
ESR(CQ)  
Tj  
100  
150  
-40  
°C  
1) Output current is limited internally and depends on the input voltage, see Electrical Characteristics for more details.  
2) When VI is between VI,ext.min and VQ,nom + Vdr, VQ = VI - Vdr. When VI is below VI,ext,min, VQ can drop down to 0 V.  
3) The minimum output capacitance requirement is applicable for a worst case capacitance tolerance of 30%.  
4) Not subject to production testing, specified by design.  
Note:  
Within the functional or operating range, the IC operates as described in the circuit description. The  
electrical characteristics are specified within the conditions given in the Electrical Characteristics  
table.  
Data Sheet  
8
Rev. 1.2  
2016-12-20  
TLS810B1xxV50  
Ultra Low Quiescent Current Linear Voltage Regulator  
General Product Characteristics  
4.3  
Thermal Resistance  
Note:  
This thermal data was generated in accordance with JEDEC JESD51 standards. For more  
information, go to www.jedec.org.  
Table 3  
Thermal ResistanceTLS810B1 in PG-DSO-8 EP Package1)  
Parameter  
Symbol  
Values  
Unit Note or Test Condition  
Number  
Min. Typ. Max.  
Junction to Case  
RthJC  
RthJA  
RthJA  
RthJA  
19  
K/W  
P_4.3.1  
P_4.3.2  
P_4.3.3  
Junction to Ambient  
Junction to Ambient  
Junction to Ambient  
51  
K/W 2s2p board2)  
K/W 1s0p board, footprint only3)  
K/W 1s0p board, 300 mm2 heatsink P_4.3.4  
167  
71  
area on PCB3)  
Junction to Ambient  
RthJA  
60  
K/W 1s0p board, 600 mm2 heatsink P_4.3.5  
area on PCB3)  
1) Not subject to production test, specified by design  
2) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product  
(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm³ board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm  
Cu). Where applicable a thermal via array under the exposed pad contacted the first inner copper layer.  
3) Specified RthJA value is according to JEDEC JESD 51-3 at natural convection on FR4 1s0p board; The Product  
(Chip+Package) was simulated on a 76.2 × 114.3 × 1.5 mm3 board with 1 copper layer (1 x 70µm Cu).  
Table 4  
Thermal Resistance TLS810B1 in PG-TSON-10 Package1)  
Parameter  
Symbol  
Values  
Unit Note or Test Condition  
Number  
Min. Typ. Max.  
Junction to Case  
RthJC  
RthJA  
RthJA  
RthJA  
13  
K/W  
P_4.3.6  
P_4.3.7  
P_4.3.8  
Junction to Ambient  
Junction to Ambient  
Junction to Ambient  
60  
K/W 2s2p board2)  
184  
75  
K/W 1s0p board, footprint only3)  
K/W 1s0p board, 300 mm2 heatsink P_4.3.9  
area on PCB3)  
Junction to Ambient  
RthJA  
64  
K/W 1s0p board, 600 mm2 heatsink P_4.3.10  
area on PCB3)  
1) Not subject to production test, specified by design  
2) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product  
(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm³ board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm  
Cu). Where applicable a thermal via array under the exposed pad contacted the first inner copper layer.  
3) Specified RthJA value is according to JEDEC JESD 51-3 at natural convection on FR4 1s0p board; The Product  
(Chip+Package) was simulated on a 76.2 × 114.3 × 1.5 mm3 board with 1 copper layer (1 x 70µm Cu).  
Data Sheet  
9
Rev. 1.2  
2016-12-20  
TLS810B1xxV50  
Ultra Low Quiescent Current Linear Voltage Regulator  
Block Description and Electrical Characteristics  
5
Block Description and Electrical Characteristics  
5.1  
Voltage Regulation  
The output voltage VQ is divided by a resistor network. This fractional voltage is compared to an internal  
voltage reference and the pass transistor is driven accordingly.  
The control loop stability depends on the output capacitor CQ, the load current, the chip temperature and the  
internal circuit structure. To ensure stable operation, the output capacitor’s capacitance and its equivalent  
series resistor ESR requirements given in “Functional Range” on Page 8 have to be maintained. For details  
see the typical performance graph Output Capacitor Series Resistor ESR(CQ) versus Output Current IQ on  
Page 14. Since the output capacitor is used to buffer load steps, it should be sized according to the  
application’s needs.  
An input capacitor CI is not required for stability, but is recommended to compensate line fluctuations. An  
additional reverse polarity protection diode and a combination of several capacitors for filtering should be  
used, in case the input is connected directly to the battery line. Connect the capacitors close to the regulator  
terminals.  
In order to prevent overshoots during start-up, a smooth ramping up function is implemented. This ensures  
almost no overshoots during start-up, mostly independent from load and output capacitance.  
Whenever the load current exceeds the specified limit, for example in case of a short circuit, the output current  
is limited and the output voltage decreases.  
The overtemperature shutdown circuit prevents the IC from immediate destruction under fault conditions (for  
example output continuously short-circuit) by switching off the power stage. After the chip has cooled down,  
the regulator restarts. This oscillatory thermal behaviour causes the junction temperature to exceed the  
maximum rating of 150°C and can significantly reduce the IC’s lifetime.  
Regulated  
Output Voltage  
Supply  
IQ  
I
I
I
Q
Current  
Limitation  
C
ESR  
LOAD  
VI  
VQ  
CI  
Bandgap  
CQ  
Reference  
Temperature  
Shutdown  
GND  
Figure 4  
Block Diagram Voltage Regulation  
Data Sheet  
10  
Rev. 1.2  
2016-12-20  
TLS810B1xxV50  
Ultra Low Quiescent Current Linear Voltage Regulator  
Block Description and Electrical Characteristics  
Table 5  
Electrical Characteristics  
Tj = -40°C to +150°C, VI = 13.5 V, all voltages with respect to ground (unless otherwise specified).  
Typical values are given at Tj = 25°C, VI = 13.5 V.  
Parameter  
Symbol  
Values  
Unit Note or Test Condition  
Number  
Min. Typ. Max.  
Output Voltage Precision  
VQ  
4.90  
5.00  
5.10  
V
V
50 µA IQ 100 mA,  
5.7 V VI 28 V  
P_5.1.1  
Output Voltage Precision  
VQ  
4.90  
5.00  
5.10  
50 µA IQ 50 mA,  
5.7 V VI 42 V  
P_5.1.2  
Output Current Limitation IQ,lim  
110  
190  
1
260  
20  
mA 0 V VQ VQ,nom - 0.1 V  
P_5.1.3  
P_5.1.4  
Line Regulation  
steady-state  
ΔVQ,line  
mV  
mV  
mV  
dB  
IQ = 1 mA, 6 V VI 32 V  
Load Regulation  
steady-state  
ΔVQ,load -20  
-1  
VI = 6 V,  
50 µA IQ 100 mA  
P_5.1.5  
P_5.1.6  
P_5.1.7  
Dropout Voltage1)  
Vdr  
200  
55  
550  
IQ = 100 mA  
Vdr = VI - VQ  
Ripple Rejection2)  
PSRR  
IQ = 50 mA,  
fripple = 100 Hz,  
Vripple = 0.5 Vp-p  
Tj increasing  
Tj decreasing  
Overtemperature  
Tj,sd  
151  
175  
10  
°C  
K
P_5.1.8  
P_5.1.9  
Shutdown Threshold2)  
Overtemperature  
Shutdown Threshold  
Hysteresis2)  
Tj,sdh  
1) Measured when the output voltage VQ has dropped 100 mV from the nominal value obtained at VI = 13.5V  
2) Not subject to production test, specified by design  
Data Sheet  
11  
Rev. 1.2  
2016-12-20  
TLS810B1xxV50  
Ultra Low Quiescent Current Linear Voltage Regulator  
Block Description and Electrical Characteristics  
5.2  
Typical Performance Characteristics Voltage Regulation  
Output Voltage VQ versus  
Junction Temperature Tj  
Output Current IQ versus  
Input Voltage VI  
300  
250  
200  
150  
100  
50  
Tj = −40 °C  
Tj = 25 °C  
Tj = 150 °C  
5.15  
5.1  
5.05  
5
4.95  
4.9  
4.85  
4.8  
VI = 13.5 V  
Q = 50 mA  
I
0
0
50  
Tj [°C]  
100  
150  
0
10  
20  
VI [V]  
30  
40  
Dropout Voltage Vdr versus  
Junction Temperature Tj  
Dropout Voltage Vdr versus  
Output Current IQ  
400  
400  
IQ = 10 mA  
Tj = −40 °C  
IQ = 50 mA  
Tj = 25 °C  
350  
350  
IQ = 100 mA  
Tj = 150 °C  
300  
300  
250  
200  
150  
100  
50  
250  
200  
150  
100  
50  
0
0
0
50  
100  
150  
0
20  
40  
60  
80  
100  
Tj [°C]  
IQ [mA]  
Data Sheet  
12  
Rev. 1.2  
2016-12-20  
TLS810B1xxV50  
Ultra Low Quiescent Current Linear Voltage Regulator  
Block Description and Electrical Characteristics  
Load Regulation VQ,load versus  
Output Current IQ  
Line Regulation VQ,line versus  
Input Voltage VI  
10  
10  
Tj = −40 °C  
Tj = −40 °C  
8
8
6
Tj = 25 °C  
Tj = 25 °C  
Tj = 150 °C  
Tj = 150 °C  
6
4
2
4
2
0
0
−2  
−4  
−6  
−8  
−10  
−2  
−4  
−6  
−8  
−10  
VI = 6 V  
80  
IQ = 1 mA  
35 40  
0
20  
40  
60  
100  
10  
15  
20  
25  
VI [V]  
30  
IQ [mA]  
Output Voltage VQ versus  
Input Voltage VI  
Power Supply Ripple Rejection PSRR versus  
ripple frequency fr  
6
5
4
3
2
1
0
80  
70  
60  
50  
40  
30  
20  
IQ = 10 mA  
C
Q = 1 μF  
VI = 13.5 V  
ripple = 0.5 Vpp  
10  
0
V
IQ = 50 mA  
Tj = 25 °C  
Tj = 25 °C  
10−2  
10−1  
100  
101  
102  
103  
0
1
2
3
4
5
6
VI [V]  
f [kHz]  
Data Sheet  
13  
Rev. 1.2  
2016-12-20  
TLS810B1xxV50  
Ultra Low Quiescent Current Linear Voltage Regulator  
Block Description and Electrical Characteristics  
Output Capacitor Series Resistor ESR(CQ) versus  
Output Current IQ  
103  
Unstable Region  
102  
101  
Stable Region  
100  
10−1  
CQ = 1 μF  
VI = 3...28 V  
10−2  
0
20  
40  
60  
80  
100  
IQ [mA]  
Data Sheet  
14  
Rev. 1.2  
2016-12-20  
TLS810B1xxV50  
Ultra Low Quiescent Current Linear Voltage Regulator  
Block Description and Electrical Characteristics  
5.3  
Current Consumption  
Table 6  
Electrical Characteristics Current Consumption  
Tj = -40°C to +150°C, VI = 13.5 V (unless otherwise specified).  
Parameter  
Symbol  
Values  
Unit Note or Test Condition  
Number  
Min. Typ. Max.  
Current Consumption  
Iq = II  
Iq,off  
Iq  
1
µA  
µA  
µA  
µA  
µA  
VEN 0.4 V, Tj < 105°C  
IQ = 50 µA, Tj = 25°C  
IQ = 50 µA, Tj < 105°C  
IQ = 50 µA, Tj < 125°C  
IQ= 100 mA, Tj < 125°C  
P_5.3.1  
P_5.3.2  
P_5.3.3  
P_5.3.4  
P_5.3.5  
Current Consumption  
Iq = II - IQ  
5.5  
6.5  
7
8
Current Consumption  
Iq = II - IQ  
Iq  
11  
12  
12  
Current Consumption  
Iq = II - IQ  
Iq  
Current Consumption  
Iq  
7
Iq = II - IQ  
Data Sheet  
15  
Rev. 1.2  
2016-12-20  
TLS810B1xxV50  
Ultra Low Quiescent Current Linear Voltage Regulator  
Block Description and Electrical Characteristics  
5.4  
Typical Performance Characteristics Current Consumption  
Current Consumption Iq versus  
Output Current IQ  
Current Consumption Iq versus  
Input Voltage VI  
16  
40  
Tj = −40 °C  
Tj = −40 °C  
Tj = 25 °C  
Tj = 25 °C  
14  
35  
Tj = 105 °C  
Tj = 105 °C  
Tj = 125 °C  
Tj = 125 °C  
12  
30  
10  
8
25  
20  
15  
10  
5
6
4
VI = 13.5 V  
2
IQ = 50 μA  
35 40  
0
0
0
20  
40  
60  
80  
100  
10  
15  
20  
25  
30  
IQ [mA]  
VI [V]  
Current Consumption Iq versus  
Junction Temperature Tj  
Current Consumption in OFF mode Iq,off versus  
Junction Temperature Tj  
16  
14  
12  
10  
8
4
VI = 13.5 V  
VEN 0.4 V  
3.5  
3
2.5  
2
6
1.5  
1
4
VI = 13.5 V  
IQ = 50 μA  
2
0.5  
0
0
0
50  
100  
150  
0
50  
100  
150  
Tj [°C]  
Tj [°C]  
Data Sheet  
16  
Rev. 1.2  
2016-12-20  
TLS810B1xxV50  
Ultra Low Quiescent Current Linear Voltage Regulator  
Block Description and Electrical Characteristics  
5.5  
Enable  
The device can be switched on and off by the Enable feature. Connect a HIGH level as specified below (for  
example the battery voltage) to pin EN to enable the device; connect a LOW level as specified below (for  
example GND) to switch it off. The Enable function has a build-in hysteresis to avoid toggling between ON/OFF  
state, if signals with slow slopes are appiled to the EN input.  
Table 7  
Electrical Characteristics Enable  
Tj = -40°C to +150°C, VI = 13.5 V, all voltages with respect to ground (unless otherwise specified).  
Typical values are given at Tj = 25°C, VI = 13.5 V.  
Parameter  
Symbol  
Values  
Unit Note or Test Condition  
Number  
Min. Typ. Max.  
Enable High Level Input  
Voltage  
VEN,H  
VEN,L  
IEN,H  
2
2
V
VQ settled  
VQ 0.1 V  
VEN = 5 V  
P_5.5.1  
P_5.5.2  
P_5.5.3  
P_5.5.4  
Enable Low Level Input  
Voltage  
0.8  
4
V
Enable High Level Input  
Current  
µA  
MΩ  
Enable Internal Pull-down REN  
Resistor  
1.25  
3.5  
Data Sheet  
17  
Rev. 1.2  
2016-12-20  
TLS810B1xxV50  
Ultra Low Quiescent Current Linear Voltage Regulator  
Block Description and Electrical Characteristics  
5.6  
Typical Performance Characteristics Enable  
Enable Input Current IEN versus  
Enable Input Voltage VEN  
40  
Tj = −40 °C  
Tj = 25 °C  
35  
Tj = 150 °C  
30  
25  
20  
15  
10  
5
0
0
10  
20  
30  
40  
VEN [V]  
Data Sheet  
18  
Rev. 1.2  
2016-12-20  
TLS810B1xxV50  
Ultra Low Quiescent Current Linear Voltage Regulator  
Application Information  
6
Application Information  
Note:  
6.1  
The following information is given as a hint for the implementation of the device only and shall not  
be regarded as a description or warranty of a certain functionality, condition or quality of the device.  
Application Diagram  
Regulated  
Output Voltage  
DI1  
IQ  
Supply  
II  
I
Q
e.g. Ignition  
EN  
Load  
(e.g.  
TLS810B1  
Micro  
Controller)  
CQ  
DI2  
<45V  
CI2  
CI1  
1μF  
10μF 100nF  
GND  
GND  
Figure 5  
Application Diagram  
6.2  
Selection of External Components  
Input Pin  
6.2.1  
The typical input circuitry for a linear voltage regulator is shown in the application diagram above.  
A ceramic capacitor at the input, in the range of 100 nF to 470 nF, is recommended to filter out the high  
frequency disturbances imposed by the line for example ISO pulses 3a/b. This capacitor must be placed very  
close to the input pin of the linear voltage regulator on the PCB.  
An aluminum electrolytic capacitor in the range of 10 µF to 470 µF is recommended as an input buffer to  
smooth out high energy pulses, such as ISO pulse 2a. This capacitor should be placed close to the input pin of  
the linear voltage regulator on the PCB.  
An overvoltage suppressor diode can be used to further suppress any high voltage beyond the maximum  
rating of the linear voltage regulator and protect the device against any damage due to over-voltage.  
The external components at the input are not mandatory for the operation of the voltage regulator, but they  
are recommended in case of possible external disturbances.  
6.2.2  
Output Pin  
An output capacitor is mandatory for the stability of linear voltage regulators.  
Data Sheet  
19  
Rev. 1.2  
2016-12-20  
TLS810B1xxV50  
Ultra Low Quiescent Current Linear Voltage Regulator  
Application Information  
The requirement to the output capacitor is given in “Functional Range” on Page 8. The graph Output  
Capacitor Series Resistor ESR(CQ) versus Output Current IQ on Page 14 shows the stable operation range  
of the device.  
TLS810B1 is designed to be stable with extremely low ESR capacitors. According to the automotive  
environment, ceramic capacitors with X5R or X7R dielectrics are recommended.  
The output capacitor should be placed as close as possible to the regulator’s output and GND pins and on the  
same side of the PCB as the regulator itself.  
In case of rapid transients of input voltage or load current, the capacitance should be dimensioned in  
accordance and verified in the real application that the output stability requirements are fulfilled.  
6.3  
Thermal Considerations  
Knowing the input voltage, the output voltage and the load profile of the application, the total power  
dissipation can be calculated:  
PD = (VI VQ) × IQ + VI × Iq  
(6.1)  
with  
PD: continuous power dissipation  
VI: input voltage  
VQ: output voltage  
IQ: output current  
Iq: quiescent current  
The maximum acceptable thermal resistance RthJA can then be calculated:  
Tj, max Ta  
RthJA, max = ---------------------------  
PD  
(6.2)  
with  
Tj,max: maximum allowed junction temperature  
Ta: ambient temperature  
Based on the above calculation the proper PCB type and the necessary heat sink area can be determined with  
reference to the specification in “Thermal Resistance” on Page 9.  
Example  
Application conditions:  
VI= 13.5 V  
VQ= 5 V  
IQ= 80 mA  
Ta= 105°C  
Calculation of RthJA,max  
:
PD= (VI VQ) x IQ + VI x Iq  
= (13.5 V – 5 V) x 80 mA + 13.5 V x 0.012 mA  
Data Sheet  
20  
Rev. 1.2  
2016-12-20  
TLS810B1xxV50  
Ultra Low Quiescent Current Linear Voltage Regulator  
Application Information  
= 0.68 W  
RthJA,max= (Tj,max Ta) / PD  
= (150°C – 105°C) / 0.68 W  
= 66.2 K/W  
As a result, the PCB design must ensure a thermal resistance RthJA lower than 66.2 K/W. According to “Thermal  
Resistance” on Page 9, at least 600 mm² heatsink area is needed on the FR4 1s0p PCB, or the FR4 2s2p board  
can be used.  
6.4  
Reverse Polarity Protection  
TLS810B1 is not self protected against reverse polarity faults. To protect the device against negative supply  
voltage, an external reverse polarity diode is needed, as shown in Figure 5Figure 32. The absolute maximum  
ratings of the device as specified in “Absolute Maximum Ratings” on Page 7 must be kept.  
6.5  
Further Application Information  
For further information you may contact http://www.infineon.com/  
Data Sheet  
21  
Rev. 1.2  
2016-12-20  
TLS810B1xxV50  
Ultra Low Quiescent Current Linear Voltage Regulator  
Package Outlines  
7
Package Outlines  
0.35 x 45°  
1)  
±0.1  
3.9  
0.1 C D 2x  
+0.06  
0.19  
0.08  
Seating Plane  
C
C
0.64±0.25  
±0.2  
0.2  
1.27  
2)  
M
±0.09  
0.41  
D 8x  
6
M
0.2  
C A-B D 8x  
D
Bottom View  
±0.2  
3
A
1
4
8
5
1
4
8
5
B
0.1 C A-B 2x  
1)  
±0.1  
4.9  
Index Marking  
1) Does not include plastic or metal protrusion of 0.15 max. per side  
2) Dambar protrusion shall be maximum 0.1 mm total in excess of lead width  
3) JEDEC reference MS-012 variation BA  
Figure 6  
PG-DSO-8 EP  
±0.1  
2.58  
±0.1  
0.1  
±0.1  
±0.1  
±0.1  
3.3  
0.36  
0.53  
0.05  
Z
Pin 1 Marking  
±0.1  
0.5  
Pin 1 Marking  
±0.1  
0.25  
PG-TSON-10-2-PO V02  
Z (4:1)  
0.07 MIN.  
Figure 7  
PG-TSON-10  
Data Sheet  
22  
Rev. 1.2  
2016-12-20  
TLS810B1xxV50  
Ultra Low Quiescent Current Linear Voltage Regulator  
Package Outlines  
Green Product (RoHS compliant)  
To meet the world-wide customer requirements for environmentally friendly products and to be compliant  
with government regulations the device is available as a green product. Green products are RoHS-Compliant  
(i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).  
For further information on alternative packages, please visit our website:  
http://www.infineon.com/packages.  
Dimensions in mm  
Data Sheet  
23  
Rev. 1.2  
2016-12-20  
TLS810B1xxV50  
Ultra Low Quiescent Current Linear Voltage Regulator  
Revision History  
8
Revision History  
Revision  
1.2  
Date  
Changes  
2016-12-20 Template updated  
2016-09-28 New variant TLS810B1EJV50 in PG-DSO-8 EP added  
2015-11-02 Datasheet - Initial version  
1.1  
1.0  
Data Sheet  
24  
Rev. 1.2  
2016-12-20  
Please read the Important Notice and Warnings at the end of this document  
Trademarks of Infineon Technologies AG  
µHVIC™, µIPM™, µPFC™, AU-ConvertIR™, AURIX™, C166™, CanPAK™, CIPOS™, CIPURSE™, CoolDP™, CoolGaN™, COOLiR™, CoolMOS™, CoolSET™, CoolSiC™,  
DAVE™, DI-POL™, DirectFET™, DrBlade™, EasyPIM™, EconoBRIDGE™, EconoDUAL™, EconoPACK™, EconoPIM™, EiceDRIVER™, eupec™, FCOS™, GaNpowIR™,  
HEXFET™, HITFET™, HybridPACK™, iMOTION™, IRAM™, ISOFACE™, IsoPACK™, LEDrivIR™, LITIX™, MIPAQ™, ModSTACK™, my-d™, NovalithIC™, OPTIGA™,  
OptiMOS™, ORIGA™, PowIRaudio™, PowIRStage™, PrimePACK™, PrimeSTACK™, PROFET™, PRO-SIL™, RASIC™, REAL3™, SmartLEWIS™, SOLID FLASH™,  
SPOC™, StrongIRFET™, SupIRBuck™, TEMPFET™, TRENCHSTOP™, TriCore™, UHVIC™, XHP™, XMC™.  
Trademarks updated November 2015  
Other Trademarks  
All referenced product or service names and trademarks are the property of their respective owners.  
IMPORTANT NOTICE  
The information given in this document shall in no For further information on technology, delivery terms  
Edition 2016-12-20  
Published by  
Infineon Technologies AG  
81726 Munich, Germany  
event be regarded as a guarantee of conditions or and conditions and prices, please contact the nearest  
characteristics ("Beschaffenheitsgarantie").  
Infineon Technologies Office (www.infineon.com).  
With respect to any examples, hints or any typical  
values stated herein and/or any information regarding  
the application of the product, Infineon Technologies  
hereby disclaims any and all warranties and liabilities  
of any kind, including without limitation warranties of  
non-infringement of intellectual property rights of any  
third party.  
In addition, any information given in this document is  
subject to customer's compliance with its obligations  
stated in this document and any applicable legal  
requirements, norms and standards concerning  
customer's products and any use of the product of  
Infineon Technologies in customer's applications.  
The data contained in this document is exclusively  
intended for technically trained staff. It is the  
responsibility of customer's technical departments to  
evaluate the suitability of the product for the intended  
application and the completeness of the product  
information given in this document with respect to  
such application.  
WARNINGS  
Due to technical requirements products may contain  
dangerous substances. For information on the types  
in question please contact your nearest Infineon  
Technologies office.  
© 2016 Infineon Technologies AG.  
All Rights Reserved.  
Do you have a question about any  
aspect of this document?  
Email: erratum@infineon.com  
Except as otherwise explicitly approved by Infineon  
Technologies in a written document signed by  
authorized representatives of Infineon Technologies,  
Infineon Technologies’ products may not be used in  
any applications where a failure of the product or any  
consequences of the use thereof can reasonably be  
expected to result in personal injury.  

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