IN7472N

更新时间:2024-09-18 02:21:05
品牌:INTEGRAL
描述:AND-Gated J-K Master-Slave Flip-Flops with Reset and Clear

IN7472N 概述

AND-Gated J-K Master-Slave Flip-Flops with Reset and Clear 和门控JK主从触发器与复位和清除

IN7472N 数据手册

通过下载IN7472N数据手册来全面了解它。这个PDF文档包含了所有必要的细节,如产品概述、功能特性、引脚定义、引脚排列图等信息。

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TECHNICAL DATA  
IN7472  
AND-Gated J-K Master-Slave Flip-  
Flops with Reset and Clear  
LOGIC DIAGRAM  
ORDERING INFORMATION  
IN7472N Plastic  
IN7472D SOIC  
TA = -10° to 70° C for all packages  
PIN ASSIGNMENT  
PIN 14 =VCC  
PIN 7 = GND  
NC - No internal connection  
FUNCTION TABLE  
Inputs  
Output  
Reset Clear Clock  
J
K
X
X
X
L
Q
Q
L
L
H
L
H
L
X
X
X
X
X
X
L
H
L
H*  
Q0  
H
H
L
H*  
Q0  
L
H
H
H
H
H
H
H
H
H
L
L
H
H
L
H
H
TOGGLE  
X =don’t care  
Q0 = the level of Q before the indicated input conditions were established.  
TOGGLE: Each output changes to the complement of its previous level on each  
active transition (pulse) of the clock.  
*This configuration is nonstable; that is, it will not persist whenpreset and clear inputs  
return to their inactive (high) level.  
1
IN7472  
MAXIMUM RATINGS*  
Symbol  
Parameter  
Value  
7.0  
Unit  
VCC  
VIN  
IOL  
Supply Voltage  
Input Voltage  
V
V
5.5  
Low Level Output Current  
Storage Temperature Range  
16  
mA  
°C  
Tstg  
-65 to +150  
*Maximum Ratings are those values beyond which damage to the device may occur.  
Functional operation should be restricted to the Recommended Operating Conditions.  
RECOMMENDED OPERATING CONDITIONS  
Symbol  
VCC  
VIH  
Parameter  
Min  
4.75  
2.0  
Max  
Unit  
V
Supply Voltage  
5.25  
High Level Input Voltage  
Low Level Input Voltage  
High Level Output Current  
Low Level Output Current  
V
VIL  
0.8  
-400  
16  
V
IOH  
µA  
mA  
IOL  
Clock high  
20  
47  
25  
0↑  
0↓  
tw  
Pulse Width  
Clock low  
ns  
Reset or Clear low  
tsu  
th  
Input Setup Time  
ns  
ns  
InputHold Time  
fmax  
TA  
Maximum Clock Frequency  
Ambient Temperature Range  
15  
MHz  
-10  
+70  
°C  
↑↓ The arrow indicates the edge of the clock pulse used for reference: for the rising edge, for the falling edge.  
2
IN7472  
DC ELECTRICAL CHARACTERISTICS over full operating conditions  
Symbol  
Parameter  
Test Conditions  
Guaranteed Limit  
Unit  
Min  
Max  
VIK  
VOH  
VOL  
II  
Input Clamp Voltage  
VCC = min, IIN = -10 mA  
VCC = min, IOH =max  
VCC = min, IOL =max  
VCC = max, VIN= 5.5 V  
-1.5  
V
V
High Level Output Voltage  
Low Level Output Voltage  
2.4  
0.4  
1
V
Input Current at Maximum  
Input Voltage  
mA  
D, J, K  
40  
80  
IIH  
High Level  
Clear  
Reset  
Clock  
D, J, K  
Clear  
Reset  
Clock  
VCC = max, VIN = 2.4 V  
µA  
Input Current  
80  
80  
-1.6  
-3.2  
-3.2  
-3.2  
-55  
20  
IIL  
Low Level  
VCC = max, VIN = 0.4 V  
mA  
Input Current  
IOS*  
ICC  
Short-Circuit Output Current  
Supply Current  
VCC = max  
-18  
mA  
mA  
VCC = max, See Note 1  
*Not more than one output should be shorted at a time, and duration of the short-circuit should not exceed one second.  
Note 1: With outputs open, ICC is measured with the Q and Q outputs high in turn. At the time of measurement, the  
clock input is grounded.  
3
IN7472  
AC ELECTRICAL CHARACTERISTICS (T = 25°C, VCC = 5.0 V, CL = 15 pF,  
RL = 390 , Input tr = tf = 10 ns)  
Symbol  
Parameter  
Min  
Max  
Unit  
tPLH  
Propagation Delay Time, Low to High Level Output (from  
Reset to Q)  
25  
ns  
ns  
ns  
ns  
ns  
ns  
tPHL  
tPLH  
tPHL  
tPLH  
tPHL  
Propagation Delay Time, High to Low Level Output (from  
Reset to Q)  
40  
25  
40  
25  
40  
Propagation Delay Time, Low to High Level Output (from  
Clear to Q)  
Propagation Delay Time, High to Low Level Output (from  
Clear to Q)  
Propagation Delay Time, Low to High Level Output (from  
Clock to Q or Q)  
Propagation Delay Time, High to Low Level Output (from  
Clock to Q or Q)  
Figure 1. Switching Waveforms  
Figure 2. Switching Waveforms  
NOTES A. CL includes probe and jig capacitance.  
B. All diodes are 1N916 or 1N3064.  
Figure 3. Test Circuit  
4
IN7472  
N SUFFIX PLASTIC DIP  
(MS - 001AA)  
A
Dimension, mm  
Symbol  
MIN  
18.67  
6.1  
MAX  
19.69  
7.11  
8
7
14  
1
B
A
B
C
D
F
5.33  
0.36  
1.14  
0.56  
F
L
1.78  
C
2.54  
7.62  
G
H
J
-T-  
SEATING  
PLANE  
N
0
°
10  
°
M
J
G
K
H
D
2.92  
7.62  
0.2  
3.81  
8.26  
0.36  
K
L
M
N
0.25 (0.010) M  
T
NOTES:  
1. Dimensions “A”, “B” do not include mold flash or protrusions.  
Maximum mold flash or protrusions 0.25 mm (0.010) per side.  
0.38  
D SUFFIX SOIC  
(MS - 012AB)  
Dimension, mm  
A
14  
8
Symbol  
MIN  
8.55  
3.8  
MAX  
8.75  
4
A
B
C
D
F
H
B
P
1.35  
0.33  
0.4  
1.75  
0.51  
1.27  
1
7
G
R x 45  
C
1.27  
5.27  
G
H
J
-T-  
SEATING  
PLANE  
K
M
D
J
F
0°  
8°  
0.25 (0.010) M  
T
M
C
0.1  
0.25  
0.25  
6.2  
K
M
P
NOTES:  
0.19  
5.8  
1. Dimensions A and B do not include mold flash or protrusion.  
2. Maximum mold flash or protrusion 0.15 mm (0.006) per side  
0.25  
0.5  
R
for A; for B 0.25 mm (0.010) per side.  
5

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