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IN74AC373

更新时间：2024-09-18 02:10:17

品牌：INTEGRAL

描述：Octal 3-State Noninverting Transparent Latch High-Speed Silicon-Gate CMOS

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IN74AC373 概述

Octal 3-State Noninverting Transparent Latch High-Speed Silicon-Gate CMOS 八路三态同相透明锁存器的高速硅栅CMOS

IN74AC373 数据手册

通过下载IN74AC373数据手册来全面了解它。这个PDF文档包含了所有必要的细节，如产品概述、功能特性、引脚定义、引脚排列图等信息。

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TECHNICAL DATA

IN74AC373

Octal 3-State Noninverting

Transparent Latch

High-Speed Silicon-Gate CMOS

The IN74AC373 is identical in pinout to the LS/ALS373,

HC/HCT373. The device inputs are compatible with standard CMOS

outputs; with pullup resistors, they are compatible with LS/ALS

outputs.

These latches appear transparent to data (i.e., the outputs change

asynchronously) when Latch Enable is high. When Latch Enable goes

low, data meeting the setup and hold time becomes latched.

The Output Enable input does not affect the state of the latches, but

when Output Enable is high, all device outputs are forced to the high-

impedance state. Thus, data may be latched even when the outputs are

not enabled.

ORDERING INFORMATION

IN74AC373N Plastic

IN74AC373DW SOIC

T_A= -40° to 85° C for all

packages

•

Outputs Directly Interface to CMOS, NMOS, and TTL

Operating Voltage Range: 2.0 to 6.0 V

Low Input Current: 1.0 µA; 0.1 µA @ 25°C

High Noise Immunity Characteristic of CMOS Devices

Outputs Source/Sink 24 mA

PIN ASSIGNMENT

LOGIC DIAGRAM

FUNCTION TABLE

Inputs

Latch

Output

Enable Enable

No Change

PIN 20=V_CC

PIN 10 = GND

X = Don’t Care

Z = High Impedance

416

IN74AC373

MAXIMUM RATINGS^*

Symbol

Parameter

Value

-0.5 to +7.0

-0.5 to V_CC+0.5

±20

Unit

V_CC

V_IN

V_OUT

I_IN

DC Supply Voltage (Referenced to GND)

DC Input Voltage (Referenced to GND)

DC Output Voltage (Referenced to GND)

DC Input Current, per Pin

I_OUT

I_CC

DC Output Sink/Source Current, per Pin

DC Supply Current, V_CCand GND Pins

±50

P_D

Power Dissipation in Still Air, Plastic DIP+

SOIC Package+

750

500

Tstg

T_L

Storage Temperature

-65 to +150

260

°C

Lead Temperature, 1 mm from Case for 10 Seconds

(Plastic DIP or SOIC Package)

^*Maximum Ratings are those values beyond which damage to the device may occur.

Functional operation should be restricted to the Recommended Operating Conditions.

+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C

SOIC Package: : - 7 mW/°C from 65° to 125°C

RECOMMENDED OPERATING CONDITIONS

Symbol

V_CC

Parameter

DC Supply Voltage (Referenced to GND)

DC Input Voltage, Output Voltage (Referenced to GND)

Junction Temperature (PDIP)

Min

2.0

Max

6.0

Unit

V_IN, V_OUT

T_J

V_CC

140

+85

-24

°C

T_A

Operating Temperature, All Package Types

Output Current - High

-40

°C

I_OH

ns/V

I_OL

Output Current - Low

t_r, t_f

Input Rise and Fall Time ^*

(except Schmitt Inputs)

V_CC=3.0 V

150

_CC=4.5 V

_CC=5.5 V

^*V_INfrom 30% to 70% V_CC

This device contains protection circuitry to guard against damage due to high static voltages or electric

fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated

voltages to this high-impedance circuit. For proper operation, V_INand V_OUTshould be constrained to the range

GND≤(V_INor V_OUT)≤V_CC.

Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V_CC).

Unused outputs must be left open.

417

IN74AC373

DC ELECTRICAL CHARACTERISTICS

(Voltages Referenced to GND)

V_CC

Guaranteed Limits

Symbol

V_IH

Parameter

Test Conditions

Unit

25 °C

-40°C to

85°C

Minimum High-Level V_OUT=0.1 V or V_CC-0.1 V

Input Voltage

3.0

4.5

5.5

2.1

3.15

3.85

3.15

3.85

V_IL

Maximum Low -

Level Input Voltage

V_OUT=0.1 V or V_CC-0.1 V

3.0

4.5

5.5

0.9

1.35

1.65

0.9

1.35

1.65

V_OH

Minimum High-Level

Output Voltage

3.0

4.5

5.5

2.9

4.4

5.4

2.9

4.4

5.4

I_OUT≤ -50 µA

^*V_IN=V_IHor V_IL

I_OH=-12 mA

3.0

4.5

5.5

2.56

3.86

4.86

2.46

3.76

4.76

_OH=-24 mA

V_OL

Maximum Low-Level

Output Voltage

3.0

4.5

5.5

0.1

I_OUT≤ 50 µA

^*V_IN=V_IHor V_IL

I_OL=12 mA

I_OL=24 mA

3.0

4.5

5.5

0.36

0.44

I_OL=24 mA

I_IN

Maximum Input

Leakage Current

V_IN=V_CCor GND

5.5

±0.1

±1.0

µA

I_OZ

Maximum Three-

State Leakage

Current

V_IN(OE)= V_IHor V_IL

V_IN=V_CCor GND

5.5

±0.5

±5.0

_OUT=V_CCor GND

I_OLD

I_OHD

I_CC

+Minimum Dynamic

Output Current

V_OLD=1.65 V Max

V_OHD=3.85 V Min

V_IN=V_CCor GND

5.5

-75

µA

+Minimum Dynamic

Output Current

Maximum Quiescent

Supply Current

(per Package)

8.0

^*All outputs loaded; thresholds on input associated with output under test.

+Maximum test duration 2.0 ms, one output loaded at a time.

Note: I_INand I_CC@ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V V_CC

418

IN74AC373

AC ELECTRICAL CHARACTERISTICS

(C_L=50pF,Input t_r=t_f=3.0 ns)

V_CC

Guaranteed Limits

Symbol

Parameter

Unit

25 °C

-40°C to

85°C

Min

Max

Min

Max

t_PLH

t_PHL

t_PLH

t_PHL

t_PZH

t_PZL

t_PHZ

t_PLZ

C_IN

Propagation Delay, Input D to Q

(Figure 1)

3.3

5.0

1.5

13.5

9.5

1.5

15.0

10.5

Propagation Delay, Input D to Q

(Figure 1)

3.3

5.0

1.5

13.0

9.5

1.5

14.5

10.5

Propagation Delay, Latch Enable to Q (Figure

3.3

5.0

1.5

13.5

9.5

1.5

15.0

10.5

Propagation Delay, Latch Enable to Q (Figure

3.3

5.0

1.5

12.5

9.5

1.5

14.0

10.5

Propagation Delay, Output Enable to Q

(Figure 3)

3.3

5.0

1.5

11.5

8.5

1.0

13.0

9.5

Propagation Delay, Output Enable to Q

(Figure 3)

3.3

5.0

1.5

11.5

8.5

1.0

13.0

9.5

Propagation Delay, Output Enable to Q

(Figure 3)

3.3

5.0

1.5

12.5

11.0

1.0

14.5

12.5

Propagation Delay, Output Enable to Q

(Figure 3)

3.3

5.0

1.5

11.5

8.5

1.0

12.5

10.0

Maximum Input Capacitance

5.0

4.5

Typical @25°C,V_CC=5.0 V

C_PD

Power Dissipation Capacitance

^*Voltage Range 3.3 V is 3.3 V ±0.3 V

Voltage Range 5.0 V is 5.0 V ±0.5 V

TIMING REQUIREMENTS

(C_L=50pF,Input t_r=t_f=3.0 ns)

V_CC

Guaranteed Limits

Symbol

Parameter

Unit

25 °C

-40°C to

85°C

t_su

t_h

Minimum Setup Time, Input D to Latch

Enable (Figure 4)

3.3

5.0

5.5

4.0

6.0

4.5

Minimum Hold Time, Latch Enable to

Input D (Figure 4)

3.3

5.0

1.0

t_w

Minimum Pulse Width, Latch Enable

(Figure 2)

3.3

5.0

5.5

4.0

6.0

4.5

^*Voltage Range 3.3 V is 3.3 V ±0.3 V

Voltage Range 5.0 V is 5.0 V ±0.5 V

419

IN74AC373

Figure 1. Switching Waveforms

Figure 2. Switching Waveforms

Figure 3. Switching Waveforms

Figure 4. Switching Waveforms

EXPANDED LOGIC DIAGRAM

420

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