IW4027BN [INTEGRAL]
Dual JK Flip-Flop; 双JK触发器
| 型号： | IW4027BN |
| 厂家： | 
INTEGRAL CORP. |
| 描述： | Dual JK Flip-Flop |
| 文件： | 总6页 (文件大小：51K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TECHNICAL DATA
IW4027B
Dual JK Flip-Flop
The IW4027B is a Dual JK Flip-Flop which is edge-triggered and
features independent Set, Reset, and Clock inputs. Data is accepted
when the Clock is LOW and transferred to the output on the positive-
going edge of the Clock. The active HIGH asynchronous Reset and Set
are independent and override the J, K, or Clock inputs. The outputs are
buffered for best system performance.
·
·
Operating Voltage Range: 3.0 to 18 V
Maximum input current of 1 mA at 18 V over full package-
temperature range; 100 nA at 18 V and 25°C
Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
·
ORDERING INFORMATION
IW4027BN
IW4027BD SOIC
IZ4027B Chip
Plastic
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
TA = -55° to 125° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
FUNCTION TABLE
Inputs
Outputs
Set Reset Clock
J
K
X
X
X
L
Qn+1 Qn+1
L
H
H
L
L
L
L
H
L
H
L
L
L
L
X
X
X
X
X
X
L
L
H
H
H
L
H
No change
H
L
L
H
L
L
H
H
H
PIN 16 =VCC
PIN 8 = GND
H
Qn
Qn
X = don’t care
Qn+1 = State After Clock Positive Transition
INTEGRAL
1
IW4027B
MAXIMUM RATINGS*
Symbol
Parameter
Value
-0.5 to +20
-0.5 to VCC +0.5
±10
Unit
V
VCC
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
DC Input Current, per Pin
V
IN
V
IIN
PD
mA
mW
Power Dissipation in Still Air, Plastic DIP, SOIC
Package
500**
Ptot
Tstg
TL
Power Dissipation per Output Transistor
Storage Temperature
100
-65 to +150
260
mW
°C
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
°C
*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
**Derating: - Plastic DIP from -55 to +100°C
- SOIC Package from -55 to +65°C
- Plastic DIP: - 10 mW/°C from +100 to +125°C
- SOIC Package: : - 7 mW/°C from +65 to +125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
VCC
Parameter
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
Operating Temperature, All Package Types
Min
3.0
0
Max
18
Unit
V
V
IN
VCC
V
TA
-55
+125
°C
This device contains protection circuitry to guard against damage due to high static voltages or electric
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages
to this high-impedance circuit. For proper operation
V
IN
should be constrained to the range
GND£V £VCC.
IN
Unused inputs mu st always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused
outputs must be left open.
2
INTEGRAL
IW4027B
DC ELECTRICAL CHARACTERISTICS(Voltages Referenced to GND)
VCC
V
Guaranteed Limit
Symbol
Parameter
Test Conditions
³ -55°C
25°C
£125
Unit
V
°C
V
IH
Minimum High-Level
Input Voltage
VOUT=0.5 V or VCC - 0.5 V
VOUT=1.0 V or VCC - 1.0 V
VOUT=1.5 V or VCC - 1.5 V
5.0
10
15
3.5
7
3.5
7
3.5
7
11
11
11
V
Maximum Low -Level
Input Voltage
VOUT=0.5 V or VCC - 0.5 V
VOUT=1.0 V or VCC - 1.0 V
VOUT=1.5 V or VCC - 1.5 V
5.0
10
15
1.5
3
4
1.5
3
4
1.5
3
4
V
V
IL
VOH
Minimum High-Level
Output Voltage
V =GND or VCC
IN
5.0
10
15
5.0
10
15
4.95
9.95
14.95
4.5
9.0
13.5
4.95
9.95
14.95
4.5
9.0
13.5
4.95
9.95
14.95
4.5
9.0
13.5
V =1.5V, V =3.5V, IO=-1µA
IL
IH
V =3.0V, V =7.0V, IO=-1µA
IL
IH
V =4.0V, V =11V, IO=-1µA
IL
IH
VOL
Maximum Low-Level
Output Voltage
V =GND or VCC
5.0
10
15
5.0
10
15
0.05
0.05
0.05
0.5
1.0
1.5
0.05
0.05
0.05
0.5
1.0
1.5
0.05
0.05
0.05
0.5
1.0
1.5
V
IN
V =1.5V, V =3.5V, IO=1µA
IL
IH
V =3.0V, V =7.0V, IO=1µA
IL
IH
V =4.0V, V =11V, IO=1µA
IL
IH
IIN
Maximum Input
Leakage Current
V = GND or VCC
18
±0.1
±0.1
±1.0
mA
mA
IN
ICC
Maximum Quiescent
Supply Current
(per Package)
V = GND or VCC
IN
5.0
10
15
20
1.0
2.0
4.0
20
1.0
2.0
4.0
20
30
60
120
600
IOL
Minimum Output Low V = GND or VCC
mA
mA
IN
(Sink) Current
VOL=0.4 V
VOL=0.5 V
VOL=1.5 V
5.0
10
15
0.64
1.6
4.2
0.51
1.3
3.4
0.36
0.9
2.4
IOH
Minimum Output High V = GND or VCC
IN
(Source) Current
VOH=4.6 V
VOH=2.5 V
VOH=9.5 V
VOH=13.5 V
5.0
5.0
10
-0.64
–2.0
–1.6
–4.2
-0.51
–1.6
–1.3
–3.4
-0.36
–1.15
–0.9
15
–2.4
3
INTEGRAL
IW4027B
AC ELECTRICAL CHARACTERISTICS(CL=50pF, RL=200 kW, Input tr=tf=20 ns)
VCC
V
Guaranteed Limit
Symbol
fmax
Parameter
³ -55°C
25°C
£125°C
Unit
Maximum Clock Frequency
5.0
10
15
3.5
8
12
3.5
8
12
1.75
4
6
MHz
tPLH, tPHL Maximum Propagation Delay, Clock to Q or Q
5.0
10
15
300
130
90
300
130
90
600
260
180
ns
ns
ns
ns
pF
tPLH
Maximum Propagation Delay, Set to Q or Reset
to Q
5.0
10
15
300
130
90
300
130
90
600
260
180
tPHL
Maximum Propagation Delay, Set to Q or Reset
to Q
5.0
10
15
400
170
120
400
170
120
800
340
240
tTLH, tTHL Maximum Output Transition Time, Any Output
5.0
10
15
200
100
80
200
100
80
400
200
160
CIN
Maximum Input Capacitance
-
7.5
TIMING REQUIREMENTS(CL=50pF, RL=200 kW, Input tr=tf=20 ns)
VCC
Guaranteed Limit
Symbol
tw
Parameter
V
³ -55°C
25°C
£125°C
Unit
ns
Minimum Pulse Width, Clock
5.0
10
15
140
60
40
140
60
40
280
120
80
tw
Minimum Pulse Width, Set or Reset
Minimum Data Setup Time
5.0
10
15
180
80
50
180
80
50
360
160
100
ns
ns
ms
tsu
5.0
10
15
200
75
50
200
75
50
400
150
100
tr, tf
Maximum Input Rise or Fall Time, Clock
5.0
10
15
45
5
2
45
5
2
90
10
4
4
INTEGRAL
IW4027B
VCC
K(J)
tSU
0 V
VCC
0.5
0.9
0.5
CLOCK
0 V
tLH
tHL
tW
VOHCC
Q(Q)
0.5VCC
VOL
tREM
tPHL(tPLH
)
VCC
0 V
SET
(RESET)
0.5
VCC
SET
(RESET)
0 V
VCC
RESET
(SET)
0.5
tW2
0 V
V
UOHCC
Q(Q)
0.5VCC
0.1
0 V
tTHL(tTLH
)
tPHL(tPLH
)
Figure 1. Switching Waveforms
5
INTEGRAL
IW4027B
1.34 ±0.03
14
15
10
09
13 12 11
Chip marking
402720
(x=0.093, y=0.5825)
16
08
01
02
07
06
05
03 04
CHIP PAD DIAGRAM IZ4027B
Pad size 0.100 x 0.100 mm (Pad size is given as per passivation layer)
Thickness of chip 0.46 ± 0.02 mm
PAD LOCATION
Pad No
01
Symbol
Q2
X
Y
0.116
0.111
0.474
0.6555
0.8335
1.124
1.124
1.1245
1.124
1.124
0.8335
0.6555
0.474
0.111
0.116
0.116
0.4215
0.126
02
Q2
03
Clock 2
Reset 2
K2
0.1755
0.1755
0.174
04
05
06
J2
0.1235
0.4065
0.6855
0.9335
1.2165
1.166
07
Set 2
GND
Set 1
J1
08
09
10
11
K1
12
Reset 1
Clock 1
Q1
1.1645
1.1645
1.214
13
14
15
Q1
0.9185
0.7365
16
Vcc
6
INTEGRAL
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