PDLXT315ANE.A2 [INTEL]
Digital Transmission Interface, T-1(DS1), CMOS, PDIP16;
| 型号： | PDLXT315ANE.A2 |
| 厂家： | 
INTEL |
| 描述： | Digital Transmission Interface, T-1(DS1), CMOS, PDIP16 光电二极管 |
| 文件： | 总23页 (文件大小：293K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Intel® LXT312A/LXT315A
Low Power T1 PCM Repeaters/Transceivers
Datasheet
The LXT312A and LXT315A are integrated repeater/transceiver circuits for T1 carrier systems.
The LXT312A is a dual repeater/transceiver and the LXT315A is a single repeater/transceiver.
The LXT312A and LXT315A are designed to operate as regenerative repeaters/transceivers for
1.544 Mbps data rate PCM lines. Each includes all circuits required for a regenerative repeater/
transceiver system including the equalization network, automatic line build-out (ALBO), and a
state-of-the-art analog/digital clock extraction network tuned by an external crystal.
The key feature of the LXT312A family is that it requires only a crystal and a minimum of other
components to complete a repeater/transceiver design. Compared with traditional tuned coil-
type repeaters/transceivers, they offer significant savings in component and labor costs, along
with reduced voltage drop/power consumption, and improved reliability. To ensure performance
for all loop lengths, the LXT312A and LXT315A are 100% AC/DC tested using inputs
generated by Intel’s proprietary transmission line and network simulator.
The LXT312A and LXT315A are advanced CMOS devices which require only a single 5-volt
power supply.
Product Features
■ Integrated repeater/transceiver circuit on a ■ Recovered Clock Output
single CMOS chip
■ On-chip equalization network
■ On-chip ALBO
■ Low power consumption
■ No tuning coil
■ 0 to 36 dB dynamic range
■ -11 dB interference margin
■ Compatible with CB113/TA24
specifications
■ Single 5 V CMOS technology
■ Available in 16-pin PDIP and 44-pin PLCC
■ On-chip Loopback
Order Number: 249071-003
12-Jan-2006
Information in this document is provided in connection with Intel® products. No license, express or implied, by estoppel or otherwise, to any intellectual
property rights is granted by this document. Except as provided in Intel's Terms and Conditions of Sale for such products, Intel assumes no liability
whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to
fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Intel products are not
intended for use in medical, life saving, or life sustaining applications.
Intel may make changes to specifications and product descriptions at any time, without notice.
Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for
future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.
The Intel® LXT312A/LXT315A Repeater may contain design defects or errors known as errata which may cause the product to deviate from published
specifications. Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800-
548-4725 or by visiting Intel's website at http://www.intel.com.
Copyright © Intel Corporation, 2001-2006
*Third-party brands and names are the property of their respective owners.
Datasheet
Low Power T1 PCM Repeaters/Transceivers — Intel® LXT312A/LXT315A
Contents
1.0
2.0
3.0
Block Diagram....................................................................................................................7
Pin Assignments and Signal Descriptions..........................................................................8
Functional Description......................................................................................................10
3.1
3.2
3.3
3.4
Introduction..........................................................................................................10
Receive Function.................................................................................................10
Transmit Function................................................................................................10
Loopback Function (LXT312A Only) ...................................................................10
4.0
5.0
Application Information.....................................................................................................11
Test Specifications and Test Setups................................................................................13
5.1
5.2
Test Specifications ..............................................................................................13
Test Setups .........................................................................................................15
5.2.1 Receiver Jitter Tolerance Testing...........................................................15
5.2.2 Receiver Jitter Transfer Testing .............................................................15
5.2.3 Interference Margin Testing ...................................................................16
5.2.4 Gaussian Noise Immunity Testing..........................................................16
5.2.5 60 Hz Pulse Modulation Immunity Testing .............................................16
5.2.6 Receiver Timing Recovery Testing ........................................................17
6.0
7.0
Mechanical Specifications................................................................................................19
6.1 Top Label Markings.............................................................................................20
Product Ordering Information...........................................................................................22
Datasheet
3
Intel® LXT312A/LXT315A — Low Power T1 PCM Repeaters/Transceivers
Figures
1
LXT312A / LXT315A Block Diagram..................................................................... 7
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
LXT312A / LXT315A Pin Assignments and Package Markings............................ 8
Typical T1 Dual Repeater/Transceiver Application .............................................12
Alternate Timing Reference Circuitry ..................................................................12
Digital Timing Characteristics..............................................................................14
Receiver Jitter Tolerance Template ....................................................................15
Receiver Jitter Transfer Template.......................................................................15
Receiver Jitter Tolerance Test Setup..................................................................16
Receiver Jitter Transfer Test Setup ....................................................................16
Receiver Noise Interference Margin Test Setup .................................................17
Receiver Gaussian Noise Immunity Test Setup..................................................17
Receiver 60 Hz Pulse Amplitude Modulation Immunity Test Setup ....................17
Receiver Timing Recovery Phase Shift Modulation Test Setup..........................18
LXT312A / LXT315A Package Specifications.....................................................19
Sample PDIP Non-RoHS Package - Intel® PDLXT312ANE Transceiver............20
Sample PDIP RoHS Package - Intel® UCLXT312ANE Transceiver ...................20
Sample PDIP Non-RoHS Package - Intel® PDLXT315ANE Transceiver............21
Sample PDIP RoHS Package - Intel® UCLXT315ANE Transceiver ...................21
Ordering Information Matrix – Sample ................................................................23
Tables
1
2
3
4
5
6
7
8
LXT312A / LXT315A Repeater/Transceiver Package Top-Side Markings ........... 8
LXT312A / LXT315A Signal Descriptions ............................................................. 8
Crystal Specifications..........................................................................................11
Absolute Maximum Ratings ................................................................................13
Recommended Operating Conditions.................................................................13
Electrical Characteristics - Over Recommended Range.....................................13
Digital Timing Characteristics - Over Recommended Range..............................14
Product Ordering Information..............................................................................22
4
Datasheet
Low Power T1 PCM Repeaters/Transceivers — Intel® LXT312A/LXT315A
Revision History
LXT312A/LXT315A Repeater/Transceiver - Revision 003
Revision Date: 12-Jan-2006
Page
Number
Description
8
Modified Figure 2, “LXT312A / LXT315A Pin Assignments and Package Markings” .
Added Section 6.1, “Top Label Markings”.
20
22
Added Section 7.0, “Product Ordering Information”.
LXT312A/LXT315A Repeater/Transceiver - Revision 002
Revision Date: July 2003
Page
Number
Description
Front Page Removed first sentence, “This data sheet also applies to the LXT312/LXT315 products.”
5
Added new chapter title, Chapter 1.0, “Block Diagram”.
Removed from Figure 2, “LXT312A/LXT315A Pin Assignments and Package Markings”, the
package drawings for the LXT312PE and LXT315PE. Changed text from LXT312NE to
LXT312A. Changed text from LXT315NE to LXT315A.
6
In Table 2, “Intel® LXT312A / LXT315A Signal Descriptions”, removed the ‘PLCC’ column.
Changed text for first footnote and removed second footnote.
6
10
17
In Figure 3, “Typical T1 Dual Repeater/Transceiver Application”, changed text from LXT31
In Chapter 6.0, “Mechanical Specifications”, changed title of Figure 14, “LXT312NE / LXT315NE
Package Specifications” to “LXT312A / LXT315A Package Specifications”.
In Chapter 6.0, “Mechanical Specifications”, removed Figure 15, “LXT312PE / LXT315PE
Package Specifications”.
-
LXT312A/LXT315A Repeater/Transceiver - Revision 001
Revision Date: January 2001
-
Initial Release
Datasheet
5
Intel® LXT312A/LXT315A — Low Power T1 PCM Repeaters/Transceivers
6
Datasheet
Low Power T1 PCM Repeaters/Transceivers — LXT312A/LXT315A
1.0
Block Diagram
Figure 1 is a block diagram of the LXT312A/LXT315A.
Figure 1. LXT312A / LXT315A Block Diagram
RCLK1
TTIP1
Timing
Recovery
and
Transmit
Control
Noise and
Receive
Equalizer
RTIP1
Crosstalk
Filter
Line
Drivers
RRING1
TRING1
Slicers and
Peak Detectors
XTAL IN
Control
Clock
Generator
Equalizer
Control
XTAL OUT
Equalizer
Control
Loop-
back
LPBK
TTIP2
Slicers and
Peak Detectors
Noise and
Timing
Recovery
and
Transmit
Control
Receive
Equalizer
RTIP2
Line
Drivers
Crosstalk
Filter
TRING2
RCLK2
RRING2
Datasheet
7
LXT312A/LXT315A — Low Power T1 PCM Repeaters/Transceivers
2.0
Pin Assignments and Signal Descriptions
Table 1 lists the top-side markings for the LXT312A/315A transceivers.
Table 1. LXT312A / LXT315A Repeater/Transceiver Package Top-Side Markings
Location of
Marking
Marking
Definition
Part Number
Center of package
Number of the unique identifier for this product family
Two-digit number of particular silicon revision, also known as a
‘stepping’. (For information on specific silicon steppings, see
specification update documents for the LXT312A/LXT315A repeater/
transceiver.)
Revision
Number
To the right of the
part number
Directly underneath
part number
Lot Number
A lot (that is, ‘batch’) number
Directly underneath
lot number
FPO Number
The Finish Process Order number
Figure 2. LXT312A / LXT315A Pin Assignments and Package Markings
LXT312A
LXT315A
RTIP1
RRING1
VCC
RCLK1
RCLK2
TTIP1
1
2
3
16
15
14
RTIP1
RRING1
VCC
RCLK1
N/C
TTIP1
TRING1
GNDT
1
2
3
16
15
14
GNDR
RTIP2
RRING2
LPBK
XTO
XTI
TTIP2
TRING2
GNDR
N/C
N/C
LPBK
XTO
XTI
4
5
13
12
4
5
13
12
6
7
11
10
6
7
11
10
TRING1
GNDT
N/C
N/C
8
9
8
9
Table 2. LXT312A / LXT315A Signal Descriptions (Sheet 1 of 2)
Pin
Symbol
I/O
Description
1
2
RTIP1
I
I
Repeater Tip and Ring Inputs.
RRING1
Tip and ring receive inputs for Channel 1.
Power Supply.
3
4
VCC
–
Power supply input for all circuits. +5 V (±0.25 V).
Recovered Clock.
RCLK1
O
Clock output recovered from Channel 1 receive input.
Recovered Clock.
51
RCLK2
O
On the LXT312A dual repeater/transceiver, this is the recovered clock output for
Channel 2.
6
7
TTIP1
O
O
Repeater Tip and Ring Outputs.
TRING1
Open-drain output drivers for Channel 1.
1. On the LXT312A and LXT315A single repeater/transceiver, these pins are not connected (N/C).
8
Datasheet
Low Power T1 PCM Repeaters/Transceivers — LXT312A/LXT315A
Table 2. LXT312A / LXT315A Signal Descriptions (Sheet 2 of 2)
Pin
Symbol
I/O
Description
Transmit Ground.
8
GNDT
–
Ground return for transmit circuits.
Side 2 Ring and Tip Outputs.
91
TRING2
TTIP2
O
O
101
On the LXT312A dual repeater/transceiver, these are open-drain output drivers
for Channel 2.
Crystal Oscillator Pins.
11
12
XTI
I
A 6.176-MHz crystal should be connected across these two pins. For alternative
timing references, refer to Application Information.
XTO
O
Loopback Control.
On the LXT312A, this pin controls Loopback Selection:
Low = No Loopback.
13
LPBK
I
High = Loopback side 1 data to side 2.
On LXT315A single repeater/transceiver, this pin must be connected to
GND.
Side 2 Ring and Tip Inputs.
141
151
RRING2
RTIP2
I
I
On the LXT312A repeater/transceiver, these are tip and ring receive inputs for
Channel 2.
Receive Ground.
16
GNDR
–
Ground return for receive circuits.
1. On the LXT312A and LXT315A single repeater/transceiver, these pins are not connected (N/C).
Datasheet
9
LXT312A/LXT315A — Low Power T1 PCM Repeaters/Transceivers
3.0
Functional Description
3.1
Introduction
PCM signals are attenuated and dispersed in time as they travel down a transmission line.
Repeaters/transceivers are required to amplify, reshape, regenerate, and retime the PCM signal,
then retransmit it.
The LXT312A and LXT315A each contain all the circuits required to build a complete PCM
repeater/transceiver. The operational range of the repeaters/transceivers is 0 to 36 dB of cable loss
at 772 kHz (equal to 6300 feet of 22 gauge pulp-insulated cable between repeaters).
3.2
Receive Function
The signal is received through a 1:1 transformer at RTIP and RRING and equalized for up to 36 dB
of cable loss. The receive equalizer uses a proprietary on-chip adaptive filter technique which is
equivalent to a 3-port ALBO equalizer design. The monolithic structure of the filter and the
absence of external components provide excellent ISI and dispersion elimination, and accurate data
transfer over temperature.
Receiver noise immunity is optimized by a proprietary crosstalk elimination filter which eliminates
the unnecessary high-frequency components of the received signal.
The equalized signal is full wave rectified and used to generate information for the timing recovery
circuit. This circuit uses a mixed analog/digital technique to provide a low-jitter PLL similar to a
tuned tank with excellent jitter tracking ability. But unlike a tuned tank, the free running frequency
of the PLL clock is accurately controlled by the external reference crystal. No adjustment is
required. Refer to Table 3 for crystal specifications.
Recovered clock signals are available on the RCLK pins for applications that require bit stream
synchronization.
3.3
3.4
Transmit Function
Recovered data is re-synchronized to the recovered clock signal by the timing recovery and
transmit control section. The data is then retransmitted to the network via two open-drain, high-
voltage transistors.
Loopback Function (LXT312A Only)
The LXT312A includes a loopback function for network diagnostics. With the LPBK pin Low, the
repeater/transceiver operates in the normal mode. When the LPBK pin is pulled High, the data is
looped back from side 1 to side 2.
10
Datasheet
Low Power T1 PCM Repeaters/Transceivers — LXT312A/LXT315A
4.0
Application Information
Figure 3 shows a typical T1 dual repeater/transceiver application using an LXT312A repeater/
transceiver with standard PCB edge connectors. It includes a jumper-selectable shorting option
(dashed lines at connector pins 2 and 7) for the fault location circuitry. Table 3 lists the
specifications for the crystal used with the LXT312A or LXT315A repeater.
For applications where a crystal is not appropriate, a 1.544 MHz or 6.176 MHz, CMOS-level (High
≥ 4.5V, Low ≤ 0.5V) oscillator may be connected to XTI. In this situation, XTO must be tied to
VCC and GND via a voltage divider as shown in Figure 4.
Table 3. Crystal Specifications
Parameter
Specification
6.176 MHz
Frequency
Frequency tolerance1
Effective series resistance
Crystal cut
± 50 ppm
40 Ω Maximum
AT
Resonance
Parallel
Maximum drive level
Mode of operation
2.0 mW
Fundamental
1. @ 25 °C, C Load = 10 pF and from -40 °C to +85 °C
(Ref 25 °C reading).
Datasheet
11
LXT312A/LXT315A — Low Power T1 PCM Repeaters/Transceivers
Figure 3. Typical T1 Dual Repeater/Transceiver Application
SCHOTT
#10951
SCHOTT
#10951
5.6 Ω 1W
5.6 Ω 1W
5
12
RCV2
11
RCV1
100 Ω
100 Ω
R*
LXT312A
R*
6
1ct : 1
1 : 1ct
5.6 Ω 1W
5.6 Ω 1W
RTIP1
GNDR
RTIP2
RRING2
LPBK
R*
R*
RRING1
VCC
60 Ω
1 µF
RCLK1
RCLK2
TTIP1
5.1 V
XTO
6.176 MHz
XTI
TTIP2
6.3 V
33 Ω
TRING1
GNDT
5.6 Ω 1W
5.6 Ω 1W
33 Ω
TRING2
5.6 Ω 1W
4
**
8
XMT1
33 Ω
**
33 Ω
XMT2
3
2
5.6 Ω 1W
100 µH
9
7
240 Ω 100 µH
1 : 1ct : 3ct
100 µF
0.1 µF
240 Ω
10
**
3ct : 1 : 1ct
SCHOTT
#12535-9027
SCHOTT
**
#12535-9027
NOTES:
*
RTIP/RRING Resistors are used to provide surge protection. Values can be 0 – 100 Ω.
** TTIP/TRING Zeners are used to reduce surge susceptibility. Values can be 12 – 14 V.
Figure 4. Alternate Timing Reference Circuitry
LXT312A
Vcc
2 kΩ
XTO
3 kΩ
Oscillator
(See Note 1)
CMOS-level Input
XTI
1. Oscillator drive levels:
High 4.5 V
Low 0.5 V
12
Datasheet
Low Power T1 PCM Repeaters/Transceivers — LXT312A/LXT315A
5.0
Test Specifications and Test Setups
5.1
Test Specifications
Note: Minimum and maximum values in Table 4 through Table 7 and Figure 5 through Figure 13
represent the performance specifications of the LXT312A/315A repeaters/transceivers and are
guaranteed by test except, as noted, by design.
Table 4. Absolute Maximum Ratings
Parameter
Symbol
Unit
Supply voltage (min to max)
Driver voltage
VCC
VOH
ICC
-0.3 V to +6 V
18 V
Receiver current
100 mA
Operating temperature (min to max)
Storage temperature (min to max)
TOP
TST
-40 °C to +85 °C
-65 °C to +150 °C
Caution: Exceeding these values may cause permanent damage. Functional operation under these
conditions is not implied. Exposure to maximum rating conditions for extended periods may affect
device reliability.
Table 5. Recommended Operating Conditions
Parameter
Symbol
Min
Typ
Max
Unit
Supply voltage
Operating temperature
VCC
TOP
4.75
-40
5.0
—
5.25
85
V
° C
Table 6. Electrical Characteristics - Over Recommended Range
Parameter
Interference margin
Symbol
Min
Typ1
Max
Unit
SNR
–
-11
-36
–
–
–
–
0
dB
dB
V
Receiver dynamic range
(IOL = 1.6 mA
(IOL = 10 μA)
(IOH = 0.4 mA
(IOH < 10 μA)
VOL
VOL
VOH
VOH
VIH
VIL
–
0.4
–
Digital outputs - low
–
0.2
–
V
2.4
–
–
V
Digital outputs - high
4.5
–
–
V
Digital inputs - high
Digital inputs - low
2.0
–
–
V
–
0.8
V
1. Typical values are at 25° C and are for design aid only; they are not guaranteed and not subject to
production testing.
2. Measured with CLOAD ≤ 10 pF, RLOAD > 100 kΩ.
Datasheet
13
LXT312A/LXT315A — Low Power T1 PCM Repeaters/Transceivers
Table 6. Electrical Characteristics - Over Recommended Range
Parameter
Symbol
Min
Typ1
Max
Unit
All zeros
All ones
ICC
ICC
ILL
–
–
15
–
22
23
mA
mA
μA
V
Supply current (from VCC
supply)2
Driver leakage current (VDVR = 18 V)
–
–
150
0.95
Driver pulse amplitude (Driver output IO = 20 mA)
AP
0.65
–
1. Typical values are at 25° C and are for design aid only; they are not guaranteed and not subject to
production testing.
2. Measured with CLOAD ≤ 10 pF, RLOAD > 100 kΩ.
Figure 5. Digital Timing Characteristics
tF
tR
RCLK
tTH
tTSU
TTIP,
TRIN
(with external pull-up)
tPW
Table 7. Digital Timing Characteristics - Over Recommended Range
Parameter
Driver pulse width
Symbol
Min
Typ1
Max
Unit
t
PW
299
–
324
–
349
15
18
–
ns
ns
ns
ns
ns
Driver pulse imbalance
–
Rise and fall time (any digital output2)
Setup time - TTIP/TRING to RCLK
Hold time - TTIP/TRING from RCLK
t
R / tF
–
–
t
TSU
90
90
–
t
TH
–
–
1. Typical values are at 25° C and are for design aid only; they are not guaranteed and not subject to
production testing.
2. Measured with CLOAD ≤ 10 pF, RLOAD > 100 kΩ.
14
Datasheet
Low Power T1 PCM Repeaters/Transceivers — LXT312A/LXT315A
5.2
Test Setups
Both the LXT312A and LXT315A are fully tested (100% AC and DC parameters) using inputs
generated by Intel’s proprietary transmission line and network simulator. Device testing includes
receiver jitter tolerance, jitter transfer and interference margin, and receiver immunity to Gaussian
and 60 Hz noise. Specifications and bench test setups are shown in Figure 6 through Figure 13.
5.2.1
5.2.2
Receiver Jitter Tolerance Testing
Receiver jitter tolerance meets the template shown in Figure 6, when operated at line losses from 0
to 36 dB. Figure 8 shows the setup used for jitter tolerance testing.
Receiver Jitter Transfer Testing
Receiver jitter transfer meets the template shown in Figure 7, when operated with line losses from
0 to 36 dB and input jitter amplitude of 0.15 UI peak-to-peak. Jitter gain at a given frequency is
defined as the difference between intrinsic jitter and additive jitter at the measurement frequency,
divided by the amplitude of the input jitter. Figure 9 shows the setup used for jitter transfer testing.
Figure 6. Receiver Jitter Tolerance Template
-20 dB/Decade Slope
Acceptable Range
0.3
UI
6430 Hz
10 Hz
40 kHz
Jitter Frequency
Figure 7. Receiver Jitter Transfer Template
0.1
0
-20 dB/Decade
Slope
Acceptable Range
10
9650
Jitter Frequency (Hz)
Datasheet
15
LXT312A/LXT315A — Low Power T1 PCM Repeaters/Transceivers
Figure 8. Receiver Jitter Tolerance Test Setup
Cable
0 dB to 36 dB
@ 772 kHz
QRSS
Source with
Zero
LXT312A/
LXT315A
Repeater/
Transceiver
Sinusoidal
Jitter
Modulator
Error
Detector
Restriction
Figure 9. Receiver Jitter Transfer Test Setup
Cable
0 dB to 36 dB
@ 772 kHz
QRSS
Source with
Zero
LXT312A/
LXT315A
Repeater/
Transceiver
Sinusoidal
Jitter
Modulator
Spectrum
Analyzer
Jitter
Demodulator
Restriction
5.2.3
Interference Margin Testing
The LXT312A and LXT315A receiver noise interference margin is specified at a minimum of -11
dB for line losses from 0 dB to 36 dB. The test setup used to measure noise margin is shown in
Figure 10.
5.2.4
5.2.5
Gaussian Noise Immunity Testing
Receiver immunity to Gaussian noise is specified at a maximum BER of 10-7 for a quasi-random
T1 signal at 1.544 MHz ( 130 ppm). The receiver must be immune to noise power expressed as Np
= -(L + 4.7) dBm, where L corresponds to the line loss and is valid for 0 to 36 dB.
Figure 11 shows the setup used to test Gaussian noise immunity. The noise source is Gaussian to at
least 6 sigma and filtered to simulate expected noise in a binder group (per AT&T TA #24/CB113).
60 Hz Pulse Modulation Immunity Testing
Receiver immunity to 60 Hz pulse amplitude modulation is specified using the Gaussian noise
source described in the previous paragraph on Gaussian noise immunity. Pulse amplitude
modulation is specified between 10% and 30% of the nominal amplitude (see AT&T TA #24/
CB113 for details on the modulation envelope). Figure 12 shows the setup used for testing receiver
immunity to 60 Hz pulse amplitude modulation. The following data reflect noise power for 10-7
BER at each modulation level, where L corresponds to the line loss and is valid for 0 to 36 dB:
Modulation Level
Noise Power
10%
20%
30%
Np = -(L + 5.7) dBm
Np = -(L + 6.7) dBm
Np = -(L + 8.7) dBm
16
Datasheet
Low Power T1 PCM Repeaters/Transceivers — LXT312A/LXT315A
5.2.6
Receiver Timing Recovery Testing
Receiver timing recovery phase shift modulation for repetitive 8-bit patterns is specified at less
than 0.07 UI. This is tested using any two out of 35 possible 8-bit patterns and measuring the
change in output pulse timing from one pattern to the other (see AT&T TA #24/CB113 for details
on patterns). The switching rate from one pattern to the other is specified at between 300 Hz and
500 Hz. See Figure 13 for the setup used to test receiver timing recovery phase shift modulation.
Figure 10. Receiver Noise Interference Margin Test Setup
Line Out
QRSS Source
with Artificial Line
LXT312A/
LXT315A
Interference Generator
and Error Detector
Repeater/
Transceiver
Line In
(Lear Siegler 415A-2 or Equivalent)
Figure 11. Receiver Gaussian Noise Immunity Test Setup
Cable
0 dB to 36 dB
@ 772 kHz
LXT312A/
LXT315A
Repeater/
Transceiver
QRSS
Source with
Zero
Restriction
Σ
Gaussian
White Noise
Generator
Filter
Compatible
with TA #24
Error
Detector
Figure 12. Receiver 60 Hz Pulse Amplitude Modulation Immunity Test Setup
Cable
0 dB to 36 dB
@ 772 kHz
LXT312A/
LXT315A
Repeater/
Transceiver
QRSS
Source with
Zero
60 Hz
Amplitude
Modulator
Σ
Restriction
Gaussian
White Noise
Generator
Filter
Compatible
with TA #24
Error
Detector
Datasheet
17
LXT312A/LXT315A — Low Power T1 PCM Repeaters/Transceivers
Figure 13. Receiver Timing Recovery Phase Shift Modulation Test Setup
Cable
0 dB to 36 dB
@ 772 kHz
Transmitter
LXT312A/
LXT315A
Repeater/
Transceiver
Pattern
Setting
Pattern
Setting
Pattern
Switching
Control
Phase
Shift
Measuring
18
Datasheet
Low Power T1 PCM Repeaters/Transceivers — LXT312A/LXT315A
6.0
Mechanical Specifications
Figure 14. LXT312A / LXT315A Package Specifications
16-Pin Plastic Dual In-Line Package
•
•
Part Number LXT312A and LXT315A
Extended Temperature Range (-40 °C to +85 °C)
E
1
E1
eA
eB
b2
D
A2
A
L
b3
b
e
Inches
Millimeters
Dim
Min
Max
Min
Max
A
A2
b
–
0.210
0.195
0.022
0.070
0.045
0.775
0.325
0.280
–
5.334
4.953
0.559
1.778
1.143
19.685
8.255
7.112
0.115
0.014
0.045
0.030
0.735
0.300
0.240
2.921
0.356
1.143
0.762
18.669
7.620
6.096
b2
b3
D
E
E1
e
0.100 BSC (Nominal)
0.300 BSC (Nominal)
2.540 BSC (Nominal)
7.620 BSC (Nominal)
eA
eB
L
–
0.430
0.150
–
10.922
3.810
0.115
2.921
1. BSC: Basic Spacing between Centers
Datasheet
19
LXT312A/LXT315A — Low Power T1 PCM Repeaters/Transceivers
6.1
Top Label Markings
Figure 15 shows a sample PDIP non-RoHS package for the LXT312A Transceiver.
Notes:
1. In contrast to the Pb-Free (RoHS-compliant) PDIP package, the non-RoHS-compliant package
does not have the “e3” symbol in the last line of the package label.
2. Further information regarding RoHS and lead-free components can be obtained from your
local Intel representative.
For general information, see http://www.intel.com/technology/silicon/leadfree.htm.
Figure 15. Sample PDIP Non-RoHS Package - Intel® PDLXT312ANE Transceiver
Part Number
LXT312ANE A2
FPO Number
XXXXXXXX
BSMC
Pin 1
Bottom Side Mark Code
B5584-01
Figure 16 shows a sample Pb-Free (RoHS-compliant) PDIP package for the
LXT312A Transceiver.
Figure 16. Sample PDIP RoHS Package - Intel® UCLXT312ANE Transceiver
Part Number
UCLXT312E A2
XXXXXXXX
FPO Number
Pb-Free Indication
BSMC
e3
Pin 1
Bottom Side Mark Code
B5585-01
20
Datasheet
Low Power T1 PCM Repeaters/Transceivers — LXT312A/LXT315A
Figure 17 shows a sample PDIP non-RoHS package for the LXT315A Transceiver.
Note: In contrast to the Pb-Free (RoHS-compliant) PDIP package, the non-RoHS-compliant package
does not have the “e3” symbol in the last line of the package label. .
Figure 17. Sample PDIP Non-RoHS Package - Intel® PDLXT315ANE Transceiver
Part Number
LXT315ANE A2
FPO Number
XXXXXXXX
BSMC
Pin 1
Bottom Side Mark Code
B5582-01
Figure 18 shows a sample PDIP RoHS package for the LXT315A Transceiver.
Figure 18. Sample PDIP RoHS Package - Intel® UCLXT315ANE Transceiver
Part Number
UCLXT315E A2
XXXXXXXX
FPO Number
Pb-Free Indication
BSMC
e3
Pin 1
Bottom Side Mark Code
B5583-01
Datasheet
21
LXT312A/LXT315A — Low Power T1 PCM Repeaters/Transceivers
7.0
Product Ordering Information
Table 8 lists product ordering information for the LXT312A/LXT315A Transceivers.
Table 8. Product Ordering Information
Package
Type
Pin
RoHS
Product Number
Revision
Figure
Count Compliant
Figure 15, “Sample PDIP Non-RoHS
Package - Intel® PDLXT312ANE
Transceiver”
PDLXT312ANE.A2
UCLXT312ANE.A2
PDLXT315ANE.A2
UCLXT315ANE.A2
A2
A2
A2
A2
PDIP
PDIP
PDIP
PDIP
16
16
16
16
No
Yes
No
Figure 16, “Sample PDIP RoHS Package
- Intel® UCLXT312ANE Transceiver”
Figure 17, “Sample PDIP Non-RoHS
Package - Intel® PDLXT315ANE
Transceiver”
Figure 18, “Sample PDIP RoHS Package
- Intel® UCLXT315ANE Transceiver”
Yes
22
Datasheet
Low Power T1 PCM Repeaters/Transceivers — LXT312A/LXT315A
Figure 19 shows an order matrix with sample information on how to order a LXT312A/LXT315A
product.
Figure 19. Ordering Information Matrix – Sample
PD
LXT
312A
A
N
A2
Product Revision
xn = 2 Alphanumeric characters
Temperature Range
A = Ambient (0 – 550 C)
C = Commercial(0 – 700 C)
E = Extended (-40 – 850 C)
Internal Package Designator
L = LQFP
P = PLCC
N = DIP
Q = PQFP
H = QFP
T = TQFP
B = BGA
C = CBGA
E = TBGA
K = HSBGA (BGA with heat slug
Product Code
xxxxx = 3-5 Digit alphanumeric
IXA Product Prefix
LXT = PHY layer device
IXE = Switching engine
IXF = Formatting device(MAC/Framer)
IXP = Network processor
Intel Package Designator
Pb-Free
Package
Leaded
WB
WJ
HQFP
LQFP
TQFP
HB
DJ
FA
FA
BJ
JA
TQFP
PQFP
PQFP
PQFP
QFN
WD
QU
EG
WG
UB
UC
EP
HD
KU
S
HG
LB
PD
PA
N
QFN
PDIP
SSOP
PLCC
MMAP
MMAP
PBGA
PBGA
PBGA
PBGA
CBGA
FCBGA
TBGA
EE
RU
PC
HZ
RC
FL
FW
GD
GW
HF
HL
TL
EL
PR
LU
EW
WF
JP
SC
B5589-01
Datasheet
23
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