CA5470E [INTERSIL]
Quad, 14MHz, Microprocessor BiMOS-E Operational Amplifier with MOSFET Input/Bipolar Output; 四， 14MHz ，微处理器采用BiMOS -E与MOSFET的输入运算放大器/双极性输出
| 型号： | CA5470E |
| 厂家： | 
Intersil |
| 描述： | Quad, 14MHz, Microprocessor BiMOS-E Operational Amplifier with MOSFET Input/Bipolar Output |
| 文件： | 总5页 (文件大小：59K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CA5470
Quad, 14MHz, Microprocessor BiMOS-E
Operational Amplifier with MOSFET Input/Bipolar Output
November 1996
Features
Description
The CA5470 is an operational amplifier that combines the
advantages of both high speed CMOS and bipolar transistors
on a single monolithic chip. It is constructed in the BiMOS-E
process which adds drain-extension implants to 3µm polygate
CMOS, enhancing both the voltage capability and providing
vertical bipolar transistors for broadband analog/digital func-
tions. This process lends itself easily to high speed operational
amplifiers, comparators, analog switches and interface periph-
erals, resulting in twice the speed of the conventional CMOS
transistors having similar feature size.
• High Speed CMOS Input Stage Provides
12
- Very High Z . . . . . . . . . . . . . . . . 5TΩ (5 x 10 Ω) (Typ)
I
- Very Low l . . . . . . . . . . . 0.5pA (Typ) at 5V Operation
I
- Very Low I . . . . . . . . . 0.5pA (Typ) at 5V Operation
IO
• ESD Protection to 2000V
• 3V to 16V Power Supply Operation
• Fully Guaranteed Specifications Over Full Military
Range
• Wide BW (14MHz); High SR (5V/µs) at 5V Supply
BiMOS-E are broadbased bipolar transistors that have high
transconductance, gains more constant with current level, sta-
ble “precision” base-emitter offset voltages and superior drive
capability. Excellent interface with environmental potentials
enable use in 5V logic systems and future 3.3V logic systems.
Refer to Application Note AN8811.
• Wide V
lCR
Range From -0.5V to 3.7V (Typ) at 5V Supply
• Ideally Suited for CMOS and HCMOS Applications
Applications
• Bar Code Readers
ESD capability exceeds the standard 2000V level. The
CA5470 series can operate with single supply voltages from
3V to 16V or ±1.5V to ±8V. They have guaranteed specifica-
tions at both 5V and ±7.5V at room temperature as well as
• Photodiode Amplifiers (IR)
• Microprocessor Buffering
• Ground Reference Single Supply Amplifiers
• Fast Sample and Hold
• Timers
o
o
over the full -55 C to 125 C military range.
Ordering Information
• Voltage Controlled Oscillators
• Voltage Followers
PART NUMBER
(BRAND)
TEMP.
RANGE ( C)
PKG.
NO.
o
PACKAGE
• V to l Converters
CA5470E
-55 to 125 14 Ld PDIP
-55 to 125 14 Ld SOIC
E14.3
M14.15
• Peak Detectors
CA5470M
(5470)
• Precision Rectifiers
• 5V Logic Systems
CA5470M96
(5470)
-55 to 125 14 Ld SOIC Tape M14.15
and Reel
• 3V Logic Systems
Pinout
CA5470 (PDIP, SOIC)
TOP VIEW
OUTPUT 1
NEG. INPUT 1
POS. INPUT 1
V+
1
2
3
4
5
6
7
14 OUTPUT 4
13 NEG. INPUT 4
12 POS. INPUT 4
11 V-
1
4
+ +
-
-
-
-
POS. INPUT 2
NEG. INPUT 2
OUTPUT 2
10 POS. INPUT 3
+ +
2
3
9
8
NEG. INPUT 3
OUTPUT 3
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
File Number 1946.3
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
3-156
CA5470
Absolute Maximum Ratings
DC Supply Voltage (Between V+ And V- Terminals) . . . . . . . . . 16V Thermal Resistance (Typical, Note 1)
Thermal Information
o
θJA ( C/W)
Differential Input Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8V
Input Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . (V+ +8V) to (V- -0.5V)
Input Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1mA
Output Short Circuit Duration (Note 1) . . . . . . . . . . . . . . . . Indefinite
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Maximum Junction Temperature (Die). . . . . . . . . . . . . . . . . . . . 175 C
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150 C
Maximum Storage Temperature Range . . . . . . . . . -65 C to 150 C
80
175
o
o
o
o
o
Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . . 300 C
(SOIC - Lead Tips Only)
Operating Conditions
o
o
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -55 C to 125 C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Short circuit may be applied to ground or to either supply.
2. θ is measured with the component mounted on an evaluation PC board in free air.
JA
o
Electrical Specifications Typical Values Intended Only for Design Guidance at V+ = 5V, V- = 0V, T = 25 C, Unless Otherwise Specified
A
PARAMETER
Input Resistance
SYMBOL
TEST CONDITIONS
TYPICAL VALUES
UNITS
TΩ
R
C
5
3.1
14
5
I
I
Input Capacitance
Unity Gain Crossover Frequency
Slew Rate
f = 1MHz
pF
f
MHz
V/µs
T
SR
V
= 3.65V
P-P
OUT
C = 25pF, R = 2kΩ
L
Transient Response:
Rise Time/Fall Time
Overshoot
L
(Voltage Follower)
t
27/25
20
ns
%
r
OS
Settling Time (To <0.1%, V = 4V
IN
)
t
C
= 25pF, R = 2kΩ
1
µs
P-P
S
L
L
(Voltage Follower)
Full Power BW, SR = 5V/µs
FPBW
A
= 1, V = 3.65V
436
kHz
V
OUT P-P
o
Electrical Specifications T = 25 C, V+ = 5V, V- = GND
A
PARAMETER
Input Offset Voltage
SYMBOL
|V
TEST CONDITIONS
MIN
-
TYP
MAX
UNITS
|
6
22
mV
pA
pA
V
IO
Input Offset Current
Input Current
|I
|
-
0.5
50 (Note 3)
IO
I
-
0.5
50 (Note 3)
I
Common Mode Input Range
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Positive Output Voltage Swing
Negative Output Voltage Swing
Total Supply Current
Unity Gain Bandwidth Product
Slew Rate
V
3.5
55
60
4
-0.5 to 3.7
0
ICR
CMRR
PSRR
V
= 0V to 3.5V
70
75
4.4
0.06
6
-
dB
dB
V
ICR
∆V = 2V
-
V
+
R
R
V
= 2kΩ to GND
= 2kΩ to GND
= 2.5V, R = ∞
-
OM
L
L
V
-
-
0.10
V
OM
I
-
7
-
mA
MHz
V/µs
SUPPLY
OUT
L
f
10
4
14
5
T
SR
-
Output Current
Source to opposite supply
Sink to opposite supply
Open Loop Gain
I
4
5.5
1.2
90
-
-
-
mA
mA
dB
SOURCE
I
1.0
80
SlNK
A
0.5V to 3.5V, R = 10kΩ
L
OL
NOTE:
3. This is the lowest value that can be tested reliably. Almost all devices will be <10pA.
3-157
CA5470
o
o
Electrical Specifications T = -55 C to 125 C, V+ = 5V, V- = GND
A
PARAMETER
Input Offset Voltage
SYMBOL
|V
TEST CONDITIONS
MIN
-
TYP
MAX
UNITS
mV
pA
|
6
550
550
-0.5 to 3.7
65
25
IO
Input Offset Current
|I
|
-
5500
IO
Input Current
I
-
11000
pA
I
Common Mode Input Range
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Positive Output Voltage Swing
Negative Output Voltage Swing
Total Supply Current
V
3.5
50
58
3.8
-
0
V
ICR
CMRR
PSRR
V
= 0V to 3.5V
-
dB
ICR
∆V = 2V
75
-
dB
V
+
R
R
= 2kΩ to GND
= 2kΩ to GND
4.2
-
0.11
11
-
V
OM
L
L
V
-
0.08
9
V
OM
SUPPLY
I
V
= 2.5V
-
mA
MHz
V/µs
OUT
Unity Gain Bandwidth Product
Slew Rate
f
8
12
T
SR
3
5
-
Output Current
Source to opposite supply
Sink to opposite supply
Open Loop Gain
I
4
5.5
1.2
90
-
-
-
mA
mA
dB
SOURCE
I
0.8
80
SlNK
A
0.5V to 3.5V, R = 10kΩ
OL
L
o
Electrical Specifications T = 25 C, V
= ±7.5V
A
SUPPLY
SYMBOL
|V
PARAMETER
Input Offset Voltage
TEST CONDITIONS
MIN
-
TYP
MAX
UNITS
mV
pA
|
5
25
IO
Input Offset Current
|I
|
-
0.5
50 (Note 4)
IO
Input Current
I
-
1
-7.8 to 6.0
70
50 (Note 4)
pA
I
Common Mode Input Range
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Positive Output Voltage Swing
V
5.8
60
60
-7.5
V
ICR
CMRR
PSRR
V
= 0V to 13.3V
-
-
dB
ICR
∆V = 1V
76
dB
V
+
OM
R
R
= 2kΩ to GND
= 10kΩ to GND
6.3
6.4
6.5
6.6
-
-
V
V
L
L
Negative Output Voltage Swing
V
-
OM
R
R
V
= 2kΩ to GND
= 10kΩ to GND
= GND, R = ∞
-
-
-2.6
-7.3
10
-2
-7.1
12
-
V
L
L
V
Total Supply Current
Unity Gain Bandwidth Product
Slew Rate
I
-
mA
MHz
V/µs
SUPPLY
OUT
L
f
12
4
16
T
SR
7
-
Output Current
Source to opposite supply
Sink to opposite supply
Open Loop Gain
I
6.2
1
6.8
1.4
90
-
-
-
mA
mA
dB
SOURCE
I
SlNK
A
-5V to +5V, R = 10kΩ
80
OL
L
NOTE:
4. This is the lowest value that can be tested reliably. Almost all devices will be <10pA.
3-158
CA5470
o
o
Electrical Specifications T = -55 C to 125 C, V
= ±7.5V
SUPPLY
A
PARAMETER
Input Offset Voltage
SYMBOL
|V
TEST CONDITIONS
MIN
-
TYP
5
MAX
30
UNITS
mV
pA
|
IO
Input Offset Current
|I
|
-
550
5500
11000
-7.5
-
IO
Input Current
I
-
1100
-7.8 to 6.0
70
pA
I
Common Mode Input Range
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Positive Output Voltage Swing
V
5.8
58
60
V
ICR
CMRR
PSRR
V
= 0V to 3.5V
dB
ICR
∆V = 1V
76
-
dB
V
+
OM
R
R
= 2kΩ to GND
= 10kΩ to GND
4.75
6.1
5.5
6.4
-
-
V
V
L
L
Negative Output Voltage Swing
V
-
OM
R
R
V
= 2kΩ to GND
= 10kΩ to GND
= GND, R = ∞
-
-
-2.6
-7.3
12
-2
-7.1
18
-
V
L
L
V
Total Supply Current
Unity Gain Bandwidth Product
Slew Rate
I
-
mA
MHz
V/µs
SUPPLY
OUT
L
f
10
3
15
T
SR
7
-
Output Current
Source to opposite supply
Sink to opposite supply
Open Loop Gain
I
6.2
1
6.8
1.4
90
-
-
-
mA
mA
dB
SOURCE
I
SlNK
A
-5V to +5V, R = 10kΩ
80
OL
L
1
Block Diagram ( / of CA5470)
4
1.8mA/AMP
4
V+
TO BIAS
CIRCUIT
100µA
150µA
320µA
50µA
50µA
1.2mA
A ≈
V
+INPUT
6dB
OUTPUT
-INPUT
A ≈ 30dB
A ≈ 54dB
V
V
2kΩ 2kΩ
11
GND OR
- SUPPLY
PMOS DIFFERENTIAL
INPUT STAGE
GROUNDED GATE
LEVEL SHIFTER
COMPOSITE MILLER
GAIN STAGE
OUTPUT STAGE
3-159
CA5470
Typical Performance Curve
V
= ±7.5V
S
14
12
10
8
6
V+ = 5V, V- = 0V
4
2
10K
100K
1M
10M
100M
FREQUENCY
FIGURE 1. MAXIMUM OUTPUT VOLTAGE SWING vs FREQUENCY
Metallization Mask Layout
0
10
20
30
40
50
60 69.7
97.2
90
80
70
60
50
40
30
20
10
0
Dimensions in parentheses are in millimeters and
derived from the basic inch dimensions as indicated.
Grid graduations are in mils (10 inch).
-3
97.2
The layout represents a chip when it is part of the
wafer. When the wafer is cut into chips, the cleavage
(2.46)
o
o
angles are 57 instead of 90 with respect to the face
of the chip. Therefore, the isolated chip is actually 7
mils (0.17mm) larger in both dimensions.
69.7
(1.77)
3-160
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