CD4001BMS [INTERSIL]
CMOS NOR Gate; CMOS或非门
| 型号： | CD4001BMS |
| 厂家： | 
Intersil |
| 描述： | CMOS NOR Gate |
| 文件： | 总9页 (文件大小：146K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CD4000BMS, CD4001BMS
CD4002BMS, CD4025BMS
CMOS NOR Gate
November 1994
Features
Pinouts
CD4000BMS
TOP VIEW
• High-Voltage Types (20V Rating)
• Propagation Delay Time = 60ns (typ.) at CL = 50pF,
VDD = 10V
NC
1
2
3
4
5
6
7
14 VDD
NC
13
12
11
F
E
D
• Buffered Inputs and Outputs
A
• Standard Symmetrical Output Characteristics
• 100% Tested for Maximum Quiescent Current at 20V
• 5V, 10V and 15V Parametric Ratings
B
C
H = A + B + C
VSS
10 K = D + E + F
9
8
L = G
• Maximum Input Current of 1µA at 18V Over Full Pack-
age-Temperature Range; 100nA at 18V and +25oC
G
NC = NO CONNECTION
• Noise Margin (Over Full Package Temperature Range):
- 1V at VDD = 5V
CD4001BMS
TOP VIEW
- 2V at VDD = 10V
A
1
2
3
4
5
6
7
14 VDD
- 2.5V at VDD = 15V
B
J = A + B
K = C + D
C
13
12
H
G
• Meets All Requirements of JEDEC Tentative Stan-
dards No. 13B, “Standard Specifications for Descrip-
tion of “B” Series CMOS Device’s
11 M = G + H
10 L = E + F
Description
D
9
8
F
E
CD4000BMS - Dual 3 Plus Inverter
CD4001BMS - Quad 2 Input
CD4002BMS - Dual 4 Input
CD4025BMS - Triple 3 Input
VSS
NC = NO CONNECTION
CD4002BMS
TOP VIEW
CD4000BMS,
CD4001BMS,
CD4002BMS,
and
J = A + B + C + D
1
2
3
4
5
6
7
14 VDD
CD4025BMS NOR gates provide the system designer with
direct implementation of the NOR function and supplement
the existing family of CMOS gates. All inputs and outputs are
buffered.
A
B
13 K = E + F + G + H
12
11
10
9
H
C
G
F
The CD4000BMS, CD4001BMS, CD4002BMS and the
CD4025BMS is supplied in these 14 lead outline packages:
D
NC
VSS
E
CD4000B CD4001B CD4002B CD4025B
8
NC
NC = NO CONNECTION
H4X
H1B
H3W
H4Q
H1B
H3W
H4Q
H1B
H3W
H4Q
H1B
H3W
Braze Seal DIP
Frit Seal DIP
CD4025BMS
TOP VIEW
Ceramic Flatpack
A
1
2
3
4
5
6
7
14 VDD
B
13
12
11
G
H
I
D
E
F
K = D + E + F
VSS
10 L = G + H + I
9
8
J = A + B + C
C
NC = NO CONNECTION
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
File Number 3289
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
7-649
CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS
Functional Diagrams
M = G + H
J = A + B
A
B
VDD
H
K = D + E + F
1
2
3
4
5
6
7
14
13
12
11
10
9
1
2
3
4
5
6
7
14
13
12
11
10
9
NC
NC
A
VDD
F
J
G
E
K = C + D
B
D
K
M
L
C
K
C
H = A + B + C
H
L
D
F
G
VSS
8
8
E
VSS
L = G
L = E + F
CD4000BMS
CD4001BMS
A
B
D
E
F
1
14
VDD
J
A
1
14
13
12
11
10
9
VDD
J = A + B + C + D
2
3
4
5
6
7
13
12
11
10
9
G
H
I
2
3
4
5
6
7
K
L = G + H + I
B
H
C
G
F
D
L
J
C
NC
E
K
K = D + E + F
K = E + F + G + H
8
NC
VSS
8
VSS
J = A + B + C
CD4002BMS
CD4025BMS
7-650
Specifications CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS
Absolute Maximum Ratings
Reliability Information
DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V
(Voltage Referenced to VSS Terminals)
Thermal Resistance . . . . . . . . . . . . . . . .
Ceramic DIP and FRIT Package . . . . . 80 C/W
Flatpack Package . . . . . . . . . . . . . . . . 70 C/W
θ
θ
jc
ja
o
o
20 C/W
o
o
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA
20 C/W
o
Maximum Package Power Dissipation (PD) at +125 C
o
o
o
o
Operating Temperature Range. . . . . . . . . . . . . . . . -55 C to +125 C
Package Types D, F, K, H
For TA = -55 C to +100 C (Package Type D, F, K) . . . . . . 500mW
o
o
For TA = +100 C to +125 C (Package Type D, F, K) . . . . .Derate
o
o
o
Storage Temperature Range (TSTG) . . . . . . . . . . . -65 C to +150 C
Linearity at 12mW/ C to 200mW
Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW
For TA = Full Package Temperature Range (All Package Types)
o
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265 C
At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for
10s Maximum
o
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175 C
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
MIN MAX UNITS
GROUP A
SUBGROUPS
PARAMETER
Supply Current
SYMBOL
CONDITIONS (NOTE 1)
TEMPERATURE
o
IDD
VDD = 20V, VIN = VDD or GND
1
+25 C
-
0.5
50
0.5
-
µA
µA
µA
nA
nA
nA
nA
nA
nA
mV
V
o
2
+125 C
-
o
VDD = 18V, VIN = VDD or GND
3
-55 C
-
o
Input Leakage
Input Leakage
IIL
VIN = VDD or GND
VIN = VDD or GND
VDD = 20
1
+25 C
-100
o
2
+125 C
-1000
-
o
VDD = 18V
VDD = 20
3
-55 C
-100
-
o
IIH
1
+25 C
-
-
-
-
100
1000
100
50
-
o
2
+125 C
o
VDD = 18V
3
-55 C
o
o
o
Output Voltage
VOL15 VDD = 15V, No Load
VOH15 VDD = 15V, No Load (Note 3)
1, 2, 3
+25 C, +125 C, -55 C
o
o
o
Output Voltage
1, 2, 3
+25 C, +125 C, -55 C 14.95
o
Output Current (Sink)
Output Current (Sink)
Output Current (Sink)
IOL5
IOL10
IOL15
VDD = 5V, VOUT = 0.4V
VDD = 10V, VOUT = 0.5V
VDD = 15V, VOUT = 1.5V
1
+25 C
0.53
1.4
3.5
-
-
mA
mA
mA
mA
mA
mA
mA
V
o
1
+25 C
-
o
1
+25 C
-
o
Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V
Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V
Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V
Output Current (Source) IOH15 VDD = 15V, VOUT = 13.5V
1
+25 C
-0.53
-1.8
-1.4
-3.5
-0.7
2.8
o
1
+25 C
-
o
1
+25 C
-
o
1
1
+25 C
-
o
N Threshold Voltage
P Threshold Voltage
Functional
VNTH
VPTH
F
VDD = 10V, ISS = -10µA
+25 C
-2.8
0.7
o
VSS = 0V, IDD = 10µA
1
+25 C
V
o
VDD = 2.8V, VIN = VDD or GND
VDD = 20V, VIN = VDD or GND
VDD = 18V, VIN = VDD or GND
VDD = 3V, VIN = VDD or GND
VDD = 5V, VOH > 4.5V, VOL < 0.5V
7
+25 C
VOH > VOL <
VDD/2 VDD/2
V
o
7
+25 C
o
8A
8B
1, 2, 3
+125 C
o
-55 C
o
o
o
Input Voltage Low
(Note 2)
VIL
VIH
VIL
VIH
+25 C, +125 C, -55 C
-
1.5
V
V
V
V
o
o
o
Input Voltage High
(Note 2)
VDD = 5V, VOH > 4.5V, VOL < 0.5V
1, 2, 3
1, 2, 3
1, 2, 3
+25 C, +125 C, -55 C 3.5
-
4
-
o
o
o
Input Voltage Low
(Note 2)
VDD = 15V, VOH > 13.5V,
VOL < 1.5V
+25 C, +125 C, -55 C
-
o
o
o
Input Voltage High
(Note 2)
VDD = 15V, VOH > 13.5V,
VOL < 1.5V
+25 C, +125 C, -55 C
11
NOTES: 1. All voltages referenced to device GND, 100% testing being 3. Foraccuracy, voltageismeasureddifferentiallytoVDD. Limit
implemented.
is 0.050V max.
2. Go/No Go test with limits applied to inputs
7-651
Specifications CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
GROUP A
PARAMETER
SYMBOL
CONDITIONS (NOTE 1, 2)
SUBGROUPS TEMPERATURE
MIN
MAX
250
338
200
270
UNITS
ns
o
Propagation Delay
TPHL
TPLH
VDD = 5V, VIN = VDD or GND
9
+25 C
-
-
-
-
o
o
10, 11
9
+125 C, -55 C
ns
o
Transition Time
NOTES:
TTHL
TTLH
VDD = 5V, VIN = VDD or GND
+25 C
ns
o
o
10, 11
+125 C, -55 C
ns
1. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
o
o
2. -55 C and +125 C limits guaranteed, 100% testing being implemented.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
Supply Current
SYMBOL
CONDITIONS
NOTES
TEMPERATURE
MIN
MAX
0.25
7.5
0.5
1.5
0.5
3.0
50
UNITS
µA
o
o
IDD
VDD = 5V, VIN = VDD or GND
1, 2
-55 C, +25 C
-
-
-
-
-
-
-
o
+125 C
µA
o
o
VDD = 10V, VIN = VDD or GND
VDD = 15V, VIN = VDD or GND
1, 2
1, 2
-55 C, +25 C
µA
o
+125 C
µA
o
o
-55 C, +25 C
µA
o
+125 C
µA
o
o
Output Voltage
Output Voltage
Output Voltage
Output Voltage
Output Current (Sink)
VOL
VOL
VOH
VOH
IOL5
VDD = 5V, No Load
VDD = 10V, No Load
VDD = 5V, No Load
VDD = 10V, No Load
VDD = 5V, VOUT = 0.4V
1, 2
1, 2
1, 2
1, 2
1, 2
+25 C, +125 C,
mV
o
-55 C
o
o
+25 C, +125 C,
-
50
-
mV
V
o
-55 C
o
o
+25 C, +125 C,
4.95
9.95
o
-55 C
o
o
+25 C, +125 C,
-
V
o
-55 C
o
+125 C
0.36
-
-
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
V
o
-55 C
0.64
o
Output Current (Sink)
Output Current (Sink)
Output Current (Source)
Output Current (Source)
Output Current (Source)
Output Current (Source)
IOL10
IOL15
VDD = 10V, VOUT = 0.5V
VDD = 15V, VOUT = 1.5V
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
+125 C
0.9
-
o
-55 C
1.6
-
o
+125 C
2.4
-
o
-55 C
4.2
-
o
IOH5A VDD = 5V, VOUT = 4.6V
IOH5B VDD = 5V, VOUT = 2.5V
+125 C
-
-
-
-
-
-
-
-
-
-0.36
-0.64
-1.15
-2.0
-0.9
-1.6
-2.4
-4.2
3
o
-55 C
o
+125 C
o
-55 C
o
IOH10
IOH15
VDD = 10V, VOUT = 9.5V
VDD =15V, VOUT = 13.5V
+125 C
o
-55 C
o
+125 C
o
-55 C
o
o
Input Voltage Low
Input Voltage High
Propagation Delay
VIL
VDD = 10V, VOH > 9V, VOL <
1V
1, 2
1, 2
+25 C, +125 C,
o
-55 C
o
o
VIH
VDD = 10V, VOH > 9V, VOL <
1V
+25 C, +125 C,
7
-
V
o
-55 C
o
TPHL
TPLH
VDD = 10V
VDD = 15V
VDD = 10V
VDD = 15V
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
+25 C
-
-
-
-
120
90
ns
ns
ns
ns
o
+25 C
o
Transition Time
TTHL
TTLH
+25 C
100
80
o
+25 C
7-652
Specifications CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
LIMITS
PARAMETER
Input Capacitance
NOTES:
SYMBOL
CONDITIONS
Any Input
NOTES
TEMPERATURE
MIN
MAX
UNITS
o
CIN
1, 2
+25 C
-
7.5
pF
1. All voltages referenced to device GND.
2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized
on initial design release and upon design changes which would affect these characteristics.
3. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
LIMITS
PARAMETER
Supply Current
SYMBOL
IDD
CONDITIONS
NOTES
1, 4
TEMPERATURE
MIN
MAX
2.5
UNITS
o
VDD = 20V, VIN = VDD or GND
VDD = 10V, ISS = -10µA
+25 C
-
-2.8
-
µA
V
o
N Threshold Voltage
VNTH
1, 4
+25 C
-0.2
±1
o
N Threshold Voltage
Delta
∆VNTH VDD = 10V, ISS = -10µA
1, 4
+25 C
V
o
P Threshold Voltage
VPTH
VSS = 0V, IDD = 10µA
1, 4
1, 4
+25 C
0.2
-
2.8
V
V
o
P Threshold Voltage
Delta
∆VPTH VSS = 0V, IDD = 10µA
+25 C
±1
o
Functional
F
VDD = 18V, VIN = VDD or GND
1
+25 C
VOH >
VDD/2
VOL <
VDD/2
V
VDD = 3V, VIN = VDD or GND
VDD = 5V
o
Propagation Delay Time
TPHL
TPLH
1, 2, 3, 4
+25 C
-
1.35 x
ns
o
+25 C
Limit
o
NOTES: 1. All voltages referenced to device GND.
2. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
3. See Table 2 for +25 C limit.
4. Read and Record
O
TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25 C
PARAMETER
Supply Current - SSI
Output Current (Sink)
Output Current (Source)
SYMBOL
IDD
DELTA LIMIT
±0.1µA
IOL5
± 20% x Pre-Test Reading
± 20% x Pre-Test Reading
IOH5A
TABLE 6. APPLICABLE SUBGROUPS
MIL-STD-883
CONFORMANCE GROUP
Initial Test (Pre Burn-In)
Interim Test 1 (Post Burn-In)
Interim Test 2 (Post Burn-In)
PDA (Note 1)
METHOD
100% 5004
100% 5004
100% 5004
100% 5004
100% 5004
100% 5004
100% 5004
Sample 5005
Sample 5005
Sample 5005
Sample 5005
GROUP A SUBGROUPS
READ AND RECORD
IDD, IOL5
1, 7, 9
1, 7, 9
IDD, IOL5
IDD, IOL5
1, 7, 9
1, 7, 9, Deltas
Interim Test 3 (Post Burn-In)
PDA (Note 1)
1, 7, 9
IDD, IOL5, IOH5A
1, 7, 9, Deltas
Final Test
2, 3, 8A, 8B, 10, 11
1, 2, 3, 7, 8A, 8B, 9, 10, 11
1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas
1, 7, 9
Group A
Group B
Subgroup B-5
Subgroup B-6
Subgroups 1, 2, 3, 9, 10, 11
Subgroups 1, 2 3
Group D
1, 2, 3, 8A, 8B, 9
NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.
7-653
Specifications CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS
TABLE 7. TOTAL DOSE IRRADIATION
TEST
READ AND RECORD
MIL-STD-883
METHOD
CONFORMANCE GROUPS
PRE-IRRAD
POST-IRRAD
PRE-IRRAD
POST-IRRAD
Group E Subgroup 2
5005
1, 7, 9
Table 4
1, 9
Table 4
TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS
OSCILLATOR
FUNCTION
OPEN
GROUND
VDD
9V ± -0.5V
50kHz
25kHz
PART NUMBER CD4000BMS
Static Burn-In 1
Note 1
1, 2, 6, 9, 10
1, 2, 6, 9, 10
1, 2
3 - 5, 7, 8, 11 - 13
14
Static Burn-In 2
Note 1
7
7
7
3 - 5, 8, 11 - 14
14
Dynamic Burn-
In Note 1
6, 9, 10
3 - 5, 8, 11 - 13
Irradiation
Note 2
1, 2, 6, 9, 10
3 - 5, 8, 11 - 14
PART NUMBER CD4001BMS
Static Burn-In 1
Note 1
3, 4, 10, 11
3, 4, 10, 11
-
1, 2, 5 - 9, 12, 13
14
Static Burn-In 2
Note 1
7
7
7
1, 2, 5, 6, 8, 9,
12 - 14
Dynamic Burn-
In Note 1
14
3, 4, 10, 11
1, 2, 5, 6, 8, 9,
12, 13
Irradiation
Note 2
3, 4, 10, 11
1, 2, 5, 6, 8, 9,
12 - 14
PART NUMBER CD4002BMS
Static Burn-In 1
Note 1
1, 6, 8, 13
1, 6, 8, 13
6, 8
2 - 5, 7, 9 - 12
14
Static Burn-In 2
Note 1
7
7
7
2 - 5, 9 - 12, 14
14
Dynamic Burn-
In Note 1
1, 13
2 - 5, 9 - 12
Irradiation
Note 2
1, 6, 8, 13
2 - 5, 9 - 12, 14
PART NUMBER CD4025BMS
Static Burn-In 1
Note 1
6, 9, 10
6, 9, 10
-
1 - 5, 7, 8, 11 - 13
14
Static Burn-In 2
Note 1
7
7
7
1 - 5, 8, 11 - 14
14
Dynamic Burn-
In Note 1
6, 9, 10
1 - 5, 8, 11 - 13
Irradiation
Note 2
6, 9, 10
1 - 5, 8, 11 - 14
NOTE:
1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V
2. Each pin except VDD and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures, VDD
= 10V ± 0.5V
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
654
Specifications CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS
Schematic and Logic Diagrams
14
p
VDD
p
*ALL INPUTS ARE
VDD
PROTECTED BY CMOS
PROTECTION NETWORK
p
p
n
p
n
p
n
p
n
p
n
6(10)
8*
n
n
n
9
5*
14
VDD
p
p
(12)
p
VSS
p
p
n
3*
1*
n
p
n
3
(11)
n
p
INVERTER AND 1 OF 2
GATES (NUMBERS IN
PARENTHESES ARE
TERMINAL NUMBERS
FOR SECOND GATE)
(8, 6, 13)
n
n
4*
(10, 4, 11)
(13)
2*
n
7
VSS
(9, 5, 12)
5(12)
7
VSS
6
3(11)
4(13)
1 OF 4 GATES (NUMBERS IN PARANTHESES
ARE TERMINAL NUMBERS FOR OTHER GATES)
(10)
LOGIC DIAGRAM
1(8, 6,13)
3
(10, 4, 11)
8
9
2(9, 5, 12)
LOGIC DIAGRAM
CD4000BMS
CD4001BMS
14
p
VDD
p
p
p
n
p
n
14
VDD
p
p
n
1
p
p
(13)
p
n
2*
(12)
3*
p
n
p
n
6
n
n
n
n
(9, 10)
3*
p
(11)
4*
n
n
p
(1, 11)
4*
n
p
n
(10)
5*
n
p
(2, 12)
5*
(9)
n
(8, 13)
1 OF 2 GATES (NUMBERS IN
PARENTHESES ARE TERMINAL
NUMBERS FOR SECOND GATE)
7
VSS
7
VSS
1 OF 3 GATES (NUMBERS IN
PARENTHESES ARE TERMINAL
NUMBERS FOR OTHER GATES)
2(12)
3(11)
4(10)
3(1, 11)
4(2, 12)
1
6
(13)
(9, 10)
LOGIC DIAGRAM
LOGIC DIAGRAM
5(8, 13)
5(9)
CD4002BMS
CD4025BMS
7-655
CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS
Typical Performance Characteristics
105
AMBIENT TEMPERATURE (TA) = +25oC
AMBIENT TEMPERATURE (TA) = +25oC
SUPPLY VOLTAGE (VDD) = 15V
8
6
4
SUPPLY VOLTAGE (VDD) = 15V
2
104
103
15
10
5
10V
10V
8
6
4
5V
2
10V
8
6
4
2
102
10
5V
8
6
4
CL = 50pF
CL = 15pF
2
2
4 6 8
2
4
6 8
2
4
6 8
2
4 6 8
0
5
10
15
20
25
1
10
INPUT FREQUENCY (fI) (kHz)
102
103
104
INPUT VOLTAGE (VI) (V)
FIGURE 1. TYPICAL VOLTAGE TRANSFER
CHARACTERISTICS
FIGURE 2. TYPICAL POWER DISSIPATION vs FREQUENCY
AMBIENT TEMPERATURE (TA) = +25oC
AMBIENT TEMPERATURE (TA) = +25oC
30
15
GATE-TO-SOURCE VOLTAGE (VGS) = 15V
GATE-TO-SOURCE VOLTAGE (VGS) = 15V
12.5
25
20
15
10
5
10
7.5
10V
10V
5
5V
5
2.5
5V
0
5
10
15
0
10
15
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
FIGURE 3. TYPICAL OUTPUT LOW (SINK) CURRENT
CHARACTERISTICS
FIGURE 4. MINIMUM OUTPUT LOW (SINK) CURRENT
CHARACTERISTICS
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
-15
-10
-5
0
-15
-10
-5
0
AMBIENT TEMPERATURE (TA) = +25oC
AMBIENT TEMPERATURE (TA) = +25oC
-5
GATE-TO-SOURCE VOLTAGE (VGS) = -5V
GATE-TO-SOURCE VOLTAGE (VGS) = -5V
-10
-15
-20
-25
-30
-5
-10V
-10
-15
-10V
-15V
-15V
FIGURE 5. TYPICAL OUTPUT HIGH (SOURCE) CURRENT
CHARACTERISTICS
FIGURE 6. MINIMUM OUTPUT HIGH (SOURCE) CURRENT
CHARACTERISTICS
7-656
CD4000BMS, CD4001BMS, CD4002BMS, CD4025BMS
Typical Performance Characteristics (Continued)
AMBIENT TEMPERATURE (TA) = +25oC
200
175
AMBIENT TEMPERATURE (TA) = +25oC
SUPPLY VOLTAGE (VDD) = 5V
150
125
100
75
200
SUPPLY VOLTAGE (VDD) = 5V
150
100
50
10V
15V
10V
15V
50
25
0
10
20
30
40
50
60
70
80
90 100
0
20
40
60
80
100
LOAD CAPACITANCE (CL) (pF)
LOAD CAPACITANCE (CL) (pF)
FIGURE 7. TYPICAL TRANSITION TIME vs LOAD
CAPACITANCE
FIGURE 8. TYPICAL PROPAGATION DELAY TIME vs LOAD
CAPACITANCE
Chip Dimensions and Pad Layouts
CD4000BMS
CD4001BMS
CD4002BMS
CD4025BMS
Dimensions in parentheses are in millimeters and are derived from the basic inch dimensions as indicated. Grid graduations are in mils (10-3 inch)
7-657
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